chippost.asm

AWARD BIOS源代码,支持的CHIPSET请看文件,有同型号的板子烧上去就可以跑

;	 2. You must return non-zero flag if your system have no
;		shadow RAMs or total memory is 512k only
;[]==============================================================[]
		public  Ct_Shadow_Allow
Ct_Shadow_Allow proc    near
		xor     al,al			;shadow RAM available
		ret
Ct_Shadow_Allow endp

;[]==============================================================[]
;Ct_Ext_Mem_Limit: (POST 30h)
;	Limit maximum memory size according to onboard DRAM
;Save  : all but flags
;Input : AX - No. of 1k memory size
;Output: AX - max. No. of 1m memory size return
;Note  : 1. This routine will be called after memory sizing
;	 2. This routine is optional , because our BIOS can not
;		detect memory size for some special chipset.
;		For example : actual memory size is 16384 Kb , Our BIOS
;			  detect it as 64512 Kb , and I known it is
;			  real 16384 Kb only.
;[]==============================================================[]
		public  Ct_Ext_Mem_Limit
Ct_Ext_Mem_Limit proc   near
		ret
Ct_Ext_Mem_Limit endp

;[]==============================================================[]
;Later_Cache_Sizing: (POST 3Eh)
;	Do external cache sizing before diplay cache size to screen
;Save  : all but flags
;Input : none
;Output: none
;Note  : 1. We do cache sizing just after onboard memory configuration
;		detection mostly. If it cann't detect cache sizing
;		correctly , you can do it here.
;	 2. Stack is available now.
;[]==============================================================[]
		public  Later_Cache_Sizing
Later_Cache_Sizing	proc    near
		call	far ptr X_Later_Cache_Sizing		;R13
		ret			; Dummy Return
Later_Cache_Sizing	endp

;[]==============================================================[]
;Ct_Math_Detect: (POST 0Bh)
;	Detect coprocessor presence by special method.
;Save  : all but flags and AL
;Input : none
;Output: carry set  : No special method
;	 carry clear: Special detection
;			AL - 0    - no coprocessor
;			 - 1    - 287
;			 - 2    - 387
;Note  : 1. Some chipset can not detect coproessor by standard
;		method and it offer special register to indicate
;		coprocessor presence. In this case, programmer
;		should return actual coprocessor value in AL.
;	 2. Stack is available now.
;[]==============================================================[]
		public  Ct_Math_Detect
Ct_Math_Detect  proc    near
		stc			;No special detect
		ret
Ct_Math_Detect  endp

;[]==============================================================[]
;Ct_Option_Rom_Scan: (POST 52h)
;	Initialize special adaptor ROMs
;Save  : all but flags
;Input : none
;Output: none
;Note  : 1. Initialize special adaptor ROMs for customerization.
;	 2. typically used is to scan E8000-EFFFF ROMs
;[]==============================================================[]
		public  Ct_Option_Rom_Scan
Ct_Option_Rom_Scan	proc    near
		ret			;no special option ROM
Ct_Option_Rom_Scan	endp

;[]==============================================================[]
;Ct_Show_Config:(POST 61h)
;	Special string display after showing system configuration
;Save  : all but flag
;Input : none
;Output: none
;Note  : 1. Some customer want to show their own messages after
;		system configuration display.
;	 2. Please use "Display_String" to display these strings
;[]==============================================================[]
		public  Ct_Show_Config
Ct_Show_Config  proc    near
		call	far ptr X_Ct_Show_Config
		ret
Ct_Show_Config  endp

ifdef   CLEAR_PASSWORD_SUPPORT
;[]==============================================================[]
;Ck_Password_Switch: (POST 0Eh)
;      Some board maker design a password switch to clear password
;      setting. You can check the switch here, and disable password
;      checking and display any messages if switch on.
;Save  : all but flag
;Input : none
;Output: none
;Note  : 1. This routine is customerization issue.
;[]==============================================================[]
		public  Ck_Password_Switch
Ck_Password_Switch	proc    near
		call	far ptr E000_Ck_Password_Switch
		ret
Ck_Password_Switch	endp
endif;  CLEAR_PASSWORD_SUPPORT

;[]==============================================================[]
;[]==============================================================[]
CYRIXREG	STRUC
		db	?	;register index
		db	?	;register value
CYRIXREG	ENDS
		public  Cyrix_Cache_Reg
		public  NO_OF_CYRIX_REG
Cyrix_Cache_Reg:
		CYRIXREG <0c0h,002h>		; Dummy Register
NO_OF_CYRIX_REG EQU     ($ - Cyrix_Cache_Reg) / 2

;[]========================================================================[]
;Procedure:     Ct_Restore_Cyrix_Reg
;
;Function :     To restore the Cyrix registers during shutdown or warm-reset.
;
;Input    :     None
;
;Output   :     None
;
;Registers:     All registers should be preserved
;
;Note     :     1. stack available
;		2. Should check if it is M7/M6 before restoring.
;		3. Usually, code to resotre SMBASE reg.(CEh, CFh) is
;			placed in this routine.
;[]========================================================================[]
		Public  Ct_Restore_Cyrix_Reg
Ct_Restore_Cyrix_Reg    Proc    Near
		ret				; Dummy Return
Ct_Restore_Cyrix_Reg    Endp

ifdef   Double_Password
;[]========================================================================[]
;Procedure:     Ct_User_Password_Location
;
;Function :     Claim the CMOS locations for two-layer password operation
;
;Input    :     None
;
;Output   :     DI - First CMOS location to store hashed password, this need
;			2 bytes of CMOS
;		SI - CMOS location to save password setting flag
;		DL - Mask byte for checking password settging
;
;
;Registers:     all except DI,SI and DL
;
;Note     :     1. stack available
;		2. The programmer should implement this routine to support
;			two-layer password.
;		3. The routine must offer 3 bytes of CMOS to caller.
;[]========================================================================[]
		Public  Ct_User_Password_Location
Ct_User_Password_Location	Proc    Near
		call	far ptr E000_Ct_User_Password_Location
		ret
Ct_User_Password_Location	Endp
;R06 - start
		db	'KcMoS'
		db	62h,64h			;62h-63h
		dw	0			;end sign
;R06 - end
endif;  Double_Password

ifdef   NEW_IDE_MODE_3
;[]==============================================================[]
;
; Ct_Set_IDE_Timing: (POST 42h)
;
;	Programing I/O chip registre for IDE PIO mode 3 support
;
; SAVES : all
;
; ENTRY : IDE_PARM_Flag[bp] :
;	  Bit 0 - 3 = drive 0-3 support PIO mode 3 if bit set to 1
;
;  EXIT : None
;
;  NOTE : 1. Stack available
;
;[]==============================================================[]
		public  Ct_Set_IDE_Timing
Ct_Set_IDE_Timing	proc    near
		call	far ptr E000_Ct_Set_IDE_Timing
		ret
Ct_Set_IDE_Timing	endp
endif;  NEW_IDE_MODE_3

;[]==============================================================[]
; Ct_Cache:(POST 61h)
;	Turn secondary cache on/off routine.
; Input  :	AL = Turn on (TRUE) or off (FALSE) cache
; Output :	None
; Destroy:	C flag
;[]==============================================================[]
		public  Ct_Cache
Ct_Cache	proc    near
		ret				; Dummy Return
Ct_Cache	endp

;[]=============================================================[]
;Procedure :	Ct_OnChip_IDE_Chk  (POST 0Bh)(call from Pci_IO_Mem_Init)
;Function :     Return status of On-chip IDE for PCI add-in PCI/IDE
;		controlling
;
;Input	:	none
;
;Output	:	carry set - OnChip IDE disabled
;		no carry  - Onchip IDE enabled
;Note   : 	This function should return right status of on-chip
;		IDE, otherwise IDE port will be conflicted if
;		PCI/IDE card is plugged
;[]=============================================================[]
		public	Ct_OnChip_IDE_Chk
Ct_OnChip_IDE_Chk	proc	near
		call	far ptr X_Ct_OnChip_IDE_Chk
		ret
Ct_OnChip_IDE_Chk	endp

;[]=============================================================[]
; Ct_MemHole_Status:
;Function : return memory hole at 15Mb-16Mb status
;
;Input    : none
;Output   : AL - 0 = hole disabled
;		 1 = hole enabled
;[]=============================================================[]
		public	Ct_MemHole_Status
Ct_MemHole_Status	proc	near
		call	far ptr X_Ct_MemHole_Status
		ret
Ct_MemHole_Status	endp

ifdef	PNP_BIOS
;R43 include	pnp.equ			;R35
;[]========================================================================[]
;Procedure:	Ct_Pci_Escd
;Function :	Return Chipset PCI ESCD
;Input    :	ES:DI = buffer address pointer
;		CH = device/function number
;Output   :	CF = 0 special PCI ESCD
;		CF = 1 not special PCI ESCD
;Note	  :	1. Don't destroy any register
;		2. Please refer to "2A4X5000.ASM"
;[]========================================================================[]
		public	Ct_Pci_Escd
Ct_Pci_Escd	proc	near
		call	far ptr X_Ct_Pci_Escd
		ret
Ct_Pci_Escd	endp
endif	;PNP_BIOS

;R22 ;[]==============================================================[]
;R22 ; Get_Set_Ct_OR(Get_Set_PCI_OR):
;R22 ;	OR a value in the chipset register.
;R22 ; Input  :	CX = Index register to change
;R22 ;		bl = Value to change (OR)
;R22 ; Output :	None
;R22 ; Destory:	EAX, ECX, DX
;R22 ;
;R22 ;[]==============================================================[]
;R22 		Public	Get_Set_Ct_OR, Get_Set_PMU_OR
;R22 Get_Set_Ct_OR	proc	near
;R22 Get_Set_PMU_OR:
;R22 		call    Get_Ct
;R22 		or      al, bl			;OR data
;R22 		call    Set_Ct
;R22 		ret
;R22 Get_Set_Ct_OR	endp
;R22 
;R22 ;R21;[]==============================================================[]
;R22 ;R21; Get_Set_Ct_AND(Get_Set_PCI_AND):
;R22 ;R21;	AND a value in the chipset register.
;R22 ;R21; Input  :	CX = Index register to change.
;R22 ;R21;		bl = Value to change (AND)
;R22 ;R21; Output :	None
;R22 ;R21; Destory:	EAX, ECX, DX
;R22 ;R21;
;R22 ;R21;[]==============================================================[]
;R22 ;R21		Public	Get_Set_Ct_AND, Get_Set_PMU_AND
;R22 ;R21Get_Set_Ct_AND	proc	near
;R22 ;R21Get_Set_PMU_AND:
;R22 ;R21		call    Get_Ct
;R22 ;R21		and     al, bl			;AND data
;R22 ;R21		call    Set_Ct
;R22 ;R21		ret
;R22 ;R21Get_Set_Ct_AND	endp

;[]==============================================================[]
; Set_Ct_Clear(Set_PCI_Clear):
;	Clear a value in the chipset register.
; Input  :	CX = Index register to change.
; Output :	None
; Destory:	EAX, ECX, DX
;
;[]==============================================================[]
		Public	Set_Ct_Clear
Set_Ct_Clear	proc	near
		xor     al, al			; Zero
		call    Set_Ct			; Clear
		ret
Set_Ct_Clear	endp

		public	Get_CMOS2
Get_CMOS2	proc	near
		OUT	72h,AL			; address to interface
		jcxz	short $+2
		IN	AL,73h
		jcxz	short $+2
		ret
Get_CMOS2	endp

		public	Set_CMOS2
Set_CMOS2	proc	near
		OUT	72h,AL			; address to interface
		jcxz	short $+2
		xchg	al,ah			;ah=index,al=value	   
		OUT	73h,AL			; and output it
		jcxz	short $+2
		ret
Set_CMOS2	endp

FCODE		ENDS

XGROUP		GROUP	XCODE
XCODE		SEGMENT USE16 PARA PUBLIC 'XCODE'
		ASSUME	CS:XGROUP,ES:XGROUP

;R50 - starts
;[]==============================================================[]
; X_If_693A:
;	Test if 693A Chip ?
; Input  :	None
; Output :	JB : Not 693A
;		JNB : Is 693A
; Destory:	Flag
;[]==============================================================[]
		Public	X_If_693A
X_If_693A	Proc	Near
		pushad
		mov	cx,VT692 + 08h
		call	X_Get_Ct
		cmp	al, 40h
		popad
		ret
X_If_693A	Endp
;R50 - ends


;R07 - starts
ifdef	SMBus_Port
;R46A - starts
;Function : Read a I2C byte value
;Input    : BL - I2C ID address,AL - byte index
;Output   : AL - value return if carry cleared
;	    Fail - if carr set

	Public     X_I2C_Byte_Read	
X_I2C_Byte_Read	proc	near
 
 	;set index byte to read
 		mov	dx,SMBus_Port +03h
 		out	dx,al			;Index
 		NEWIODELAY
 
 	;set I2C ID No.
 		mov	dl,04h
 		mov	al,bl			;E2PROM read cmd
 		or	al,01H			;bit 0=1 for I2C read
 		out	dx,al
 		NEWIODELAY
 
 	;wait SMbus ready
 		CALL	X_Chk_SMBus_READY

 	;start I2C read operation
 		mov	dl,02h
 		mov	al,48h
 		out	dx,al			;read data
 		NEWIODELAY
 
 	;wait for a while
 		mov	cx,100h
 	@@:				
 		newiodelay
 		loop	short @B
 
 	;check status OK ?
 		CALL	X_Chk_SMBus_READY
 		jc	short X_I2CFaile  	;SMBus Fail
 
 	;read data
 		mov	dl,05			;data port
 		in	al,dx			;Data0
 		NEWIODELAY
 						;value return in AL

 X_I2CFaile:
	       ret
X_I2C_Byte_Read   endp	

	Public	X_Chk_SMBus_READY
X_Chk_SMBus_READY	Proc	near
		
		mov	dx,SMBus_Port + 0
		clc
		mov	cx,0100h			
X_Chk_I2c_OK:
		in	al,dx		;get status
		NEWIODELAY
		or	al,al
		jz	short X_Clear_final

		test	al,04h
		jnz	short X_SMBus_Err

		test	al,01h		;busy ?		
		jz	short X_Not_Smbusy
		ror	ecx,16
		mov	cx,1000h		
	@@:						
		loop	short @B		
		ror	ecx,16
X_Not_Smbusy:
		out 	dx,al
		loop	short X_Chk_I2c_OK
X_SMBus_Err:
		out	dx,al			;clear status
		NEWIODELAY
		in	al,dx
		test	al,04H			;device error ?
		jnz	short X_SMBus_Err

		stc
X_Clear_final:

		ret
X_Chk_SMBus_READY	Endp
;R46A - ends

;R07A ifdef	CAS_Latency_Error_String
  IFNDEF	No_Suggested_SDRAM_CL				;R07A 
X_CAS_Latency_Error_String	Proc	Far
		pushad
  IFDEF	CAS_Latency_Auto				;R15
		mov     si,offset SDRAM_CL_Item		;R15
		call    X_GetItem_Value			;R15
		cmp	al,2				;R15