slaa150.s43

16位并行输出ADS8364 ADC与MSP430F149接口设计。

;************************************************************************
; MSP430F149 Demo - Parallel Communication with ADS8364 EVM
;
;             ADS8364          MSP430F149		  
;	   -------------      -------------
;         |        HOLDx|<---|P1.0         |
;         |             |    |             |
;CHA0(+)~>|IN+       RST|<---|P1.3         |
;CHA0(-)~>|IN+       /RD|<---|P1.2         |
;         |          CLK|<---|SMCLK        |
;CHA1(+)~>|IN+          |    |             |
;CHA1(-)~>|IN+       EOC|--->|P1.1         |
;         |             |    |             |
;CHB0(+)~>|IN+          |    |             |
;CHB0(-)~>|IN+    D[0.7}|<---|P2.0..P2.7   |
;         |             |    |             |
;CHB1(+)~>|IN+          |    |             |
;CHB1(-)~>|IN+          |
;         |             |      _VCC
;CHC0(+)~>|IN+          |      |
;CHC0(-)~>|IN+       A2 |------|
;         |          A1 |------|
;CHC0(+)~>|IN+          |
;CHC1(-)~>|IN+       A0 |------|
;         |          CS |------|
;                             DGND 
;
; Assembled with IAR Embedded Workshop for MSP430 Kickstart
;
; Texas Instruments, Inc.
; Tom Hendrick
; Data Aquisition Applications - Dallas
; Apr. 2002
;************************************************************************
#include   "msp430x14x.h"          // Standard Equations
#include   "ADS8364.h"             // ADC Equations

;************************************************************************
;Constants
;************************************************************************
READ       equ    006h                ; If BYTE = 0, 1x Channels
                                      ; If BYTE = 1, 2x Channels
                                      ; If ADD + BYTE = 1, 3x Channels
TEST       equ    001h
SAMPLES    equ    480h                ; Take 100 Samples From Each Channel
                                      ; 2Reads/Conversion x 6 Channels
                                      ; = 1200 Cycles
;************************************************************************
;Setup RAM
;************************************************************************
           RSEG  UDATA0
ADC_Data   DS    2                    ; Storage for ADC Samples

;************************************************************************
;Setup Stack
;************************************************************************
           RSEG  CSTACK
           DS    0  

;************************************************************************
;Program Code                    
;************************************************************************
           RSEG CODE
;************************************************************************ 
RESET_ISR  mov     #SFE(CSTACK),SP     ; define stackpointer
           call    #Init_Sys           ; Initialize the MSP430
           call    #RESET_ADC          ; Initialize the ADC
           call    #MAIN               ; Main Program

;************************************************************************
;Main Program Code                    
;************************************************************************
MAIN ;

test_loop
          mov.b #00, R8
          mov.b #00, R9  
          mov.b #00, R10
          mov.b #00, R11                 ; Set Data Pointer to zero
sample
          bis.b #BIT0, R10               ; Set Read Test
          bic.b #HOLD,&P1OUT             ; Toggle HOLDx
          bis.b #HOLD,&P1OUT
wait      bit.b #BIT0, R10               ; Interrupt Finished?
          jnz wait
          cmp.w #SAMPLES, R11            ; Finished sampling?
          jne sample
          jmp test_loop                  ; Start Over

;************************************************************************
Init_Sys;  Modules and Controls Registers set-up subroutine
;************************************************************************
StopWDT   mov     #WDTPW+WDTHOLD,&WDTCTL  ; Stop Watchdog Timer

SetupClock
          bic.b #XTOFF, &BCSCTL1
          bis.b #SELM1+SELS+DIVS0, &BCSCTL2
HF_WAIT  ; 8MHz Crystal used - wait for stabilization
          bic.b #OFIFG, &IFG1
          bit.b #OFIFG, &IFG1
          jnz HF_WAIT
          bic.b #OFIFG, &IFG1          ; Clear Oscillator fault flag
          bit.b #OFIFG, &IFG1          ; Test for clear
SetupPort1
          clr.b &P1OUT
          bis.b #SMCLK+HOLD+RST+RE,&P1DIR	  ; P1 pin 1 set to output (toggle's LED)
          bis.b #HOLD+RST+RE,&P1OUT
          bis.b #SMCLK,&P1SEL	              ; P1.4 SMCLK option select
SetupPort2
          clr.b &P2OUT
          bis.b #00h,&P2DIR	       

SetupInterrupt
          bic.b #02h, &P1IFG           ; Clear interrupt flags
          bic.b #02h, &P1IES           ; Set for edge selection
          bis.b #02h, &P1IE            ; Enable external Interrupt
          eint                         ; Enable interrupts
          ret
          
;*********************************************************************************
RESET_ADC  ;   Initialize the AtoD Converter
;*********************************************************************************
          bic.b #RST,&P1OUT
          bis.b #RST,&P1OUT
          ret  

;*********************************************************************************
IRQ_ISR;   
;*********************************************************************************
          bic.b #BIT0, R10
          mov.b #00h, R12
loop      bic.b #RE, &P1OUT
          mov.b &P3IN,R8 ; Store Lower Byte
          bis.b #RE, &P1OUT
          bic.b #RE, &P1OUT
          mov.b &P4IN,R9 ; Store Upper Byte
          bis.b #RE, &P1OUT           
          swpb R9
          add.w R8, R9
          mov.w R9, ADC_Data(R11)
          incd R11
          inc R12
          cmp.b #READ, R12            ; Finished reading?
          jne loop     
          bic.b #02h, &P1IFG
          reti                        ; return from interrupt
           
;*********************************************************************************
         COMMON  INTVEC              ; MSP430x11x1/MSP430F14x Interrupt vectors   
;*********************************************************************************
          ORG     RESET_VECTOR
RESET_VEC  DW      RESET_ISR           ; POR, ext. Reset, Watchdog
          ORG      PORT1_VECTOR
PORT1_VEC  DW      IRQ_ISR             ; PORT1, Ext. Int.

           END