oled.lst

nRF24L01详细编程资料

  pBuf                 --> R14
  reg                  --> R10
     146 D089      RCALL	push_xgset00FC
     147 0179      MOVW	R14,R18
     148 2EA0      MOV	R10,R16
(0285) }
(0286) /**************************************************
(0287) Function: SPI_Read_Buf();
(0288) 
(0289) Description:
(0290)   Reads 'bytes' #of bytes from register 'reg'
(0291)   Typically used to read RX payload, Rx/Tx address */
(0292) /**************************************************/
(0293) unsigned char SPI_Read_Buf(unsigned char reg, unsigned char *pBuf, unsigned char bytes)
(0294) {
(0295) 	unsigned char status,byte_ctr;
(0296) 	nRF24L01_CSNL;
     149 985E      CBI	0x0B,6
(0297) 	delay();
     14A DFAE      RCALL	_delay
(0298)   	status = SPI_RW(reg);       		// Select register to write to and read status byte
     14B 2D0A      MOV	R16,R10
     14C DFC4      RCALL	_SPI_RW
     14D 2EA0      MOV	R10,R16
(0299) 	for(byte_ctr=0;byte_ctr<bytes;byte_ctr++)
     14E 24CC      CLR	R12
     14F C008      RJMP	0x0158
(0300)     	pBuf[byte_ctr] = SPI_RW(0);    // Perform SPI_RW to read byte from nRF24L01
     150 2700      CLR	R16
     151 DFBF      RCALL	_SPI_RW
     152 2DEC      MOV	R30,R12
     153 27FF      CLR	R31
     154 0DEE      ADD	R30,R14
     155 1DFF      ADC	R31,R15
     156 8300      STD	Z+0,R16
     157 94C3      INC	R12
     158 800E      LDD	R0,Y+6
     159 14C0      CP	R12,R0
     15A F3A8      BCS	0x0150
(0301) 	nRF24L01_CSNH;
     15B 9A5E      SBI	0x0B,6
(0302) 	delay();
     15C DF9C      RCALL	_delay
(0303)   	return(status);                    // return nRF24L01 status byte
     15D 2D0A      MOV	R16,R10
     15E C066      RJMP	pop_xgset00FC
_SPI_Write_Buf:
  status               --> R10
  byte_ctr             --> R12
  bytes                --> Y,+6
  pBuf                 --> R14
  reg                  --> R10
     15F D070      RCALL	push_xgset00FC
     160 0179      MOVW	R14,R18
     161 2EA0      MOV	R10,R16
(0304) }
(0305) /**************************************************
(0306) Function: SPI_Write_Buf();
(0307) 
(0308) Description:
(0309)   Writes contents of buffer '*pBuf' to nRF24L01
(0310)   Typically used to write TX payload, Rx/Tx address */
(0311) /**************************************************/
(0312) unsigned char SPI_Write_Buf(unsigned char reg, unsigned char *pBuf, unsigned char bytes)
(0313) {
(0314) 	unsigned char status,byte_ctr;
(0315) 	nRF24L01_CSNL;                   		// Set nRF24L01_CSN low, init SPI tranaction
     162 985E      CBI	0x0B,6
(0316)   	delay();
     163 DF95      RCALL	_delay
(0317) 	status = SPI_RW(reg);    					// Select register to write to and read status byte
     164 2D0A      MOV	R16,R10
     165 DFAB      RCALL	_SPI_RW
     166 2EA0      MOV	R10,R16
(0318)   	for(byte_ctr=0; byte_ctr<bytes; byte_ctr++) // then write all byte in buffer(*pBuf)
     167 24CC      CLR	R12
     168 C006      RJMP	0x016F
(0319)     	status = SPI_RW(*pBuf++);            
     169 01F7      MOVW	R30,R14
     16A 9101      LD	R16,Z+
     16B 017F      MOVW	R14,R30
     16C DFA4      RCALL	_SPI_RW
     16D 2EA0      MOV	R10,R16
     16E 94C3      INC	R12
     16F 800E      LDD	R0,Y+6
     170 14C0      CP	R12,R0
     171 F3B8      BCS	0x0169
(0320) 	nRF24L01_CSNH; 								// Set nRF24L01_CSN high again
     172 9A5E      SBI	0x0B,6
(0321) 	delay();
     173 DF85      RCALL	_delay
(0322)   	return(status);          					// return nRF24L01 status byte
     174 2D0A      MOV	R16,R10
     175 C04F      RJMP	pop_xgset00FC
_RX_Mode:
     176 9721      SBIW	R28,1
(0323) }
(0324) /**************************************************
(0325) Function: RX_Mode();
(0326) 
(0327) Description:
(0328)   This function initializes one nRF24L01 device to
(0329)   RX Mode, set RX address, writes RX payload width,
(0330)   select RF channel, datarate & LNA HCURR.
(0331)   After init, CE is toggled high, which means that
(0332)   this device is now ready to receive a datapacket. */
(0333) /**************************************************/
(0334) void RX_Mode(void)
(0335) {
(0336) 	nRF24L01_CEL;
     177 985F      CBI	0x0B,7
(0337) 	delay();
     178 DF80      RCALL	_delay
(0338)   	SPI_Write_Buf(WRITE_REG + RX_ADDR_P0, TX_ADDRESS, TX_ADR_WIDTH); // Use the same address on the RX device as the TX device
     179 E085      LDI	R24,5
     17A 8388      STD	Y+0,R24
     17B E420      LDI	R18,0x40
     17C E031      LDI	R19,1
     17D E20A      LDI	R16,0x2A
     17E DFE0      RCALL	_SPI_Write_Buf
(0339) 
(0340)   	SPI_RW_Reg(WRITE_REG + EN_AA, 0x01);      // Enable Auto.Ack:Pipe0
     17F E021      LDI	R18,1
     180 E201      LDI	R16,0x21
     181 DFA6      RCALL	_SPI_RW_Reg
(0341)   	SPI_RW_Reg(WRITE_REG + EN_RXADDR, 0x01);  // Enable Pipe0
     182 E021      LDI	R18,1
     183 E202      LDI	R16,0x22
     184 DFA3      RCALL	_SPI_RW_Reg
(0342)   	SPI_RW_Reg(WRITE_REG + RF_CH, 40);        // Select RF channel 40
     185 E228      LDI	R18,0x28
     186 E205      LDI	R16,0x25
     187 DFA0      RCALL	_SPI_RW_Reg
(0343)   	SPI_RW_Reg(WRITE_REG + RX_PW_P0, TX_PLOAD_WIDTH); // Select same RX payload width as TX Payload width
     188 E124      LDI	R18,0x14
     189 E301      LDI	R16,0x31
     18A DF9D      RCALL	_SPI_RW_Reg
(0344)   	SPI_RW_Reg(WRITE_REG + RF_SETUP, 0x07);   // TX_PWR:0dBm, Datarate:2Mbps, LNA:HCURR
     18B E027      LDI	R18,7
     18C E206      LDI	R16,0x26
     18D DF9A      RCALL	_SPI_RW_Reg
(0345)   	SPI_RW_Reg(WRITE_REG + CONFIG, 0x0f);     // Set PWR_UP bit, enable CRC(2 bytes) & Prim:RX. RX_DR enabled..
     18E E02F      LDI	R18,0xF
     18F E200      LDI	R16,0x20
     190 DF97      RCALL	_SPI_RW_Reg
(0346)   	nRF24L01_CEH;
     191 9A5F      SBI	0x0B,7
(0347) 	delay();
     192 DF66      RCALL	_delay
     193 9621      ADIW	R28,1
     194 9508      RET
_TX_Mode:
     195 9721      SBIW	R28,1
(0348) 	//  This device is now ready to receive one packet of 16 bytes payload from a TX device sending to address
(0349)   //  '3443101001', with auto acknowledgment, retransmit count of 10, RF channel 40 and datarate = 2Mbps.
(0350) 
(0351) }
(0352) /**************************************************/
(0353) 
(0354) /**************************************************
(0355) Function: TX_Mode();
(0356) 
(0357) Description:
(0358)   This function initializes one nRF24L01 device to
(0359)   TX mode, set TX address, set RX address for auto.ack,
(0360)   fill TX payload, select RF channel, datarate & TX pwr.
(0361)   PWR_UP is set, CRC(2 bytes) is enabled, & PRIM:TX.
(0362) 
(0363)   ToDo: One high pulse(>10us) on CE will now send this
(0364)   packet and expext an acknowledgment from the RX device. */
(0365) /**************************************************/
(0366) void TX_Mode(void)
(0367) {
(0368) 	nRF24L01_CEL;
     196 985F      CBI	0x0B,7
(0369) 	delay();
     197 DF61      RCALL	_delay
(0370)   	SPI_Write_Buf(WRITE_REG + TX_ADDR, TX_ADDRESS, TX_ADR_WIDTH);    // Writes TX_Address to nRF24L01
     198 E085      LDI	R24,5
     199 8388      STD	Y+0,R24
     19A E420      LDI	R18,0x40
     19B E031      LDI	R19,1
     19C E300      LDI	R16,0x30
     19D DFC1      RCALL	_SPI_Write_Buf
(0371)   	SPI_Write_Buf(WRITE_REG + RX_ADDR_P0, TX_ADDRESS, TX_ADR_WIDTH); // RX_Addr0 same as TX_Adr for Auto.Ack
     19E E085      LDI	R24,5
     19F 8388      STD	Y+0,R24
     1A0 E420      LDI	R18,0x40
     1A1 E031      LDI	R19,1
     1A2 E20A      LDI	R16,0x2A
     1A3 DFBB      RCALL	_SPI_Write_Buf
(0372)   	SPI_Write_Buf(WR_TX_PLOAD, Buffer, TX_PLOAD_WIDTH); // Writes data to TX payload
     1A4 E184      LDI	R24,0x14
     1A5 8388      STD	Y+0,R24
     1A6 E020      LDI	R18,0
     1A7 E031      LDI	R19,1
     1A8 EA00      LDI	R16,0xA0
     1A9 DFB5      RCALL	_SPI_Write_Buf
(0373) 
(0374)   	SPI_RW_Reg(WRITE_REG + EN_AA, 0x01);      // Enable Auto.Ack:Pipe0
     1AA E021      LDI	R18,1
     1AB E201      LDI	R16,0x21
     1AC DF7B      RCALL	_SPI_RW_Reg
(0375)   	SPI_RW_Reg(WRITE_REG + EN_RXADDR, 0x01);  // Enable Pipe0
     1AD E021      LDI	R18,1
     1AE E202      LDI	R16,0x22
     1AF DF78      RCALL	_SPI_RW_Reg
(0376)   	SPI_RW_Reg(WRITE_REG + SETUP_RETR, 0x1a); // 500us + 86us, 10 retrans...
     1B0 E12A      LDI	R18,0x1A
     1B1 E204      LDI	R16,0x24
     1B2 DF75      RCALL	_SPI_RW_Reg
(0377)   	SPI_RW_Reg(WRITE_REG + RF_CH, 40);        // Select RF channel 40
     1B3 E228      LDI	R18,0x28
     1B4 E205      LDI	R16,0x25
     1B5 DF72      RCALL	_SPI_RW_Reg
(0378)   	SPI_RW_Reg(WRITE_REG + RF_SETUP, 0x07);   // TX_PWR:0dBm, Datarate:2Mbps, LNA:HCURR
     1B6 E027      LDI	R18,7
     1B7 E206      LDI	R16,0x26
     1B8 DF6F      RCALL	_SPI_RW_Reg
(0379)   	SPI_RW_Reg(WRITE_REG + CONFIG, 0x0e);     // Set PWR_UP bit, enable CRC(2 bytes) & Prim:TX. MAX_RT & TX_DS enabled..
     1B9 E02E      LDI	R18,0xE
     1BA E200      LDI	R16,0x20
     1BB DF6C      RCALL	_SPI_RW_Reg
(0380) 	nRF24L01_CEH;
     1BC 9A5F      SBI	0x0B,7
(0381) 	delay();
FILE: <library>
     1BD DF3B      RCALL	_delay
     1BE 9621      ADIW	R28,1
     1BF 9508      RET
pop_xgset003C:
     1C0 90A9      LD	R10,Y+
     1C1 90B9      LD	R11,Y+
     1C2 90C9      LD	R12,Y+
     1C3 90D9      LD	R13,Y+
     1C4 9508      RET
pop_xgset00FC:
     1C5 90A9      LD	R10,Y+
     1C6 90B9      LD	R11,Y+
     1C7 90C9      LD	R12,Y+
     1C8 90D9      LD	R13,Y+
     1C9 90E9      LD	R14,Y+
     1CA 90F9      LD	R15,Y+
     1CB 9508      RET
push_xgsetF0FC:
     1CC 937A      ST	R23,-Y
     1CD 936A      ST	R22,-Y
push_xgset30FC:
     1CE 935A      ST	R21,-Y
     1CF 934A      ST	R20,-Y
push_xgset00FC:
     1D0 92FA      ST	R15,-Y
     1D1 92EA      ST	R14,-Y
push_xgset003C:
     1D2 92DA      ST	R13,-Y
     1D3 92CA      ST	R12,-Y
     1D4 92BA      ST	R11,-Y
     1D5 92AA      ST	R10,-Y
     1D6 9508      RET
push_xgsetF000:
     1D7 937A      ST	R23,-Y
     1D8 936A      ST	R22,-Y
     1D9 935A      ST	R21,-Y
     1DA 934A      ST	R20,-Y
     1DB 9508      RET
pop_xgsetF000:
     1DC 9149      LD	R20,Y+
     1DD 9159      LD	R21,Y+
     1DE 9169      LD	R22,Y+
     1DF 9179      LD	R23,Y+
     1E0 9508      RET