📄 idct_kc.uc
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RF:13:IN:0:REG:11 = B:23 STAGE:-1 VAR: utmp DATATYPE: HALF2,
// OUT:ADDER_0: ISUB32 => ( tmp#20 == UNITRF_0_3[1] )
// OUT:MC_0: UC_DATA_IN => ( uc_const#0x76427642 == UCRF_0[15] )
// IN:MULTIPLIER_0: ( tmp#11, quant#4 ) = IMUL16( quant_scale == MULRF_0_0[3], utmp == MULRF_1_0[1] )
// OUT:INOUT_1: DATA_IN => ( utmp == MULRF_1_1[11] )
DEAD_REGS: { };
instr: 10
MC: OP: UC_DATA_IN LINE:-1 IMM:0x7d8a7d8a UCRF_WR:14 STAGES:-1,
U1: OP: AND LINE:83 STAGE:-1, // D:\working\im_apps\h264\idct_kc.i:83
U4: OP: IMUL16 LINE:59 STAGE:-1, // D:\working\im_apps\h264\idct_kc.i:59
B:14 = RF:4:OUT:0:REG:1 VAR: tmp#20 DATATYPE: INT,
U1:IN:0 = B:14 VAR: tmp#20 DATATYPE: INT,
B:15 = RF:8:OUT:0:REG:4 VAR: const#7 DATATYPE: ANYINT,
U1:IN:1 = B:15 VAR: const#7 DATATYPE: ANYINT,
B:30 = U1:OUT:0 INSTR_LOG:1|idx2#||0 VAR: idx2 DATATYPE: INT,
RF:5:IN:0:REG:1 = B:30 STAGE:-1 VAR: idx2 DATATYPE: INT,
RF:16:IN:0:REG:2 = B:30 STAGE:-1 VAR: idx2 DATATYPE: INT,
RF:17:IN:0:REG:2 = B:30 STAGE:-1 VAR: idx2 DATATYPE: INT,
B:20 = RF:11:OUT:0:REG:2 VAR: quant_scale DATATYPE: HALF2,
U4:IN:0 = B:20 VAR: quant_scale DATATYPE: HALF2,
B:21 = RF:13:OUT:0:REG:1 VAR: utmp DATATYPE: HALF2,
U4:IN:1 = B:21 VAR: utmp DATATYPE: HALF2,
B:34 = U4:OUT:0 INSTR_LOG:4|quant#0#||0 VAR: quant#0 DATATYPE: HALF2,
RF:10:IN:0:REG:1 = B:34 STAGE:-1 VAR: quant#0 DATATYPE: HALF2,
RF:13:IN:0:REG:1 = B:34 STAGE:-1 VAR: quant#0 DATATYPE: HALF2,
// IN:ADDER_1: ( idx2 ) = AND( tmp#20 == UNITRF_0_3[1], const#7 == UNITRF_1_2[4] )
// OUT:ADDER_1: AND => ( idx2 == UNITRF_0_4[1], idx2 == SPIDXRF_0[2], idx2 == SPIDXRF_1[2] )
// OUT:MC_0: UC_DATA_IN => ( uc_const#0x7d8a7d8a == UCRF_0[14] )
// IN:MULTIPLIER_1: ( tmp#13, quant#5 ) = IMUL16( quant_scale == MULRF_0_1[2], utmp == MULRF_1_1[1] )
// OUT:MULTIPLIER_1: IMUL16 => ( quant#0 == MULRF_0_0[1], quant#0 == MULRF_1_1[1] )
DEAD_REGS: { };
instr: 11
MC: OP: UC_DATA_IN LINE:-1 IMM:0x5a825a82 UCRF_WR:13 STAGES:-1,
U2: OP: ISUB32 LINE:84 STAGE:-1, // D:\working\im_apps\h264\idct_kc.i:84
B:16 = RF:5:OUT:0:REG:1 VAR: idx2 DATATYPE: INT,
U2:IN:0 = B:16 VAR: idx2 DATATYPE: INT,
B:17 = RF:9:OUT:0:REG:0 VAR: hw_const#1 DATATYPE: ANYINT,
U2:IN:1 = B:17 VAR: hw_const#1 DATATYPE: ANYINT,
B:34 = U4:OUT:0 INSTR_LOG:4|quant#3#||0 VAR: quant#3 DATATYPE: HALF2,
RF:12:IN:0:REG:1 = B:34 STAGE:-1 VAR: quant#3 DATATYPE: HALF2,
RF:11:IN:0:REG:1 = B:34 STAGE:-1 VAR: quant#3 DATATYPE: HALF2,
B:32 = U3:OUT:0 INSTR_LOG:4|quant#1#||0 VAR: quant#1 DATATYPE: HALF2,
RF:13:IN:0:REG:2 = B:32 STAGE:-1 VAR: quant#1 DATATYPE: HALF2,
RF:10:IN:0:REG:2 = B:32 STAGE:-1 VAR: quant#1 DATATYPE: HALF2,
// IN:ADDER_2: ( tmp#21 ) = ISUB32( idx2 == UNITRF_0_4[1], hw_const#1 == UNITRF_1_3[0] )
// OUT:MC_0: UC_DATA_IN => ( uc_const#0x5a825a82 == UCRF_0[13] )
// OUT:MULTIPLIER_1: IMUL16 => ( quant#3 == MULRF_1_0[1], quant#3 == MULRF_0_1[1] )
// OUT:MULTIPLIER_0: IMUL16 => ( quant#1 == MULRF_1_1[2], quant#1 == MULRF_0_0[2] )
DEAD_REGS: { };
instr: 12
MC: OP: UC_DATA_IN LINE:-1 IMM:0x187e187e UCRF_RD:12 UCRF_WR:12 STAGES:-1,
U7: OP: COMMUCDATA LINE:-1 STAGE:-1, // D:\working\im_apps\h264\idct_kc.i:-1
B:31 = U2:OUT:0 INSTR_LOG:2|tmp#21#||0 VAR: tmp#21 DATATYPE: INT,
RF:3:IN:0:REG:1 = B:31 STAGE:-1 VAR: tmp#21 DATATYPE: INT,
B:9 = RF:15:OUT:0:REG:0 VAR: hw_const#8 DATATYPE: ANYINT,
U7:IN:1 = B:9 VAR: hw_const#8 DATATYPE: ANYINT,
B:8 = RF:2:OUT:0:REG:0 VAR: hw_const#0 DATATYPE: ANYINT,
U7:IN:0 = B:8 VAR: hw_const#0 DATATYPE: ANYINT,
B:27 = U7:OUT:0 INSTR_LOG:1|const#0xff00ff00#||0 VAR: const#0xff00ff00 DATATYPE: ANYINT,
RF:7:IN:0:REG:2 = B:27 STAGE:-1 VAR: const#0xff00ff00 DATATYPE: ANYINT,
RF:14:IN:0:REG:1 = B:27 STAGE:-1 VAR: const#0xff00ff00 DATATYPE: ANYINT,
RF:9:IN:0:REG:2 = B:27 STAGE:-1 VAR: const#0xff00ff00 DATATYPE: ANYINT,
RF:8:IN:0:REG:2 = B:27 STAGE:-1 VAR: const#0xff00ff00 DATATYPE: ANYINT,
RF:2:IN:0:REG:1 = B:27 STAGE:-1 VAR: const#0xff00ff00 DATATYPE: ANYINT,
B:32 = U3:OUT:0 INSTR_LOG:4|quant#4#||0 VAR: quant#4 DATATYPE: HALF2,
RF:12:IN:0:REG:2 = B:32 STAGE:-1 VAR: quant#4 DATATYPE: HALF2,
RF:13:IN:0:REG:3 = B:32 STAGE:-1 VAR: quant#4 DATATYPE: HALF2,
// OUT:ADDER_2: ISUB32 => ( tmp#21 == UNITRF_0_2[1] )
// OUT:MC_0: UC_DATA_IN => ( uc_const#0x187e187e == UCRF_0[12] )
// IN:COMM_SCHED_0: ( const#0xff00ff00 ) = COMMUCDATA( hw_const#8 == PERMRF_0[0], hw_const#0 == UNITRF_0_1[0], uc_const#0xff00ff00 == UCRF_0[12] )
// OUT:COMM_SCHED_0: COMMUCDATA => ( const#0xff00ff00 == UNITRF_1_1[2], const#0xff00ff00 == UNITRF_CID_0[1], const#0xff00ff00 == UNITRF_1_3[2], const#0xff00ff00 == UNITRF_1_2[2], const#0xff00ff00 == UNITRF_0_1[1] )
// OUT:MULTIPLIER_0: IMUL16 => ( quant#4 == MULRF_1_0[2], quant#4 == MULRF_1_1[3] )
DEAD_REGS: { };
instr: 13
MC: OP: UC_DATA_IN LINE:-1 IMM:0x22a322a3 UCRF_RD:11 UCRF_WR:11 STAGES:-1,
U0: OP: AND LINE:84 STAGE:-1, // D:\working\im_apps\h264\idct_kc.i:84
U7: OP: COMMUCDATA LINE:-1 STAGE:-1, // D:\working\im_apps\h264\idct_kc.i:-1
U3: OP: IMUL16 LINE:61 STAGE:-1, // D:\working\im_apps\h264\idct_kc.i:61
B:12 = RF:3:OUT:0:REG:1 VAR: tmp#21 DATATYPE: INT,
U0:IN:0 = B:12 VAR: tmp#21 DATATYPE: INT,
B:13 = RF:7:OUT:0:REG:4 VAR: const#7 DATATYPE: ANYINT,
U0:IN:1 = B:13 VAR: const#7 DATATYPE: ANYINT,
B:29 = U0:OUT:0 INSTR_LOG:1|idx3#||0 VAR: idx3 DATATYPE: INT,
RF:4:IN:0:REG:1 = B:29 STAGE:-1 VAR: idx3 DATATYPE: INT,
RF:16:IN:0:REG:3 = B:29 STAGE:-1 VAR: idx3 DATATYPE: INT,
RF:17:IN:0:REG:3 = B:29 STAGE:-1 VAR: idx3 DATATYPE: INT,
B:9 = RF:15:OUT:0:REG:0 VAR: hw_const#8 DATATYPE: ANYINT,
U7:IN:1 = B:9 VAR: hw_const#8 DATATYPE: ANYINT,
B:8 = RF:2:OUT:0:REG:0 VAR: hw_const#0 DATATYPE: ANYINT,
U7:IN:0 = B:8 VAR: hw_const#0 DATATYPE: ANYINT,
B:27 = U7:OUT:0 INSTR_LOG:1|const#0xff00ff#||0 VAR: const#0xff00ff DATATYPE: ANYINT,
RF:5:IN:0:REG:1 = B:27 STAGE:-1 VAR: const#0xff00ff DATATYPE: ANYINT,
RF:15:IN:0:REG:1 = B:27 STAGE:-1 VAR: const#0xff00ff DATATYPE: ANYINT,
RF:3:IN:0:REG:1 = B:27 STAGE:-1 VAR: const#0xff00ff DATATYPE: ANYINT,
RF:10:IN:0:REG:4 = B:27 STAGE:-1 VAR: const#0xff00ff DATATYPE: ANYINT,
RF:14:IN:0:REG:2 = B:27 STAGE:-1 VAR: const#0xff00ff DATATYPE: ANYINT,
B:18 = RF:10:OUT:0:REG:3 VAR: quant_scale DATATYPE: HALF2,
U3:IN:0 = B:18 VAR: quant_scale DATATYPE: HALF2,
B:19 = RF:12:OUT:0:REG:3 VAR: utmp DATATYPE: HALF2,
U3:IN:1 = B:19 VAR: utmp DATATYPE: HALF2,
B:34 = U4:OUT:0 INSTR_LOG:4|quant#5#||0 VAR: quant#5 DATATYPE: HALF2,
RF:12:IN:0:REG:3 = B:34 STAGE:-1 VAR: quant#5 DATATYPE: HALF2,
RF:13:IN:0:REG:4 = B:34 STAGE:-1 VAR: quant#5 DATATYPE: HALF2,
// IN:ADDER_0: ( idx3 ) = AND( tmp#21 == UNITRF_0_2[1], const#7 == UNITRF_1_1[4] )
// OUT:ADDER_0: AND => ( idx3 == UNITRF_0_3[1], idx3 == SPIDXRF_0[3], idx3 == SPIDXRF_1[3] )
// OUT:MC_0: UC_DATA_IN => ( uc_const#0x22a322a3 == UCRF_0[11] )
// IN:COMM_SCHED_0: ( const#0xff00ff ) = COMMUCDATA( hw_const#8 == PERMRF_0[0], hw_const#0 == UNITRF_0_1[0], uc_const#0xff00ff == UCRF_0[11] )
// OUT:COMM_SCHED_0: COMMUCDATA => ( const#0xff00ff == UNITRF_0_4[1], const#0xff00ff == PERMRF_0[1], const#0xff00ff == UNITRF_0_2[1], const#0xff00ff == MULRF_0_0[4], const#0xff00ff == UNITRF_CID_0[2] )
// IN:MULTIPLIER_0: ( tmp#15, quant#6 ) = IMUL16( quant_scale == MULRF_0_0[3], utmp == MULRF_1_0[3] )
// OUT:MULTIPLIER_1: IMUL16 => ( quant#5 == MULRF_1_0[3], quant#5 == MULRF_1_1[4] )
DEAD_REGS: { };
instr: 14
MC: OP: UC_DATA_IN LINE:-1 IMM:0x539f539f UCRF_RD:10 UCRF_WR:10 STAGES:-1,
U1: OP: ISUB32 LINE:85 STAGE:-1, // D:\working\im_apps\h264\idct_kc.i:85
U7: OP: COMMUCDATA LINE:-1 STAGE:-1, // D:\working\im_apps\h264\idct_kc.i:-1
B:14 = RF:4:OUT:0:REG:1 VAR: idx3 DATATYPE: INT,
U1:IN:0 = B:14 VAR: idx3 DATATYPE: INT,
B:15 = RF:8:OUT:0:REG:0 VAR: hw_const#1 DATATYPE: ANYINT,
U1:IN:1 = B:15 VAR: hw_const#1 DATATYPE: ANYINT,
B:9 = RF:15:OUT:0:REG:0 VAR: hw_const#8 DATATYPE: ANYINT,
U7:IN:1 = B:9 VAR: hw_const#8 DATATYPE: ANYINT,
B:8 = RF:2:OUT:0:REG:0 VAR: hw_const#0 DATATYPE: ANYINT,
U7:IN:0 = B:8 VAR: hw_const#0 DATATYPE: ANYINT,
B:27 = U7:OUT:0 INSTR_LOG:1|H#||0 VAR: H DATATYPE: HALF2,
RF:4:IN:0:REG:1 = B:27 STAGE:-1 VAR: H DATATYPE: HALF2,
RF:15:IN:0:REG:2 = B:27 STAGE:-1 VAR: H DATATYPE: HALF2,
RF:14:IN:0:REG:3 = B:27 STAGE:-1 VAR: H DATATYPE: HALF2,
RF:13:IN:0:REG:5 = B:27 STAGE:-1 VAR: H DATATYPE: HALF2,
RF:3:IN:0:REG:2 = B:27 STAGE:-1 VAR: H DATATYPE: HALF2,
RF:6:IN:0:REG:1 = B:27 STAGE:-1 VAR: H DATATYPE: HALF2,
RF:5:IN:0:REG:2 = B:27 STAGE:-1 VAR: H DATATYPE: HALF2,
RF:12:IN:0:REG:4 = B:27 STAGE:-1 VAR: H DATATYPE: HALF2,
// IN:ADDER_1: ( tmp#22 ) = ISUB32( idx3 == UNITRF_0_3[1], hw_const#1 == UNITRF_1_2[0] )
// OUT:MC_0: UC_DATA_IN => ( uc_const#0x539f539f == UCRF_0[10] )
// IN:COMM_SCHED_0: ( H ) = COMMUCDATA( hw_const#8 == PERMRF_0[0], hw_const#0 == UNITRF_0_1[0], uc_const#0x3ff83ff8 == UCRF_0[10] )
// OUT:COMM_SCHED_0: COMMUCDATA => ( H == UNITRF_0_3[1], H == PERMRF_0[2], H == UNITRF_CID_0[3], H == MULRF_1_1[5], H == UNITRF_0_2[2], H == UNITRF_1_0[1], H == UNITRF_0_4[2], H == MULRF_1_0[4] )
DEAD_REGS: { };
instr: 15
MC: OP: UC_DATA_IN LINE:-1 IMM:0x2d412d41 UCRF_RD:9 UCRF_WR:9 STAGES:-1,
U7: OP: COMMUCDATA LINE:-1 STAGE:-1, // D:\working\im_apps\h264\idct_kc.i:-1
B:30 = U1:OUT:0 INSTR_LOG:2|tmp#22#||0 VAR: tmp#22 DATATYPE: INT,
RF:5:IN:0:REG:3 = B:30 STAGE:-1 VAR: tmp#22 DATATYPE: INT,
B:9 = RF:15:OUT:0:REG:0 VAR: hw_const#8 DATATYPE: ANYINT,
U7:IN:1 = B:9 VAR: hw_const#8 DATATYPE: ANYINT,
B:8 = RF:2:OUT:0:REG:0 VAR: hw_const#0 DATATYPE: ANYINT,
U7:IN:0 = B:8 VAR: hw_const#0 DATATYPE: ANYINT,
B:27 = U7:OUT:0 INSTR_LOG:1|L#||0 VAR: L DATATYPE: HALF2,
RF:7:IN:0:REG:3 = B:27 STAGE:-1 VAR: L DATATYPE: HALF2,
RF:6:IN:0:REG:2 = B:27 STAGE:-1 VAR: L DATATYPE: HALF2,
RF:14:IN:0:REG:4 = B:27 STAGE:-1 VAR: L DATATYPE: HALF2,
RF:8:IN:0:REG:3 = B:27 STAGE:-1 VAR: L DATATYPE: HALF2,
RF:13:IN:0:REG:6 = B:27 STAGE:-1 VAR: L DATATYPE: HALF2,
RF:9:IN:0:REG:3 = B:27 STAGE:-1 VAR: L DATATYPE: HALF2,
RF:12:IN:0:REG:5 = B:27 STAGE:-1 VAR: L DATATYPE: HALF2,
// OUT:ADDER_1: ISUB32 => ( tmp#22 == UNITRF_0_4[3] )
// OUT:MC_0: UC_DATA_IN => ( uc_const#0x2d412d41 == UCRF_0[9] )
// IN:COMM_SCHED_0: ( L ) = COMMUCDATA( hw_const#8 == PERMRF_0[0], hw_const#0 == UNITRF_0_1[0], uc_const#0xc000c000 == UCRF_0[9] )
// OUT:COMM_SCHED_0: COMMUCDATA => ( L == UNITRF_1_1[3], L == UNITRF_1_0[2], L == UNITRF_CID_0[4], L == UNITRF_1_2[3], L == MULRF_1_1[6], L == UNITRF_1_3[3], L == MULRF_1_0[5] )
DEAD_REGS: { };
instr: 16
MC: OP: CHK_EOS LINE:95 UCRF_RD:19 STR_ID:0,
U2: OP: AND LINE:85 STAGE:-1, // D:\working\im_apps\h264\idct_kc.i:85
U7: OP: COMMUCDATA LINE:-1 STAGE:-1, // D:\working\im_apps\h264\idct_kc.i:-1
B:16 = RF:5:OUT:0:REG:3 VAR: tmp#22 DATATYPE: INT,
U2:IN:0 = B:16 VAR: tmp#22 DATATYPE: INT,
B:17 = RF:9:OUT:0:REG:4 VAR: const#7 DATATYPE: ANYINT,
U2:IN:1 = B:17 VAR: const#7 DATATYPE: ANYINT,
B:31 = U2:OUT:0 INSTR_LOG:1|idx4#||0 VAR: idx4 DATATYPE: INT,
RF:3:IN:0:REG:3 = B:31 STAGE:-1 VAR: idx4 DATATYPE: INT,
RF:16:IN:0:REG:4 = B:31 STAGE:-1 VAR: idx4 DATATYPE: INT,
RF:17:IN:0:REG:4 = B:31 STAGE:-1 VAR: idx4 DATATYPE: INT,
B:9 = RF:15:OUT:0:REG:0 VAR: hw_const#8 DATATYPE: ANYINT,
U7:IN:1 = B:9 VAR: hw_const#8 DATATYPE: ANYINT,
B:8 = RF:2:OUT:0:REG:0 VAR: hw_const#0 DATATYPE: ANYINT,
U7:IN:0 = B:8 VAR: hw_const#0 DATATYPE: ANYINT,
B:27 = U7:OUT:0 INSTR_LOG:1|K#7#||0 VAR: K#7 DATATYPE: HALF2,
RF:13:IN:0:REG:7 = B:27 STAGE:-1 VAR: K#7 DATATYPE: HALF2,
B:32 = U3:OUT:0 INSTR_LOG:4|quant#6#||0 VAR: quant#6 DATATYPE: HALF2,
RF:12:IN:0:REG:6 = B:32 STAGE:-1 VAR: quant#6 DATATYPE: HALF2,
RF:4:IN:0:REG:3 = B:32 STAGE:-1 VAR: quant#6 DATATYPE: HALF2,
// IN:ADDER_2: ( idx4 ) = AND( tmp#22 == UNITRF_0_4[3], const#7 == UNITRF_1_3[4] )
// OUT:ADDER_2: AND => ( idx4 == UNITRF_0_2[3], idx4 == SPIDXRF_0[4], idx4 == SPIDXRF_1[4] )
// IN:COMM_SCHED_0: ( K#7 ) = COMMUCDATA( hw_const#8 == PERMRF_0[0], hw_const#0 == UNITRF_0_1[0], uc_const#0x18f918f9 == UCRF_0[19] )
// OUT:COMM_SCHED_0: COMMUCDATA => ( K#7 == MULRF_1_1[7] )
// OUT:MULTIPLIER_0: IMUL16 => ( quant#6 == MULRF_1_0[6], quant#6 == UNITRF_0_3[3] )
DEAD_REGS: { };
instr: 17
MC: OP: NONE LINE:-1 UCRF_RD:18 UCONDRF_WR:1 STAGES:-1,
U0: OP: ISUB32 LINE:86 STAGE:-1, // D:\working\im_apps\h264\idct_kc.i:86
U7: OP: COMMUCDATA LINE:-1 STAGE:-1, // D:\working\im_apps\h264\idct_kc.i:-1
B:12 = RF:3:OUT:0:REG:3 VAR: idx4 DATATYPE: INT,
U0:IN:0 = B:12 VAR: idx4 DATATYPE: INT,
B:13 = RF:7:OUT:0:REG:0 VAR: hw_const#1 DATATYPE: ANYINT,
U0:IN:1 = B:13 VAR: hw_const#1 DATATYPE: ANYINT,
B:9 = RF:15:OUT:0:REG:0 VAR: hw_const#8 DATATYPE: ANYINT,
U7:IN:1 = B:9 VAR: hw_const#8 DATATYPE: ANYINT,
B:8 = RF:2:OUT:0:REG:0 VAR: hw_const#0 DATATYPE: ANYINT,
U7:IN:0 = B:8 VAR: hw_const#0 DATATYPE: ANYINT,
B:27 = U7:OUT:0 INSTR_LOG:1|K#6#||0 VAR: K#6 DATATYPE: HALF2,
RF:12:IN:0:REG:7 = B:27 STAGE:-1 VAR: K#6 DATATYPE: HALF2,
RF:13:IN:0:REG:8 = B:27 STAGE:-1 VAR: K#6 DATATYPE: HALF2,
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