dct_kc.uc

H.264完整的C语言代码和DCT的代码

// microassembly program:  D:\working\im_apps\h264\dct_kc.i
// machine description:    gold8.md
// KERNELDEF: instrs: 65 params: i 0 i 1 o 2 r 1 blocks: 3 25 2  40 1  0 -1  SWP_block_depth: 3 -1 4 -1 func_name: dct block_io_counts: 3 3 0 0 8 0 1 8 0 8 0 0 0 0 
PARAMS: SCHED_METHOD: COS UC_BITS: 497
         NUM_INPUT_STREAMS: 2 NUM_OUTPUT_STREAMS: 1

// RESULTS: -rs 0, -rf 0
//   block: 0 best: 22 achieved: 25 (lines: 1-116, instrs: 0-24)
//   block: 1 best: 36 achieved: 40 (lines: 117-290, instrs: 25-64)
//   block: 2 best: 0 achieved: 0 (lines: none, instrs: none)

instr: 0
    MC: OP: NONE LINE:-1,
    U5: OP: SELECT LINE:-1 STAGE:-1, // D:\working\im_apps\h264\dct_kc.i:-1
    B:39 = RF:18:OUT:2:REG:0 VAR: hw_const#0 DATATYPE: ANYINT,
    U5:IN:2 = B:39 VAR: hw_const#0 DATATYPE: ANYINT,
    B:11 = RF:14:OUT:0:REG:0 VAR: cluster#id DATATYPE: ANYINT,
    U5:IN:1 = B:11 VAR: cluster#id DATATYPE: ANYINT,
    B:28 = U5:OUT:0 INSTR_LOG:1|cluster#id#||0 VAR: cluster#id DATATYPE: ANYINT,
    RF:4:IN:0:REG:1 = B:28 STAGE:-1 VAR: cluster#id DATATYPE: ANYINT,
    //  IN:DIVIDER_0: ( cluster#id ) = SELECT( hw_const#0 == CCRF_0[0], cluster#id == UNITRF_CID_0[0] )
    // OUT:DIVIDER_0: SELECT => ( cluster#id == UNITRF_0_3[1] )
    DEAD_REGS: {  };
instr: 1
    MC: OP: NONE LINE:-1,
    U5: OP: NSELECT LINE:-1 STAGE:-1, // D:\working\im_apps\h264\dct_kc.i:-1
    U1: OP: ISUB32 LINE:108 STAGE:-1, // D:\working\im_apps\h264\dct_kc.i:108
    B:39 = RF:18:OUT:2:REG:0 VAR: hw_const#0 DATATYPE: ANYINT,
    U5:IN:2 = B:39 VAR: hw_const#0 DATATYPE: ANYINT,
    B:10 = RF:6:OUT:0:REG:0 VAR: hw_const#1 DATATYPE: ANYINT,
    U5:IN:0 = B:10 VAR: hw_const#1 DATATYPE: ANYINT,
    B:28 = U5:OUT:0 INSTR_LOG:1|const#1#||0 VAR: const#1 DATATYPE: ANYINT,
    RF:3:IN:0:REG:1 = B:28 STAGE:-1 VAR: const#1 DATATYPE: ANYINT,
    B:14 = RF:4:OUT:0:REG:1 VAR: cluster#id DATATYPE: ANYINT,
    U1:IN:0 = B:14 VAR: cluster#id DATATYPE: ANYINT,
    B:15 = RF:8:OUT:0:REG:0 VAR: hw_const#1 DATATYPE: ANYINT,
    U1:IN:1 = B:15 VAR: hw_const#1 DATATYPE: ANYINT,
    //  IN:DIVIDER_0: ( const#1 ) = NSELECT( hw_const#0 == CCRF_0[0], hw_const#1 == UNITRF_1_0[0] )
    // OUT:DIVIDER_0: NSELECT => ( const#1 == UNITRF_0_2[1] )
    //  IN:ADDER_1: ( tmp#31 ) = ISUB32( cluster#id == UNITRF_0_3[1], hw_const#1 == UNITRF_1_2[0] )
    DEAD_REGS: {  };
instr: 2
    MC: OP: NONE LINE:-1,
    U0: OP: SHIFT32 LINE:-1 STAGE:-1, // D:\working\im_apps\h264\dct_kc.i:-1
    U4: OP: SELECT LINE:-1 STAGE:-1, // D:\working\im_apps\h264\dct_kc.i:-1
    B:12 = RF:3:OUT:0:REG:1 VAR: const#1 DATATYPE: ANYINT,
    U0:IN:0 = B:12 VAR: const#1 DATATYPE: ANYINT,
    B:13 = RF:7:OUT:0:REG:0 VAR: hw_const#1 DATATYPE: ANYINT,
    U0:IN:1 = B:13 VAR: hw_const#1 DATATYPE: ANYINT,
    B:29 = U0:OUT:0 INSTR_LOG:1|const#2#||0 VAR: const#2 DATATYPE: ANYINT,
    RF:4:IN:0:REG:1 = B:29 STAGE:-1 VAR: const#2 DATATYPE: ANYINT,
    RF:9:IN:0:REG:1 = B:29 STAGE:-1 VAR: const#2 DATATYPE: ANYINT,
    RF:7:IN:0:REG:1 = B:29 STAGE:-1 VAR: const#2 DATATYPE: ANYINT,
    RF:8:IN:0:REG:1 = B:29 STAGE:-1 VAR: const#2 DATATYPE: ANYINT,
    B:30 = U1:OUT:0 INSTR_LOG:2|tmp#31#||0 VAR: tmp#31 DATATYPE: INT,
    RF:6:IN:0:REG:1 = B:30 STAGE:-1 VAR: tmp#31 DATATYPE: INT,
    B:44 = RF:18:OUT:7:REG:0 VAR: hw_const#0 DATATYPE: ANYINT,
    U4:IN:2 = B:44 VAR: hw_const#0 DATATYPE: ANYINT,
    B:21 = RF:13:OUT:0:REG:0 VAR: hw_const#1 DATATYPE: ANYINT,
    U4:IN:1 = B:21 VAR: hw_const#1 DATATYPE: ANYINT,
    B:35 = U4:OUT:1 INSTR_LOG:1|const#1#||1 VAR: const#1 DATATYPE: ANYINT,
    RF:3:IN:0:REG:1 = B:35 STAGE:-1 VAR: const#1 DATATYPE: ANYINT,
    RF:5:IN:0:REG:1 = B:35 STAGE:-1 VAR: const#1 DATATYPE: ANYINT,
    //  IN:ADDER_0: ( const#2 ) = SHIFT32( const#1 == UNITRF_0_2[1], hw_const#1 == UNITRF_1_1[0] )
    // OUT:ADDER_0: SHIFT32 => ( const#2 == UNITRF_0_3[1], const#2 == UNITRF_1_3[1], const#2 == UNITRF_1_1[1], const#2 == UNITRF_1_2[1] )
    // OUT:ADDER_1: ISUB32 => ( tmp#31 == UNITRF_1_0[1] )
    //  IN:MULTIPLIER_1: ( const#1 ) = SELECT( hw_const#0 == CCRF_0[0], hw_const#1 == MULRF_1_1[0] )
    // OUT:MULTIPLIER_1: SELECT => ( const#1 == UNITRF_0_2[1], const#1 == UNITRF_0_4[1] )
    DEAD_REGS: {  };
instr: 3
    MC: OP: UC_DATA_IN LINE:-1 IMM:0x52035203 UCRF_WR:15 STAGES:-1,
    U2: OP: SHIFT32 LINE:-1 STAGE:-1, // D:\working\im_apps\h264\dct_kc.i:-1
    U1: OP: OR LINE:-1 STAGE:-1, // D:\working\im_apps\h264\dct_kc.i:-1
    U5: OP: NSELECT LINE:-1 STAGE:-1, // D:\working\im_apps\h264\dct_kc.i:-1
    B:16 = RF:5:OUT:0:REG:1 VAR: const#1 DATATYPE: ANYINT,
    U2:IN:0 = B:16 VAR: const#1 DATATYPE: ANYINT,
    B:17 = RF:9:OUT:0:REG:1 VAR: const#2 DATATYPE: ANYINT,
    U2:IN:1 = B:17 VAR: const#2 DATATYPE: ANYINT,
    B:31 = U2:OUT:0 INSTR_LOG:1|const#4#||0 VAR: const#4 DATATYPE: ANYINT,
    RF:3:IN:0:REG:2 = B:31 STAGE:-1 VAR: const#4 DATATYPE: ANYINT,
    B:15 = RF:8:OUT:0:REG:0 VAR: hw_const#1 DATATYPE: ANYINT,
    U1:IN:1 = B:15 VAR: hw_const#1 DATATYPE: ANYINT,
    B:14 = RF:4:OUT:0:REG:1 VAR: const#2 DATATYPE: ANYINT,
    U1:IN:0 = B:14 VAR: const#2 DATATYPE: ANYINT,
    B:30 = U1:OUT:0 INSTR_LOG:1|const#3#||0 VAR: const#3 DATATYPE: ANYINT,
    RF:7:IN:0:REG:2 = B:30 STAGE:-1 VAR: const#3 DATATYPE: ANYINT,
    B:39 = RF:18:OUT:2:REG:0 VAR: hw_const#0 DATATYPE: ANYINT,
    U5:IN:2 = B:39 VAR: hw_const#0 DATATYPE: ANYINT,
    B:10 = RF:6:OUT:0:REG:1 VAR: tmp#31 DATATYPE: INT,
    U5:IN:0 = B:10 VAR: tmp#31 DATATYPE: INT,
    B:28 = U5:OUT:0 INSTR_LOG:1|tmp#31#||0 VAR: tmp#31 DATATYPE: INT,
    RF:8:IN:0:REG:2 = B:28 STAGE:-1 VAR: tmp#31 DATATYPE: INT,
    //  IN:ADDER_2: ( const#4 ) = SHIFT32( const#1 == UNITRF_0_4[1], const#2 == UNITRF_1_3[1] )
    // OUT:ADDER_2: SHIFT32 => ( const#4 == UNITRF_0_2[2] )
    //  IN:ADDER_1: ( const#3 ) = OR( hw_const#1 == UNITRF_1_2[0], const#2 == UNITRF_0_3[1] )
    // OUT:ADDER_1: OR => ( const#3 == UNITRF_1_1[2] )
    // OUT:MC_0: UC_DATA_IN => ( uc_const#0x52035203 == UCRF_0[15] )
    //  IN:DIVIDER_0: ( tmp#31 ) = NSELECT( hw_const#0 == CCRF_0[0], tmp#31 == UNITRF_1_0[1] )
    // OUT:DIVIDER_0: NSELECT => ( tmp#31 == UNITRF_1_2[2] )
    DEAD_REGS: {  };
instr: 4
    MC: OP: UC_DATA_IN LINE:-1 IMM:0x29cf29cf UCRF_WR:14 STAGES:-1,
    U0: OP: OR LINE:-1 STAGE:-1, // D:\working\im_apps\h264\dct_kc.i:-1
    B:13 = RF:7:OUT:0:REG:2 VAR: const#3 DATATYPE: ANYINT,
    U0:IN:1 = B:13 VAR: const#3 DATATYPE: ANYINT,
    B:12 = RF:3:OUT:0:REG:2 VAR: const#4 DATATYPE: ANYINT,
    U0:IN:0 = B:12 VAR: const#4 DATATYPE: ANYINT,
    B:29 = U0:OUT:0 INSTR_LOG:1|const#7#||0 VAR: const#7 DATATYPE: ANYINT,
    RF:4:IN:0:REG:1 = B:29 STAGE:-1 VAR: const#7 DATATYPE: ANYINT,
    RF:7:IN:0:REG:2 = B:29 STAGE:-1 VAR: const#7 DATATYPE: ANYINT,
    RF:9:IN:0:REG:3 = B:29 STAGE:-1 VAR: const#7 DATATYPE: ANYINT,
    RF:8:IN:0:REG:3 = B:29 STAGE:-1 VAR: const#7 DATATYPE: ANYINT,
    //  IN:ADDER_0: ( const#7 ) = OR( const#3 == UNITRF_1_1[2], const#4 == UNITRF_0_2[2] )
    // OUT:ADDER_0: OR => ( const#7 == UNITRF_0_3[1], const#7 == UNITRF_1_1[2], const#7 == UNITRF_1_3[3], const#7 == UNITRF_1_2[3] )
    // OUT:MC_0: UC_DATA_IN => ( uc_const#0x29cf29cf == UCRF_0[14] )
    DEAD_REGS: {  };
instr: 5
    MC: OP: UC_DATA_IN LINE:-1 IMM:0x1ccd1ccd UCRF_WR:13 STAGES:-1,
    U1: OP: AND LINE:108 STAGE:-1, // D:\working\im_apps\h264\dct_kc.i:108
    B:15 = RF:8:OUT:0:REG:2 VAR: tmp#31 DATATYPE: INT,
    U1:IN:1 = B:15 VAR: tmp#31 DATATYPE: INT,
    B:14 = RF:4:OUT:0:REG:1 VAR: const#7 DATATYPE: ANYINT,
    U1:IN:0 = B:14 VAR: const#7 DATATYPE: ANYINT,
    B:30 = U1:OUT:0 INSTR_LOG:1|idx1#||0 VAR: idx1 DATATYPE: INT,
    RF:5:IN:0:REG:1 = B:30 STAGE:-1 VAR: idx1 DATATYPE: INT,
    RF:16:IN:0:REG:1 = B:30 STAGE:-1 VAR: idx1 DATATYPE: INT,
    RF:17:IN:0:REG:1 = B:30 STAGE:-1 VAR: idx1 DATATYPE: INT,
    //  IN:ADDER_1: ( idx1 ) = AND( tmp#31 == UNITRF_1_2[2], const#7 == UNITRF_0_3[1] )
    // OUT:ADDER_1: AND => ( idx1 == UNITRF_0_4[1], idx1 == SPIDXRF_0[1], idx1 == SPIDXRF_1[1] )
    // OUT:MC_0: UC_DATA_IN => ( uc_const#0x1ccd1ccd == UCRF_0[13] )
    DEAD_REGS: {  };
instr: 6
    MC: OP: UC_DATA_IN LINE:-1 IMM:0x133e133e UCRF_WR:12 STAGES:-1,
    U2: OP: ISUB32 LINE:109 STAGE:-1, // D:\working\im_apps\h264\dct_kc.i:109
    B:16 = RF:5:OUT:0:REG:1 VAR: idx1 DATATYPE: INT,
    U2:IN:0 = B:16 VAR: idx1 DATATYPE: INT,
    B:17 = RF:9:OUT:0:REG:0 VAR: hw_const#1 DATATYPE: ANYINT,
    U2:IN:1 = B:17 VAR: hw_const#1 DATATYPE: ANYINT,
    //  IN:ADDER_2: ( tmp#32 ) = ISUB32( idx1 == UNITRF_0_4[1], hw_const#1 == UNITRF_1_3[0] )
    // OUT:MC_0: UC_DATA_IN => ( uc_const#0x133e133e == UCRF_0[12] )
    DEAD_REGS: {  };
instr: 7
    MC: OP: UC_DATA_IN LINE:-1 IMM:0x11511151 UCRF_WR:11 STAGES:-1,
    B:31 = U2:OUT:0 INSTR_LOG:2|tmp#32#||0 VAR: tmp#32 DATATYPE: INT,
    RF:3:IN:0:REG:2 = B:31 STAGE:-1 VAR: tmp#32 DATATYPE: INT,
    B:23 = IN:1 STAGE:-1 LINE:67 VAR: utmp DATATYPE: UHALF2,
    RF:13:IN:0:REG:1 = B:23 STAGE:-1 VAR: utmp DATATYPE: UHALF2,
    // OUT:ADDER_2: ISUB32 => ( tmp#32 == UNITRF_0_2[2] )
    // OUT:MC_0: UC_DATA_IN => ( uc_const#0x11511151 == UCRF_0[11] )
    // OUT:INOUT_1: DATA_IN => ( utmp == MULRF_1_1[1] )
    DEAD_REGS: {  };
instr: 8
    MC: OP: UC_DATA_IN LINE:-1 IMM:0x10501050 UCRF_WR:9 STAGES:-1,
    U0: OP: AND LINE:109 STAGE:-1, // D:\working\im_apps\h264\dct_kc.i:109
    B:12 = RF:3:OUT:0:REG:2 VAR: tmp#32 DATATYPE: INT,
    U0:IN:0 = B:12 VAR: tmp#32 DATATYPE: INT,
    B:13 = RF:7:OUT:0:REG:2 VAR: const#7 DATATYPE: ANYINT,
    U0:IN:1 = B:13 VAR: const#7 DATATYPE: ANYINT,
    B:29 = U0:OUT:0 INSTR_LOG:1|idx2#||0 VAR: idx2 DATATYPE: INT,
    RF:4:IN:0:REG:1 = B:29 STAGE:-1 VAR: idx2 DATATYPE: INT,
    RF:16:IN:0:REG:2 = B:29 STAGE:-1 VAR: idx2 DATATYPE: INT,
    RF:17:IN:0:REG:2 = B:29 STAGE:-1 VAR: idx2 DATATYPE: INT,
    B:23 = IN:1 STAGE:-1 LINE:69 VAR: utmp DATATYPE: UHALF2,
    RF:10:IN:0:REG:2 = B:23 STAGE:-1 VAR: utmp DATATYPE: UHALF2,
    //  IN:ADDER_0: ( idx2 ) = AND( tmp#32 == UNITRF_0_2[2], const#7 == UNITRF_1_1[2] )
    // OUT:ADDER_0: AND => ( idx2 == UNITRF_0_3[1], idx2 == SPIDXRF_0[2], idx2 == SPIDXRF_1[2] )
    // OUT:MC_0: UC_DATA_IN => ( uc_const#0x10501050 == UCRF_0[9] )
    // OUT:INOUT_1: DATA_IN => ( utmp == MULRF_0_0[2] )
    DEAD_REGS: {  };
instr: 9
    MC: OP: UC_DATA_IN LINE:-1 IMM:0x16a116a1 UCRF_WR:19 STAGES:-1,
    U1: OP: ISUB32 LINE:110 STAGE:-1, // D:\working\im_apps\h264\dct_kc.i:110
    B:14 = RF:4:OUT:0:REG:1 VAR: idx2 DATATYPE: INT,
    U1:IN:0 = B:14 VAR: idx2 DATATYPE: INT,
    B:15 = RF:8:OUT:0:REG:0 VAR: hw_const#1 DATATYPE: ANYINT,
    U1:IN:1 = B:15 VAR: hw_const#1 DATATYPE: ANYINT,
    B:23 = IN:1 STAGE:-1 LINE:71 VAR: utmp DATATYPE: UHALF2,
    RF:11:IN:0:REG:2 = B:23 STAGE:-1 VAR: utmp DATATYPE: UHALF2,
    //  IN:ADDER_1: ( tmp#33 ) = ISUB32( idx2 == UNITRF_0_3[1], hw_const#1 == UNITRF_1_2[0] )
    // OUT:MC_0: UC_DATA_IN => ( uc_const#0x16a116a1 == UCRF_0[19] )
    // OUT:INOUT_1: DATA_IN => ( utmp == MULRF_0_1[2] )
    DEAD_REGS: {  };
instr: 10
    MC: OP: UC_DATA_IN LINE:-1 IMM:0x22a322a3 UCRF_RD:1 UCRF_WR:18 STAGES:-1,
    U7: OP: COMMUCDATA LINE:60 STAGE:-1, // D:\working\im_apps\h264\dct_kc.i:60
    B:30 = U1:OUT:0 INSTR_LOG:2|tmp#33#||0 VAR: tmp#33 DATATYPE: INT,
    RF:5:IN:0:REG:1 = B:30 STAGE:-1 VAR: tmp#33 DATATYPE: INT,
    B:23 = IN:1 STAGE:-1 LINE:73 VAR: utmp DATATYPE: UHALF2,
    RF:10:IN:0:REG:1 = B:23 STAGE:-1 VAR: utmp DATATYPE: UHALF2,
    B:9 = RF:15:OUT:0:REG:0 VAR: hw_const#8 DATATYPE: ANYINT,
    U7:IN:1 = B:9 VAR: hw_const#8 DATATYPE: ANYINT,
    B:8 = RF:2:OUT:0:REG:0 VAR: hw_const#0 DATATYPE: ANYINT,
    U7:IN:0 = B:8 VAR: hw_const#0 DATATYPE: ANYINT,
    B:27 = U7:OUT:0 INSTR_LOG:1|quant_scale#||0 VAR: quant_scale DATATYPE: UHALF2,
    RF:11:IN:0:REG:1 = B:27 STAGE:-1 VAR: quant_scale DATATYPE: UHALF2,
    RF:12:IN:0:REG:6 = B:27 STAGE:-1 VAR: quant_scale DATATYPE: UHALF2,
    RF:13:IN:0:REG:5 = B:27 STAGE:-1 VAR: quant_scale DATATYPE: UHALF2,
    // OUT:ADDER_1: ISUB32 => ( tmp#33 == UNITRF_0_4[1] )
    // OUT:MC_0: UC_DATA_IN => ( uc_const#0x22a322a3 == UCRF_0[18] )
    // OUT:INOUT_1: DATA_IN => ( utmp == MULRF_0_0[1] )
    //  IN:COMM_SCHED_0: ( quant_scale ) = COMMUCDATA( hw_const#8 == PERMRF_0[0], hw_const#0 == UNITRF_0_1[0], uc_quantizer_scale == UCRF_0[1] )
    // OUT:COMM_SCHED_0: COMMUCDATA => ( quant_scale == MULRF_0_1[1], quant_scale == MULRF_1_0[6], quant_scale == MULRF_1_1[5] )
    DEAD_REGS: {  };