mpeg_kc.uc

H.264完整的C语言代码和DCT的代码

// microassembly program:  D:\working\im_apps\h264\mpeg_kc.i
// machine description:    gold8.md
// KERNELDEF: instrs: 338 params: i 0 i 1 o 2 o 3 o 4 blocks: 23 21 2  12 1  5 4  4 3  5 6  12 5  21 8  19 7  25 10  70 9  46 12  4 11  25 16  13 15  8 14  8 13  5 18  8 17  5 22  6 21  11 20  4 19  0 -1  SWP_block_depth: 23 -1 0 -1 0 -1 0 -1 1 -1 1 -1 0 -1 0 0 0 -1 0 -1 0 0 0 -1 func_name: mb_encode block_io_counts: 23 5 0 0 20 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 0 17 0 0 0 1 4 0 0 0 0 0 0 0 24 0 0 1 0 0 0 0 0 0 0 0 0 24 0 1 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 2 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 1 2 0 0 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 
PARAMS: SCHED_METHOD: COS UC_BITS: 497
         NUM_INPUT_STREAMS: 2 NUM_OUTPUT_STREAMS: 3

// RESULTS: -rs 0, -rf 0
//   block: 0 best: 21 achieved: 21 (lines: 1-193, instrs: 0-20)
//   block: 1 best: 12 achieved: 12 (lines: 194-204, instrs: 21-32)
//   block: 2 best: 5 achieved: 5 (lines: 205-210, instrs: 33-37)
//   block: 3 best: 4 achieved: 4 (lines: 211-214, instrs: 38-41)
//   block: 4 best: 5 achieved: 5 (lines: 215-220, instrs: 42-46)
//   block: 5 best: 12 achieved: 12 (lines: 221-228, instrs: 47-58)
//   block: 6 best: 19 achieved: 21 (lines: 229-296, instrs: 59-80)
//   block: 7 best: 8 achieved: 19 (lines: 297-375, instrs: 81-99)
//   block: 8 best: 25 achieved: 25 (lines: 376-427, instrs: 100-124)
//   block: 9 best: 40 achieved: 70 (lines: 428-617, instrs: 125-194)
//   block: 10 best: 25 achieved: 46 (lines: 618-761, instrs: 195-240)
//   block: 11 best: 4 achieved: 4 (lines: 762-763, instrs: 241-244)
//   block: 12 best: 10 achieved: 25 (lines: 764-847, instrs: 245-269)
//   block: 13 best: 13 achieved: 13 (lines: 848-897, instrs: 270-282)
//   block: 14 best: 7 achieved: 8 (lines: 898-918, instrs: 283-290)
//   block: 15 best: 8 achieved: 8 (lines: 919-937, instrs: 291-298)
//   block: 16 best: 5 achieved: 5 (lines: 938-984, instrs: 299-303)
//   block: 17 best: 8 achieved: 8 (lines: 985-1017, instrs: 304-311)
//   block: 18 best: 5 achieved: 5 (lines: 1018-1052, instrs: 312-316)
//   block: 19 best: 6 achieved: 6 (lines: 1053-1066, instrs: 317-322)
//   block: 20 best: 11 achieved: 11 (lines: 1067-1095, instrs: 323-333)
//   block: 21 best: 4 achieved: 4 (lines: 1096-1097, instrs: 334-337)
//   block: 22 best: 0 achieved: 0 (lines: none, instrs: none)

instr: 0
    MC: OP: NONE LINE:-1,
    B:23 = IN:1 STAGE:-1 LINE:110 VAR: shuf_func1 DATATYPE: BYTE4,
    RF:9:IN:0:REG:5 = B:23 STAGE:-1 VAR: shuf_func1 DATATYPE: BYTE4,
    RF:13:IN:0:REG:5 = B:23 STAGE:-1 VAR: shuf_func1 DATATYPE: BYTE4,
    RF:12:IN:0:REG:5 = B:23 STAGE:-1 VAR: shuf_func1 DATATYPE: BYTE4,
    // OUT:INOUT_1: DATA_IN => ( shuf_func1 == UNITRF_1_3[5], shuf_func1 == MULRF_1_1[5], shuf_func1 == MULRF_1_0[5] )
    DEAD_REGS: {  };
instr: 1
    MC: OP: NONE LINE:-1,
    B:23 = IN:1 STAGE:-1 LINE:112 VAR: shuf_func2 DATATYPE: BYTE4,
    RF:13:IN:0:REG:6 = B:23 STAGE:-1 VAR: shuf_func2 DATATYPE: BYTE4,
    RF:9:IN:0:REG:6 = B:23 STAGE:-1 VAR: shuf_func2 DATATYPE: BYTE4,
    RF:12:IN:0:REG:6 = B:23 STAGE:-1 VAR: shuf_func2 DATATYPE: BYTE4,
    // OUT:INOUT_1: DATA_IN => ( shuf_func2 == MULRF_1_1[6], shuf_func2 == UNITRF_1_3[6], shuf_func2 == MULRF_1_0[6] )
    DEAD_REGS: {  };
instr: 2
    MC: OP: NONE LINE:-1,
    B:23 = IN:1 STAGE:-1 LINE:114 VAR: shuf_func3 DATATYPE: BYTE4,
    RF:12:IN:0:REG:7 = B:23 STAGE:-1 VAR: shuf_func3 DATATYPE: BYTE4,
    RF:13:IN:0:REG:7 = B:23 STAGE:-1 VAR: shuf_func3 DATATYPE: BYTE4,
    // OUT:INOUT_1: DATA_IN => ( shuf_func3 == MULRF_1_0[7], shuf_func3 == MULRF_1_1[7] )
    DEAD_REGS: {  };
instr: 3
    MC: OP: NONE LINE:-1,
    B:23 = IN:1 STAGE:-1 LINE:123 VAR: RB_SCALE DATATYPE: HALF2,
    RF:12:IN:0:REG:8 = B:23 STAGE:-1 VAR: RB_SCALE DATATYPE: HALF2,
    RF:13:IN:0:REG:8 = B:23 STAGE:-1 VAR: RB_SCALE DATATYPE: HALF2,
    // OUT:INOUT_1: DATA_IN => ( RB_SCALE == MULRF_1_0[8], RB_SCALE == MULRF_1_1[8] )
    DEAD_REGS: {  };
instr: 4
    MC: OP: NONE LINE:-1,
    B:23 = IN:1 STAGE:-1 LINE:123 VAR: G_SCALE DATATYPE: HALF2,
    RF:12:IN:0:REG:9 = B:23 STAGE:-1 VAR: G_SCALE DATATYPE: HALF2,
    RF:10:IN:0:REG:1 = B:23 STAGE:-1 VAR: G_SCALE DATATYPE: HALF2,
    // OUT:INOUT_1: DATA_IN => ( G_SCALE == MULRF_1_0[9], G_SCALE == MULRF_0_0[1] )
    DEAD_REGS: {  };
instr: 5
    MC: OP: NONE LINE:-1,
    B:23 = IN:1 STAGE:-1 LINE:123 VAR: C_SCALE DATATYPE: HALF2,
    RF:13:IN:0:REG:9 = B:23 STAGE:-1 VAR: C_SCALE DATATYPE: HALF2,
    RF:12:IN:0:REG:10 = B:23 STAGE:-1 VAR: C_SCALE DATATYPE: HALF2,
    // OUT:INOUT_1: DATA_IN => ( C_SCALE == MULRF_1_1[9], C_SCALE == MULRF_1_0[10] )
    DEAD_REGS: {  };
instr: 6
    MC: OP: NONE LINE:-1,
    B:23 = IN:1 STAGE:-1 LINE:127 VAR: one_two_eight DATATYPE: HALF2,
    RF:9:IN:0:REG:7 = B:23 STAGE:-1 VAR: one_two_eight DATATYPE: HALF2,
    // OUT:INOUT_1: DATA_IN => ( one_two_eight == UNITRF_1_3[7] )
    DEAD_REGS: {  };
instr: 7
    MC: OP: NONE LINE:-1,
    B:23 = IN:1 STAGE:-1 LINE:142 VAR: COS_2 DATATYPE: HALF2,
    RF:13:IN:0:REG:1 = B:23 STAGE:-1 VAR: COS_2 DATATYPE: HALF2,
    RF:12:IN:0:REG:1 = B:23 STAGE:-1 VAR: COS_2 DATATYPE: HALF2,
    // OUT:INOUT_1: DATA_IN => ( COS_2 == MULRF_1_1[1], COS_2 == MULRF_1_0[1] )
    DEAD_REGS: {  };
instr: 8
    MC: OP: NONE LINE:-1,
    B:23 = IN:1 STAGE:-1 LINE:142 VAR: COS_3 DATATYPE: HALF2,
    RF:13:IN:0:REG:2 = B:23 STAGE:-1 VAR: COS_3 DATATYPE: HALF2,
    RF:12:IN:0:REG:2 = B:23 STAGE:-1 VAR: COS_3 DATATYPE: HALF2,
    // OUT:INOUT_1: DATA_IN => ( COS_3 == MULRF_1_1[2], COS_3 == MULRF_1_0[2] )
    DEAD_REGS: {  };
instr: 9
    MC: OP: NONE LINE:-1,
    U4: OP: SELECT LINE:-1 STAGE:-1, // D:\working\im_apps\h264\mpeg_kc.i:-1
    B:23 = IN:1 STAGE:-1 LINE:142 VAR: COS_1_plus_COS_3 DATATYPE: HALF2,
    RF:12:IN:0:REG:3 = B:23 STAGE:-1 VAR: COS_1_plus_COS_3 DATATYPE: HALF2,
    RF:13:IN:0:REG:3 = B:23 STAGE:-1 VAR: COS_1_plus_COS_3 DATATYPE: HALF2,
    B:44 = RF:18:OUT:7:REG:0 VAR: hw_const#0 DATATYPE: ANYINT,
    U4:IN:2 = B:44 VAR: hw_const#0 DATATYPE: ANYINT,
    B:21 = RF:13:OUT:0:REG:0 VAR: hw_const#1 DATATYPE: ANYINT,
    U4:IN:1 = B:21 VAR: hw_const#1 DATATYPE: ANYINT,
    B:35 = U4:OUT:1 INSTR_LOG:1|const#1#||1 VAR: const#1 DATATYPE: ANYINT,
    RF:4:IN:0:REG:1 = B:35 STAGE:-1 VAR: const#1 DATATYPE: ANYINT,
    // OUT:INOUT_1: DATA_IN => ( COS_1_plus_COS_3 == MULRF_1_0[3], COS_1_plus_COS_3 == MULRF_1_1[3] )
    //  IN:MULTIPLIER_1: ( const#1 ) = SELECT( hw_const#0 == CCRF_0[0], hw_const#1 == MULRF_1_1[0] )
    // OUT:MULTIPLIER_1: SELECT => ( const#1 == UNITRF_0_3[1] )
    DEAD_REGS: {  };
instr: 10
    MC: OP: NONE LINE:-1,
    U1: OP: IADD32 LINE:87 STAGE:-1, // D:\working\im_apps\h264\mpeg_kc.i:87
    B:23 = IN:1 STAGE:-1 LINE:142 VAR: COS_1_minus_COS_3 DATATYPE: HALF2,
    RF:13:IN:0:REG:4 = B:23 STAGE:-1 VAR: COS_1_minus_COS_3 DATATYPE: HALF2,
    RF:12:IN:0:REG:4 = B:23 STAGE:-1 VAR: COS_1_minus_COS_3 DATATYPE: HALF2,
    B:15 = RF:8:OUT:0:REG:0 VAR: hw_const#1 DATATYPE: ANYINT,
    U1:IN:1 = B:15 VAR: hw_const#1 DATATYPE: ANYINT,
    B:14 = RF:4:OUT:0:REG:1 VAR: const#1 DATATYPE: ANYINT,
    U1:IN:0 = B:14 VAR: const#1 DATATYPE: ANYINT,
    // OUT:INOUT_1: DATA_IN => ( COS_1_minus_COS_3 == MULRF_1_1[4], COS_1_minus_COS_3 == MULRF_1_0[4] )
    //  IN:ADDER_1: ( two ) = IADD32( hw_const#1 == UNITRF_1_2[0], const#1 == UNITRF_0_3[1] )
    DEAD_REGS: {  };
instr: 11
    MC: OP: NONE LINE:-1,
    B:23 = IN:1 STAGE:-1 LINE:154 VAR: tmp#12 DATATYPE: UNDEFINED,
    RF:1:IN:0:REG:1 = B:23 STAGE:-1 VAR: tmp#12 DATATYPE: UNDEFINED,
    B:30 = U1:OUT:0 INSTR_LOG:2|two#||0 VAR: two DATATYPE: INT,
    RF:3:IN:0:REG:1 = B:30 STAGE:-1 VAR: two DATATYPE: INT,
    RF:7:IN:0:REG:3 = B:30 STAGE:-1 VAR: two DATATYPE: INT,
    RF:5:IN:0:REG:1 = B:30 STAGE:-1 VAR: two DATATYPE: INT,
    RF:15:IN:0:REG:1 = B:30 STAGE:-1 VAR: two DATATYPE: INT,
    RF:9:IN:0:REG:2 = B:30 STAGE:-1 VAR: two DATATYPE: INT,
    RF:8:IN:0:REG:2 = B:30 STAGE:-1 VAR: two DATATYPE: INT,
    // OUT:INOUT_1: DATA_IN => ( tmp#12 == UNITRF_0_0[1] )
    // OUT:ADDER_1: IADD32 => ( two == UNITRF_0_2[1], two == UNITRF_1_1[3], two == UNITRF_0_4[1], two == PERMRF_0[1], two == UNITRF_1_3[2], two == UNITRF_1_2[2] )
    DEAD_REGS: {  };
instr: 12
    MC: OP: NONE LINE:-1,
    U6: OP: SPWRITE LINE:154 SP_BASE:96 SP_STAGE:-1:0:0 STAGE:-1, // D:\working\im_apps\h264\mpeg_kc.i:154
    U0: OP: IADD32 LINE:88 STAGE:-1, // D:\working\im_apps\h264\mpeg_kc.i:88
    B:23 = IN:1 STAGE:-1 LINE:154 VAR: tmp#13 DATATYPE: UNDEFINED,
    RF:1:IN:0:REG:1 = B:23 STAGE:-1 VAR: tmp#13 DATATYPE: UNDEFINED,
    B:7 = RF:17:OUT:0:REG:0 VAR: hw_const#0 DATATYPE: ANYINT,
    U6:IN:2 = B:7 VAR: hw_const#0 DATATYPE: ANYINT,
    B:6 = RF:1:OUT:0:REG:1 VAR: tmp#12 DATATYPE: UNDEFINED,
    U6:IN:1 = B:6 VAR: tmp#12 DATATYPE: UNDEFINED,
    B:12 = RF:3:OUT:0:REG:1 VAR: two DATATYPE: INT,
    U0:IN:0 = B:12 VAR: two DATATYPE: INT,
    B:13 = RF:7:OUT:0:REG:3 VAR: two DATATYPE: INT,
    U0:IN:1 = B:13 VAR: two DATATYPE: INT,
    // OUT:INOUT_1: DATA_IN => ( tmp#13 == UNITRF_0_0[1] )
    //  IN:SP_SCHED_WRITE_0: ( K ) = SPWRITE( hw_const#0 == SPIDXRF_1[0], tmp#12 == UNITRF_0_0[1] )
    //  IN:ADDER_0: ( four ) = IADD32( two == UNITRF_0_2[1], two == UNITRF_1_1[3] )
    DEAD_REGS: {  };
instr: 13
    MC: OP: NONE LINE:-1,
    U6: OP: SPWRITE LINE:154 SP_BASE:97 SP_STAGE:-1:0:0 STAGE:-1, // D:\working\im_apps\h264\mpeg_kc.i:154
    B:23 = IN:1 STAGE:-1 LINE:154 VAR: tmp#14 DATATYPE: UNDEFINED,
    RF:1:IN:0:REG:1 = B:23 STAGE:-1 VAR: tmp#14 DATATYPE: UNDEFINED,
    B:7 = RF:17:OUT:0:REG:0 VAR: hw_const#0 DATATYPE: ANYINT,
    U6:IN:2 = B:7 VAR: hw_const#0 DATATYPE: ANYINT,
    B:6 = RF:1:OUT:0:REG:1 VAR: tmp#13 DATATYPE: UNDEFINED,
    U6:IN:1 = B:6 VAR: tmp#13 DATATYPE: UNDEFINED,
    B:29 = U0:OUT:0 INSTR_LOG:2|four#||0 VAR: four DATATYPE: INT,
    RF:10:IN:0:REG:2 = B:29 STAGE:-1 VAR: four DATATYPE: INT,
    RF:12:IN:0:REG:11 = B:29 STAGE:-1 VAR: four DATATYPE: INT,
    RF:7:IN:0:REG:2 = B:29 STAGE:-1 VAR: four DATATYPE: INT,
    RF:9:IN:0:REG:3 = B:29 STAGE:-1 VAR: four DATATYPE: INT,
    RF:5:IN:0:REG:2 = B:29 STAGE:-1 VAR: four DATATYPE: INT,
    // OUT:INOUT_1: DATA_IN => ( tmp#14 == UNITRF_0_0[1] )
    //  IN:SP_SCHED_WRITE_0: ( K ) = SPWRITE( hw_const#0 == SPIDXRF_1[0], tmp#13 == UNITRF_0_0[1] )
    // OUT:SP_SCHED_WRITE_0: SPWRITE => ( K == SP_SCHED_RF_0[96] )
    // OUT:ADDER_0: IADD32 => ( four == MULRF_0_0[2], four == MULRF_1_0[11], four == UNITRF_1_1[2], four == UNITRF_1_3[3], four == UNITRF_0_4[2] )
    DEAD_REGS: {  };
instr: 14
    MC: OP: NONE LINE:-1,
    U6: OP: SPWRITE LINE:154 SP_BASE:98 SP_STAGE:-1:0:0 STAGE:-1, // D:\working\im_apps\h264\mpeg_kc.i:154
    U3: OP: IMUL32 LINE:89 STAGE:-1, // D:\working\im_apps\h264\mpeg_kc.i:89
    B:23 = IN:1 STAGE:-1 LINE:154 VAR: tmp#15 DATATYPE: UNDEFINED,
    RF:1:IN:0:REG:1 = B:23 STAGE:-1 VAR: tmp#15 DATATYPE: UNDEFINED,
    B:7 = RF:17:OUT:0:REG:0 VAR: hw_const#0 DATATYPE: ANYINT,
    U6:IN:2 = B:7 VAR: hw_const#0 DATATYPE: ANYINT,
    B:6 = RF:1:OUT:0:REG:1 VAR: tmp#14 DATATYPE: UNDEFINED,
    U6:IN:1 = B:6 VAR: tmp#14 DATATYPE: UNDEFINED,
    B:18 = RF:10:OUT:0:REG:2 VAR: four DATATYPE: INT,
    U3:IN:0 = B:18 VAR: four DATATYPE: INT,
    B:19 = RF:12:OUT:0:REG:11 VAR: four DATATYPE: INT,
    U3:IN:1 = B:19 VAR: four DATATYPE: INT,
    // OUT:INOUT_1: DATA_IN => ( tmp#15 == UNITRF_0_0[1] )
    //  IN:SP_SCHED_WRITE_0: ( K ) = SPWRITE( hw_const#0 == SPIDXRF_1[0], tmp#14 == UNITRF_0_0[1] )
    // OUT:SP_SCHED_WRITE_0: SPWRITE => ( K == SP_SCHED_RF_0[96] )
    //  IN:MULTIPLIER_0: ( tmp#5, sixteen ) = IMUL32( four == MULRF_0_0[2], four == MULRF_1_0[11] )
    DEAD_REGS: {  };
instr: 15
    MC: OP: UC_DATA_IN LINE:192 IMM:0x8 UCRF_WR:3 STAGES:-1,
    U6: OP: SPWRITE LINE:154 SP_BASE:99 SP_STAGE:-1:0:0 STAGE:-1, // D:\working\im_apps\h264\mpeg_kc.i:154
    U1: OP: ISUB32 LINE:86 STAGE:-1, // D:\working\im_apps\h264\mpeg_kc.i:86
    U2: OP: IADD32 LINE:133 STAGE:-1, // D:\working\im_apps\h264\mpeg_kc.i:133
    B:23 = IN:1 STAGE:-1 LINE:154 VAR: tmp#16 DATATYPE: UNDEFINED,
    RF:1:IN:0:REG:1 = B:23 STAGE:-1 VAR: tmp#16 DATATYPE: UNDEFINED,
    B:7 = RF:17:OUT:0:REG:0 VAR: hw_const#0 DATATYPE: ANYINT,
    U6:IN:2 = B:7 VAR: hw_const#0 DATATYPE: ANYINT,
    B:6 = RF:1:OUT:0:REG:1 VAR: tmp#15 DATATYPE: UNDEFINED,
    U6:IN:1 = B:6 VAR: tmp#15 DATATYPE: UNDEFINED,
    B:14 = RF:4:OUT:0:REG:0 VAR: hw_const#0 DATATYPE: ANYINT,
    U1:IN:0 = B:14 VAR: hw_const#0 DATATYPE: ANYINT,
    B:15 = RF:8:OUT:0:REG:0 VAR: hw_const#1 DATATYPE: ANYINT,
    U1:IN:1 = B:15 VAR: hw_const#1 DATATYPE: ANYINT,
    B:16 = RF:5:OUT:0:REG:1 VAR: two DATATYPE: INT,
    U2:IN:0 = B:16 VAR: two DATATYPE: INT,
    B:17 = RF:9:OUT:0:REG:0 VAR: hw_const#1 DATATYPE: ANYINT,
    U2:IN:1 = B:17 VAR: hw_const#1 DATATYPE: ANYINT,
    // OUT:INOUT_1: DATA_IN => ( tmp#16 == UNITRF_0_0[1] )
    //  IN:SP_SCHED_WRITE_0: ( K ) = SPWRITE( hw_const#0 == SPIDXRF_1[0], tmp#15 == UNITRF_0_0[1] )
    // OUT:SP_SCHED_WRITE_0: SPWRITE => ( K == SP_SCHED_RF_0[96] )
    //  IN:ADDER_1: ( minus_one ) = ISUB32( hw_const#0 == UNITRF_0_3[0], hw_const#1 == UNITRF_1_2[0] )
    //  IN:ADDER_2: ( three ) = IADD32( two == UNITRF_0_4[1], hw_const#1 == UNITRF_1_3[0] )
    // OUT:MC_0: UC_DATA_IN => ( i == UCRF_0[3] )
    DEAD_REGS: {  };
instr: 16
    MC: OP: CHK_UCR LINE:193 UCRF_RD:3 UCONDRF_WR:1 STAGES:-1,