⭐ 欢迎来到虫虫下载站! | 📦 资源下载 📁 资源专辑 ℹ️ 关于我们
⭐ 虫虫下载站

📄 mv2idx_kc.uc

📁 H.264完整的C语言代码和DCT的代码
💻 UC
📖 第 1 页 / 共 5 页
字号:
// microassembly program:  D:\working\im_apps\h264\mv2idx_kc.i
// machine description:    gold8.md
// KERNELDEF: instrs: 79 params: i 0 o 1 o 2 r 1 u 2 r 3 blocks: 5 16 2  47 1  5 4  10 3  0 -1  SWP_block_depth: 5 -1 1 -1 0 -1 func_name: MV2idx block_io_counts: 5 3 0 1 0 0 1 2 8 8 0 0 0 0 1 2 0 0 0 0 0 0 
PARAMS: SCHED_METHOD: COS UC_BITS: 497
         NUM_INPUT_STREAMS: 1 NUM_OUTPUT_STREAMS: 2

// RESULTS: -rs 0, -rf 0
//   block: 0 best: 6 achieved: 16 (lines: 1-48, instrs: 0-16)
//   block: 1 best: 21 achieved: 47 (lines: 49-148, instrs: 17-63)
//   block: 2 best: 5 achieved: 5 (lines: 149-152, instrs: 64-68)
//   block: 3 best: 10 achieved: 10 (lines: 153-154, instrs: 69-78)
//   block: 4 best: 0 achieved: 0 (lines: none, instrs: none)

instr: 0
    MC: OP: NONE LINE:-1,
    DEAD_REGS: {  };
instr: 1
    MC: OP: NONE LINE:-1 UCRF_RD:1,
    U7: OP: COMMUCDATA LINE:24 STAGE:-1, // D:\working\im_apps\h264\mv2idx_kc.i:24
    B:9 = RF:15:OUT:0:REG:0 VAR: hw_const#8 DATATYPE: ANYINT,
    U7:IN:1 = B:9 VAR: hw_const#8 DATATYPE: ANYINT,
    B:8 = RF:2:OUT:0:REG:0 VAR: hw_const#0 DATATYPE: ANYINT,
    U7:IN:0 = B:8 VAR: hw_const#0 DATATYPE: ANYINT,
    B:27 = U7:OUT:0 INSTR_LOG:1|offsets#||0 VAR: offsets DATATYPE: INT,
    RF:9:IN:0:REG:9 = B:27 STAGE:-1 VAR: offsets DATATYPE: INT,
    RF:5:IN:0:REG:1 = B:27 STAGE:-1 VAR: offsets DATATYPE: INT,
    //  IN:COMM_SCHED_0: ( offsets ) = COMMUCDATA( hw_const#8 == PERMRF_0[0], hw_const#0 == UNITRF_0_1[0], uc_offsets == UCRF_0[1] )
    // OUT:COMM_SCHED_0: COMMUCDATA => ( offsets == UNITRF_1_3[9], offsets == UNITRF_0_4[1] )
    DEAD_REGS: {  };
instr: 2
    MC: OP: NONE LINE:-1,
    U3: OP: SELECT LINE:-1 STAGE:-1, // D:\working\im_apps\h264\mv2idx_kc.i:-1
    U1: OP: NOT LINE:-1 STAGE:-1, // D:\working\im_apps\h264\mv2idx_kc.i:-1
    B:43 = RF:18:OUT:6:REG:0 VAR: hw_const#0 DATATYPE: ANYINT,
    U3:IN:2 = B:43 VAR: hw_const#0 DATATYPE: ANYINT,
    B:19 = RF:12:OUT:0:REG:0 VAR: hw_const#1 DATATYPE: ANYINT,
    U3:IN:1 = B:19 VAR: hw_const#1 DATATYPE: ANYINT,
    B:33 = U3:OUT:1 INSTR_LOG:1|const#1#||1 VAR: const#1 DATATYPE: ANYINT,
    RF:3:IN:0:REG:1 = B:33 STAGE:-1 VAR: const#1 DATATYPE: ANYINT,
    B:14 = RF:4:OUT:0:REG:0 VAR: hw_const#0 DATATYPE: ANYINT,
    U1:IN:0 = B:14 VAR: hw_const#0 DATATYPE: ANYINT,
    B:30 = U1:OUT:0 INSTR_LOG:1|always#||0 VAR: always DATATYPE: CC,
    RF:8:IN:0:REG:1 = B:30 STAGE:-1 VAR: always DATATYPE: CC,
    RF:7:IN:0:REG:1 = B:30 STAGE:-1 VAR: always DATATYPE: CC,
    RF:9:IN:0:REG:1 = B:30 STAGE:-1 VAR: always DATATYPE: CC,
    B:46 = U1:OUT:0 INSTR_LOG:1|always#||0 VAR: always DATATYPE: CC,
    RF:18:IN:0:REG:1 = B:46 STAGE:-1 VAR: always DATATYPE: CC,
    //  IN:MULTIPLIER_0: ( const#1 ) = SELECT( hw_const#0 == CCRF_0[0], hw_const#1 == MULRF_1_0[0] )
    // OUT:MULTIPLIER_0: SELECT => ( const#1 == UNITRF_0_2[1] )
    //  IN:ADDER_1: ( always ) = NOT( hw_const#0 == UNITRF_0_3[0] )
    // OUT:ADDER_1: NOT => ( always == UNITRF_1_2[1], always == UNITRF_1_1[1], always == UNITRF_1_3[1], always == CCRF_0[1] )
    DEAD_REGS: {  };
instr: 3
    MC: OP: NONE LINE:-1,
    U0: OP: SHIFT32 LINE:-1 STAGE:-1, // D:\working\im_apps\h264\mv2idx_kc.i:-1
    B:12 = RF:3:OUT:0:REG:1 VAR: const#1 DATATYPE: ANYINT,
    U0:IN:0 = B:12 VAR: const#1 DATATYPE: ANYINT,
    B:13 = RF:7:OUT:0:REG:0 VAR: hw_const#1 DATATYPE: ANYINT,
    U0:IN:1 = B:13 VAR: hw_const#1 DATATYPE: ANYINT,
    B:29 = U0:OUT:0 INSTR_LOG:1|const#2#||0 VAR: const#2 DATATYPE: ANYINT,
    RF:5:IN:0:REG:2 = B:29 STAGE:-1 VAR: const#2 DATATYPE: ANYINT,
    RF:4:IN:0:REG:1 = B:29 STAGE:-1 VAR: const#2 DATATYPE: ANYINT,
    RF:7:IN:0:REG:8 = B:29 STAGE:-1 VAR: const#2 DATATYPE: ANYINT,
    RF:9:IN:0:REG:12 = B:29 STAGE:-1 VAR: const#2 DATATYPE: ANYINT,
    RF:8:IN:0:REG:5 = B:29 STAGE:-1 VAR: const#2 DATATYPE: ANYINT,
    //  IN:ADDER_0: ( const#2 ) = SHIFT32( const#1 == UNITRF_0_2[1], hw_const#1 == UNITRF_1_1[0] )
    // OUT:ADDER_0: SHIFT32 => ( const#2 == UNITRF_0_4[2], const#2 == UNITRF_0_3[1], const#2 == UNITRF_1_1[8], const#2 == UNITRF_1_3[12], const#2 == UNITRF_1_2[5] )
    DEAD_REGS: {  };
instr: 4
    MC: OP: NONE LINE:-1,
    U1: OP: NOT LINE:-1 STAGE:-1, // D:\working\im_apps\h264\mv2idx_kc.i:-1
    B:14 = RF:4:OUT:0:REG:1 VAR: const#2 DATATYPE: ANYINT,
    U1:IN:0 = B:14 VAR: const#2 DATATYPE: ANYINT,
    B:30 = U1:OUT:0 INSTR_LOG:1|const#-3#||0 VAR: const#-3 DATATYPE: ANYINT,
    RF:9:IN:0:REG:2 = B:30 STAGE:-1 VAR: const#-3 DATATYPE: ANYINT,
    RF:8:IN:0:REG:2 = B:30 STAGE:-1 VAR: const#-3 DATATYPE: ANYINT,
    RF:7:IN:0:REG:2 = B:30 STAGE:-1 VAR: const#-3 DATATYPE: ANYINT,
    //  IN:ADDER_1: ( const#-3 ) = NOT( const#2 == UNITRF_0_3[1] )
    // OUT:ADDER_1: NOT => ( const#-3 == UNITRF_1_3[2], const#-3 == UNITRF_1_2[2], const#-3 == UNITRF_1_1[2] )
    DEAD_REGS: {  };
instr: 5
    MC: OP: NONE LINE:-1,
    U4: OP: SELECT LINE:-1 STAGE:-1, // D:\working\im_apps\h264\mv2idx_kc.i:-1
    U2: OP: OR LINE:-1 STAGE:-1, // D:\working\im_apps\h264\mv2idx_kc.i:-1
    U7: OP: SELECT LINE:-1 STAGE:-1, // D:\working\im_apps\h264\mv2idx_kc.i:-1
    B:44 = RF:18:OUT:7:REG:0 VAR: hw_const#0 DATATYPE: ANYINT,
    U4:IN:2 = B:44 VAR: hw_const#0 DATATYPE: ANYINT,
    B:21 = RF:13:OUT:0:REG:0 VAR: hw_const#1 DATATYPE: ANYINT,
    U4:IN:1 = B:21 VAR: hw_const#1 DATATYPE: ANYINT,
    B:35 = U4:OUT:1 INSTR_LOG:1|const#1#||1 VAR: const#1 DATATYPE: ANYINT,
    RF:3:IN:0:REG:1 = B:35 STAGE:-1 VAR: const#1 DATATYPE: ANYINT,
    B:17 = RF:9:OUT:0:REG:0 VAR: hw_const#1 DATATYPE: ANYINT,
    U2:IN:1 = B:17 VAR: hw_const#1 DATATYPE: ANYINT,
    B:16 = RF:5:OUT:0:REG:2 VAR: const#2 DATATYPE: ANYINT,
    U2:IN:0 = B:16 VAR: const#2 DATATYPE: ANYINT,
    B:31 = U2:OUT:0 INSTR_LOG:1|const#3#||0 VAR: const#3 DATATYPE: ANYINT,
    RF:8:IN:0:REG:4 = B:31 STAGE:-1 VAR: const#3 DATATYPE: ANYINT,
    RF:7:IN:0:REG:3 = B:31 STAGE:-1 VAR: const#3 DATATYPE: ANYINT,
    RF:9:IN:0:REG:3 = B:31 STAGE:-1 VAR: const#3 DATATYPE: ANYINT,
    B:38 = RF:18:OUT:1:REG:0 VAR: hw_const#0 DATATYPE: ANYINT,
    U7:IN:2 = B:38 VAR: hw_const#0 DATATYPE: ANYINT,
    B:9 = RF:15:OUT:0:REG:0 VAR: hw_const#8 DATATYPE: ANYINT,
    U7:IN:1 = B:9 VAR: hw_const#8 DATATYPE: ANYINT,
    B:27 = U7:OUT:0 INSTR_LOG:1|const#8#||0 VAR: const#8 DATATYPE: ANYINT,
    RF:5:IN:0:REG:2 = B:27 STAGE:-1 VAR: const#8 DATATYPE: ANYINT,
    //  IN:MULTIPLIER_1: ( const#1 ) = SELECT( hw_const#0 == CCRF_0[0], hw_const#1 == MULRF_1_1[0] )
    // OUT:MULTIPLIER_1: SELECT => ( const#1 == UNITRF_0_2[1] )
    //  IN:ADDER_2: ( const#3 ) = OR( hw_const#1 == UNITRF_1_3[0], const#2 == UNITRF_0_4[2] )
    // OUT:ADDER_2: OR => ( const#3 == UNITRF_1_2[4], const#3 == UNITRF_1_1[3], const#3 == UNITRF_1_3[3] )
    //  IN:COMM_SCHED_0: ( const#8 ) = SELECT( hw_const#0 == CCRF_0[0], hw_const#8 == PERMRF_0[0] )
    // OUT:COMM_SCHED_0: SELECT => ( const#8 == UNITRF_0_4[2] )
    DEAD_REGS: {  };
instr: 6
    MC: OP: NONE LINE:-1,
    U2: OP: OR LINE:-1 STAGE:-1, // D:\working\im_apps\h264\mv2idx_kc.i:-1
    U0: OP: SHIFT32 LINE:-1 STAGE:-1, // D:\working\im_apps\h264\mv2idx_kc.i:-1
    B:17 = RF:9:OUT:0:REG:0 VAR: hw_const#1 DATATYPE: ANYINT,
    U2:IN:1 = B:17 VAR: hw_const#1 DATATYPE: ANYINT,
    B:16 = RF:5:OUT:0:REG:2 VAR: const#8 DATATYPE: ANYINT,
    U2:IN:0 = B:16 VAR: const#8 DATATYPE: ANYINT,
    B:31 = U2:OUT:0 INSTR_LOG:1|const#9#||0 VAR: const#9 DATATYPE: ANYINT,
    RF:3:IN:0:REG:1 = B:31 STAGE:-1 VAR: const#9 DATATYPE: ANYINT,
    B:12 = RF:3:OUT:0:REG:1 VAR: const#1 DATATYPE: ANYINT,
    U0:IN:0 = B:12 VAR: const#1 DATATYPE: ANYINT,
    B:13 = RF:7:OUT:0:REG:8 VAR: const#2 DATATYPE: ANYINT,
    U0:IN:1 = B:13 VAR: const#2 DATATYPE: ANYINT,
    B:29 = U0:OUT:0 INSTR_LOG:1|const#4#||0 VAR: const#4 DATATYPE: ANYINT,
    RF:5:IN:0:REG:3 = B:29 STAGE:-1 VAR: const#4 DATATYPE: ANYINT,
    RF:4:IN:0:REG:1 = B:29 STAGE:-1 VAR: const#4 DATATYPE: ANYINT,
    RF:8:IN:0:REG:3 = B:29 STAGE:-1 VAR: const#4 DATATYPE: ANYINT,
    RF:9:IN:0:REG:4 = B:29 STAGE:-1 VAR: const#4 DATATYPE: ANYINT,
    RF:7:IN:0:REG:4 = B:29 STAGE:-1 VAR: const#4 DATATYPE: ANYINT,
    //  IN:ADDER_2: ( const#9 ) = OR( hw_const#1 == UNITRF_1_3[0], const#8 == UNITRF_0_4[2] )
    // OUT:ADDER_2: OR => ( const#9 == UNITRF_0_2[1] )
    //  IN:ADDER_0: ( const#4 ) = SHIFT32( const#1 == UNITRF_0_2[1], const#2 == UNITRF_1_1[8] )
    // OUT:ADDER_0: SHIFT32 => ( const#4 == UNITRF_0_4[3], const#4 == UNITRF_0_3[1], const#4 == UNITRF_1_2[3], const#4 == UNITRF_1_3[4], const#4 == UNITRF_1_1[4] )
    DEAD_REGS: {  };
instr: 7
    MC: OP: NONE LINE:-1,
    U0: OP: OR LINE:-1 STAGE:-1, // D:\working\im_apps\h264\mv2idx_kc.i:-1
    U1: OP: OR LINE:-1 STAGE:-1, // D:\working\im_apps\h264\mv2idx_kc.i:-1
    B:12 = RF:3:OUT:0:REG:1 VAR: const#9 DATATYPE: ANYINT,
    U0:IN:0 = B:12 VAR: const#9 DATATYPE: ANYINT,
    B:13 = RF:7:OUT:0:REG:8 VAR: const#2 DATATYPE: ANYINT,
    U0:IN:1 = B:13 VAR: const#2 DATATYPE: ANYINT,
    B:29 = U0:OUT:0 INSTR_LOG:1|const#11#||0 VAR: const#11 DATATYPE: ANYINT,
    RF:4:IN:0:REG:1 = B:29 STAGE:-1 VAR: const#11 DATATYPE: ANYINT,
    B:15 = RF:8:OUT:0:REG:4 VAR: const#3 DATATYPE: ANYINT,
    U1:IN:1 = B:15 VAR: const#3 DATATYPE: ANYINT,
    B:14 = RF:4:OUT:0:REG:1 VAR: const#4 DATATYPE: ANYINT,
    U1:IN:0 = B:14 VAR: const#4 DATATYPE: ANYINT,
    B:30 = U1:OUT:0 INSTR_LOG:1|const#7#||0 VAR: const#7 DATATYPE: ANYINT,
    RF:6:IN:0:REG:1 = B:30 STAGE:-1 VAR: const#7 DATATYPE: ANYINT,
    RF:7:IN:0:REG:5 = B:30 STAGE:-1 VAR: const#7 DATATYPE: ANYINT,
    RF:9:IN:0:REG:5 = B:30 STAGE:-1 VAR: const#7 DATATYPE: ANYINT,
    //  IN:ADDER_0: ( const#11 ) = OR( const#9 == UNITRF_0_2[1], const#2 == UNITRF_1_1[8] )
    // OUT:ADDER_0: OR => ( const#11 == UNITRF_0_3[1] )
    //  IN:ADDER_1: ( const#7 ) = OR( const#3 == UNITRF_1_2[4], const#4 == UNITRF_0_3[1] )
    // OUT:ADDER_1: OR => ( const#7 == UNITRF_1_0[1], const#7 == UNITRF_1_1[5], const#7 == UNITRF_1_3[5] )
    DEAD_REGS: {  };
instr: 8
    MC: OP: NONE LINE:-1,
    U3: OP: SELECT LINE:-1 STAGE:-1, // D:\working\im_apps\h264\mv2idx_kc.i:-1
    U1: OP: OR LINE:-1 STAGE:-1, // D:\working\im_apps\h264\mv2idx_kc.i:-1
    U7: OP: SELECT LINE:-1 STAGE:-1, // D:\working\im_apps\h264\mv2idx_kc.i:-1
    B:43 = RF:18:OUT:6:REG:0 VAR: hw_const#0 DATATYPE: ANYINT,
    U3:IN:2 = B:43 VAR: hw_const#0 DATATYPE: ANYINT,
    B:19 = RF:12:OUT:0:REG:0 VAR: hw_const#1 DATATYPE: ANYINT,
    U3:IN:1 = B:19 VAR: hw_const#1 DATATYPE: ANYINT,
    B:33 = U3:OUT:1 INSTR_LOG:1|const#1#||1 VAR: const#1 DATATYPE: ANYINT,
    RF:4:IN:0:REG:1 = B:33 STAGE:-1 VAR: const#1 DATATYPE: ANYINT,
    B:14 = RF:4:OUT:0:REG:1 VAR: const#11 DATATYPE: ANYINT,
    U1:IN:0 = B:14 VAR: const#11 DATATYPE: ANYINT,
    B:15 = RF:8:OUT:0:REG:3 VAR: const#4 DATATYPE: ANYINT,
    U1:IN:1 = B:15 VAR: const#4 DATATYPE: ANYINT,
    B:30 = U1:OUT:0 INSTR_LOG:1|const#15#||0 VAR: const#15 DATATYPE: ANYINT,
    RF:9:IN:0:REG:6 = B:30 STAGE:-1 VAR: const#15 DATATYPE: ANYINT,
    RF:8:IN:0:REG:4 = B:30 STAGE:-1 VAR: const#15 DATATYPE: ANYINT,
    RF:7:IN:0:REG:6 = B:30 STAGE:-1 VAR: const#15 DATATYPE: ANYINT,
    B:38 = RF:18:OUT:1:REG:0 VAR: hw_const#0 DATATYPE: ANYINT,
    U7:IN:2 = B:38 VAR: hw_const#0 DATATYPE: ANYINT,
    B:9 = RF:15:OUT:0:REG:0 VAR: hw_const#8 DATATYPE: ANYINT,
    U7:IN:1 = B:9 VAR: hw_const#8 DATATYPE: ANYINT,
    B:27 = U7:OUT:0 INSTR_LOG:1|const#8#||0 VAR: const#8 DATATYPE: ANYINT,
    RF:3:IN:0:REG:1 = B:27 STAGE:-1 VAR: const#8 DATATYPE: ANYINT,
    //  IN:MULTIPLIER_0: ( const#1 ) = SELECT( hw_const#0 == CCRF_0[0], hw_const#1 == MULRF_1_0[0] )
    // OUT:MULTIPLIER_0: SELECT => ( const#1 == UNITRF_0_3[1] )
    //  IN:ADDER_1: ( const#15 ) = OR( const#11 == UNITRF_0_3[1], const#4 == UNITRF_1_2[3] )
    // OUT:ADDER_1: OR => ( const#15 == UNITRF_1_3[6], const#15 == UNITRF_1_2[4], const#15 == UNITRF_1_1[6] )
    //  IN:COMM_SCHED_0: ( const#8 ) = SELECT( hw_const#0 == CCRF_0[0], hw_const#8 == PERMRF_0[0] )
    // OUT:COMM_SCHED_0: SELECT => ( const#8 == UNITRF_0_2[1] )
    DEAD_REGS: {  };
instr: 9
    MC: OP: UC_DATA_IN LINE:-1 IMM:0xffff UCRF_WR:4 STAGES:-1,
    U1: OP: NOT LINE:-1 STAGE:-1, // D:\working\im_apps\h264\mv2idx_kc.i:-1
    U0: OP: NOT LINE:-1 STAGE:-1, // D:\working\im_apps\h264\mv2idx_kc.i:-1
    B:14 = RF:4:OUT:0:REG:1 VAR: const#1 DATATYPE: ANYINT,
    U1:IN:0 = B:14 VAR: const#1 DATATYPE: ANYINT,
    B:30 = U1:OUT:0 INSTR_LOG:1|const#-2#||0 VAR: const#-2 DATATYPE: ANYINT,
    RF:3:IN:0:REG:1 = B:30 STAGE:-1 VAR: const#-2 DATATYPE: ANYINT,
    RF:4:IN:0:REG:1 = B:30 STAGE:-1 VAR: const#-2 DATATYPE: ANYINT,
    RF:9:IN:0:REG:7 = B:30 STAGE:-1 VAR: const#-2 DATATYPE: ANYINT,
    B:12 = RF:3:OUT:0:REG:1 VAR: const#8 DATATYPE: ANYINT,
    U0:IN:0 = B:12 VAR: const#8 DATATYPE: ANYINT,
    B:29 = U0:OUT:0 INSTR_LOG:1|const#-9#||0 VAR: const#-9 DATATYPE: ANYINT,
    RF:7:IN:0:REG:9 = B:29 STAGE:-1 VAR: const#-9 DATATYPE: ANYINT,

⌨️ 快捷键说明

复制代码 Ctrl + C
搜索代码 Ctrl + F
全屏模式 F11
切换主题 Ctrl + Shift + D
显示快捷键 ?
增大字号 Ctrl + =
减小字号 Ctrl + -