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📄 me_fast_jitter2_kc.uc

📁 H.264完整的C语言代码和DCT的代码
💻 UC
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    U4:IN:2 = B:44 VAR: hw_const#0 DATATYPE: ANYINT,
    B:20 = RF:11:OUT:0:REG:2 VAR: idx DATATYPE: INT,
    U4:IN:0 = B:20 VAR: idx DATATYPE: INT,
    B:35 = U4:OUT:1 INSTR_LOG:1|idx#||1 VAR: idx DATATYPE: INT,
    RF:17:IN:0:REG:2 = B:35 STAGE:-1 VAR: idx DATATYPE: INT,
    //  IN:MC_0: ( tmp#137 ) = CHK_UCR( loopcnt == UCRF_0[3] )
    // OUT:MC_0: CHK_UCR => ( tmp#137 == UCONDRF_0[1] )
    //  IN:ADDER_2: ( const#12 ) = OR( const#8 == UNITRF_0_4[2], const#4 == UNITRF_1_3[5] )
    // OUT:ADDER_2: OR => ( const#12 == UNITRF_1_1[4] )
    //  IN:ADDER_1: ( const#3 ) = OR( hw_const#1 == UNITRF_1_2[0], const#2 == UNITRF_0_3[2] )
    // OUT:ADDER_1: OR => ( const#3 == UNITRF_0_2[3], const#3 == UNITRF_1_2[5] )
    // OUT:ADDER_0: ILT32 => ( tmp#127 == CCRF_0[1] )
    //  IN:MULTIPLIER_1: ( idx ) = NSELECT( hw_const#0 == CCRF_0[0], idx == MULRF_0_1[2] )
    // OUT:MULTIPLIER_1: NSELECT => ( idx == SPIDXRF_1[2] )
    DEAD_REGS: {  };
instr: 32
    MC: OP: NLOOP LINE:88 UCONDRF_RD:1 BR_OFF:8 LAST_STAGE:2,
    U2: OP: ISUB32 LINE:74 STAGE:-1, // D:\working\im_apps\h264\me_fast_jitter2_kc.i:74
    U0: OP: OR LINE:-1 STAGE:-1, // D:\working\im_apps\h264\me_fast_jitter2_kc.i:-1
    U5: OP: SELECT LINE:-1 STAGE:-1, // D:\working\im_apps\h264\me_fast_jitter2_kc.i:-1
    U4: OP: NSELECT LINE:-1 STAGE:-1, // D:\working\im_apps\h264\me_fast_jitter2_kc.i:-1
    U3: OP: NSELECT LINE:-1 STAGE:-1, // D:\working\im_apps\h264\me_fast_jitter2_kc.i:-1
    U7: OP: NSELECT LINE:-1 STAGE:-1, // D:\working\im_apps\h264\me_fast_jitter2_kc.i:-1
    B:16 = RF:5:OUT:0:REG:0 VAR: hw_const#0 DATATYPE: ANYINT,
    U2:IN:0 = B:16 VAR: hw_const#0 DATATYPE: ANYINT,
    B:17 = RF:9:OUT:0:REG:4 VAR: left_margin DATATYPE: INT,
    U2:IN:1 = B:17 VAR: left_margin DATATYPE: INT,
    B:12 = RF:3:OUT:0:REG:3 VAR: const#3 DATATYPE: ANYINT,
    U0:IN:0 = B:12 VAR: const#3 DATATYPE: ANYINT,
    B:13 = RF:7:OUT:0:REG:3 VAR: const#4 DATATYPE: ANYINT,
    U0:IN:1 = B:13 VAR: const#4 DATATYPE: ANYINT,
    B:29 = U0:OUT:0 INSTR_LOG:1|const#7#||0 VAR: const#7 DATATYPE: ANYINT,
    RF:9:IN:0:REG:4 = B:29 STAGE:-1 VAR: const#7 DATATYPE: ANYINT,
    RF:7:IN:0:REG:5 = B:29 STAGE:-1 VAR: const#7 DATATYPE: ANYINT,
    B:39 = RF:18:OUT:2:REG:0 VAR: hw_const#0 DATATYPE: ANYINT,
    U5:IN:2 = B:39 VAR: hw_const#0 DATATYPE: ANYINT,
    B:11 = RF:14:OUT:0:REG:0 VAR: cluster#id DATATYPE: ANYINT,
    U5:IN:1 = B:11 VAR: cluster#id DATATYPE: ANYINT,
    B:28 = U5:OUT:0 INSTR_LOG:1|cluster#id#||0 VAR: cluster#id DATATYPE: ANYINT,
    RF:4:IN:0:REG:3 = B:28 STAGE:-1 VAR: cluster#id DATATYPE: ANYINT,
    B:44 = RF:18:OUT:7:REG:0 VAR: hw_const#0 DATATYPE: ANYINT,
    U4:IN:2 = B:44 VAR: hw_const#0 DATATYPE: ANYINT,
    B:20 = RF:11:OUT:0:REG:0 VAR: hw_const#0 DATATYPE: ANYINT,
    U4:IN:0 = B:20 VAR: hw_const#0 DATATYPE: ANYINT,
    B:35 = U4:OUT:1 INSTR_LOG:1|const#0#||1 VAR: const#0 DATATYPE: ANYINT,
    RF:8:IN:0:REG:6 = B:35 STAGE:-1 VAR: const#0 DATATYPE: ANYINT,
    B:43 = RF:18:OUT:6:REG:0 VAR: hw_const#0 DATATYPE: ANYINT,
    U3:IN:2 = B:43 VAR: hw_const#0 DATATYPE: ANYINT,
    B:18 = RF:10:OUT:0:REG:4 VAR: idx DATATYPE: INT,
    U3:IN:0 = B:18 VAR: idx DATATYPE: INT,
    B:33 = U3:OUT:1 INSTR_LOG:1|idx#||1 VAR: idx DATATYPE: INT,
    RF:17:IN:0:REG:2 = B:33 STAGE:-1 VAR: idx DATATYPE: INT,
    B:38 = RF:18:OUT:1:REG:0 VAR: hw_const#0 DATATYPE: ANYINT,
    U7:IN:2 = B:38 VAR: hw_const#0 DATATYPE: ANYINT,
    B:8 = RF:2:OUT:0:REG:1 VAR: idx DATATYPE: INT,
    U7:IN:0 = B:8 VAR: idx DATATYPE: INT,
    B:27 = U7:OUT:0 INSTR_LOG:1|idx#||0 VAR: idx DATATYPE: INT,
    RF:3:IN:0:REG:5 = B:27 STAGE:-1 VAR: idx DATATYPE: INT,
    //  IN:MC_0: ( ) = NLOOP( tmp#137 == UCONDRF_0[1] )
    //  IN:ADDER_2: ( left_range#167 ) = ISUB32( hw_const#0 == UNITRF_0_4[0], left_margin == UNITRF_1_3[4] )
    //  IN:ADDER_0: ( const#7 ) = OR( const#3 == UNITRF_0_2[3], const#4 == UNITRF_1_1[3] )
    // OUT:ADDER_0: OR => ( const#7 == UNITRF_1_3[4], const#7 == UNITRF_1_1[5] )
    //  IN:DIVIDER_0: ( cluster#id ) = SELECT( hw_const#0 == CCRF_0[0], cluster#id == UNITRF_CID_0[0] )
    // OUT:DIVIDER_0: SELECT => ( cluster#id == UNITRF_0_3[3] )
    //  IN:MULTIPLIER_1: ( const#0 ) = NSELECT( hw_const#0 == CCRF_0[0], hw_const#0 == MULRF_0_1[0] )
    // OUT:MULTIPLIER_1: NSELECT => ( const#0 == UNITRF_1_2[6] )
    //  IN:MULTIPLIER_0: ( idx ) = NSELECT( hw_const#0 == CCRF_0[0], idx == MULRF_0_0[4] )
    // OUT:MULTIPLIER_0: NSELECT => ( idx == SPIDXRF_1[2] )
    //  IN:COMM_SCHED_0: ( idx ) = NSELECT( hw_const#0 == CCRF_0[0], idx == UNITRF_0_1[1] )
    // OUT:COMM_SCHED_0: NSELECT => ( idx == UNITRF_0_2[5] )
    DEAD_REGS: {  };
instr: 33
    MC: OP: NONE LINE:-1,
    U0: OP: ISUB32 LINE:72 STAGE:-1, // D:\working\im_apps\h264\me_fast_jitter2_kc.i:72
    U3: OP: NSELECT LINE:-1 STAGE:-1, // D:\working\im_apps\h264\me_fast_jitter2_kc.i:-1
    U1: OP: IEQ32 LINE:50 STAGE:-1, // D:\working\im_apps\h264\me_fast_jitter2_kc.i:50
    U5: OP: SELECT LINE:-1 STAGE:-1, // D:\working\im_apps\h264\me_fast_jitter2_kc.i:-1
    U4: OP: SELECT LINE:73 STAGE:-1, // D:\working\im_apps\h264\me_fast_jitter2_kc.i:73
    U6: OP: SPWRITE LINE:34 SP_BASE:72 SP_STAGE:-1:0:0 STAGE:-1, // D:\working\im_apps\h264\me_fast_jitter2_kc.i:34
    B:12 = RF:3:OUT:0:REG:0 VAR: hw_const#0 DATATYPE: ANYINT,
    U0:IN:0 = B:12 VAR: hw_const#0 DATATYPE: ANYINT,
    B:13 = RF:7:OUT:0:REG:6 VAR: tmp#125 DATATYPE: INT,
    U0:IN:1 = B:13 VAR: tmp#125 DATATYPE: INT,
    B:31 = U2:OUT:0 INSTR_LOG:2|left_range#167#||0 VAR: left_range#167 DATATYPE: INT,
    RF:7:IN:0:REG:7 = B:31 STAGE:-1 VAR: left_range#167 DATATYPE: INT,
    RF:5:IN:0:REG:3 = B:31 STAGE:-1 VAR: left_range#167 DATATYPE: INT,
    RF:13:IN:0:REG:3 = B:31 STAGE:-1 VAR: left_range#167 DATATYPE: INT,
    B:43 = RF:18:OUT:6:REG:0 VAR: hw_const#0 DATATYPE: ANYINT,
    U3:IN:2 = B:43 VAR: hw_const#0 DATATYPE: ANYINT,
    B:18 = RF:10:OUT:0:REG:0 VAR: hw_const#0 DATATYPE: ANYINT,
    U3:IN:0 = B:18 VAR: hw_const#0 DATATYPE: ANYINT,
    B:33 = U3:OUT:1 INSTR_LOG:1|const#0#||1 VAR: const#0 DATATYPE: ANYINT,
    RF:9:IN:0:REG:6 = B:33 STAGE:-1 VAR: const#0 DATATYPE: ANYINT,
    B:14 = RF:4:OUT:0:REG:3 VAR: cluster#id DATATYPE: ANYINT,
    U1:IN:0 = B:14 VAR: cluster#id DATATYPE: ANYINT,
    B:15 = RF:8:OUT:0:REG:6 VAR: const#0 DATATYPE: ANYINT,
    U1:IN:1 = B:15 VAR: const#0 DATATYPE: ANYINT,
    B:46 = U1:OUT:0 INSTR_LOG:1|clzero#||0 VAR: clzero DATATYPE: CC,
    RF:18:IN:0:REG:1 = B:46 STAGE:-1 VAR: clzero DATATYPE: CC,
    B:39 = RF:18:OUT:2:REG:0 VAR: hw_const#0 DATATYPE: ANYINT,
    U5:IN:2 = B:39 VAR: hw_const#0 DATATYPE: ANYINT,
    B:11 = RF:14:OUT:0:REG:3 VAR: idx DATATYPE: INT,
    U5:IN:1 = B:11 VAR: idx DATATYPE: INT,
    B:28 = U5:OUT:0 INSTR_LOG:1|idx#||0 VAR: idx DATATYPE: INT,
    RF:17:IN:0:REG:2 = B:28 STAGE:-1 VAR: idx DATATYPE: INT,
    B:44 = RF:18:OUT:7:REG:1 VAR: tmp#127 DATATYPE: CC,
    U4:IN:2 = B:44 VAR: tmp#127 DATATYPE: CC,
    B:20 = RF:11:OUT:0:REG:3 VAR: bottom_margin DATATYPE: INT,
    U4:IN:0 = B:20 VAR: bottom_margin DATATYPE: INT,
    B:21 = RF:13:OUT:0:REG:4 VAR: const#15 DATATYPE: ANYINT,
    U4:IN:1 = B:21 VAR: const#15 DATATYPE: ANYINT,
    B:35 = U4:OUT:1 INSTR_LOG:1|bottom_range#166#||1 VAR: bottom_range#166 DATATYPE: INT,
    RF:3:IN:0:REG:3 = B:35 STAGE:-1 VAR: bottom_range#166 DATATYPE: INT,
    B:7 = RF:17:OUT:0:REG:0 VAR: hw_const#0 DATATYPE: ANYINT,
    U6:IN:2 = B:7 VAR: hw_const#0 DATATYPE: ANYINT,
    B:6 = RF:1:OUT:0:REG:1 VAR: tmp#116 DATATYPE: UNDEFINED,
    U6:IN:1 = B:6 VAR: tmp#116 DATATYPE: UNDEFINED,
    //  IN:ADDER_0: ( top_range#165 ) = ISUB32( hw_const#0 == UNITRF_0_2[0], tmp#125 == UNITRF_1_1[6] )
    // OUT:ADDER_2: ISUB32 => ( left_range#167 == UNITRF_1_1[7], left_range#167 == UNITRF_0_4[3], left_range#167 == MULRF_1_1[3] )
    //  IN:MULTIPLIER_0: ( const#0 ) = NSELECT( hw_const#0 == CCRF_0[0], hw_const#0 == MULRF_0_0[0] )
    // OUT:MULTIPLIER_0: NSELECT => ( const#0 == UNITRF_1_3[6] )
    //  IN:ADDER_1: ( clzero ) = IEQ32( cluster#id == UNITRF_0_3[3], const#0 == UNITRF_1_2[6] )
    // OUT:ADDER_1: IEQ32 => ( clzero == CCRF_0[1] )
    //  IN:DIVIDER_0: ( idx ) = SELECT( hw_const#0 == CCRF_0[0], idx == UNITRF_CID_0[3] )
    // OUT:DIVIDER_0: SELECT => ( idx == SPIDXRF_1[2] )
    //  IN:MULTIPLIER_1: ( bottom_range#166 ) = SELECT( tmp#127 == CCRF_0[1], bottom_margin == MULRF_0_1[3], const#15 == MULRF_1_1[4] )
    // OUT:MULTIPLIER_1: SELECT => ( bottom_range#166 == UNITRF_0_2[3] )
    //  IN:SP_SCHED_WRITE_0: ( sp_motions_in#115 ) = SPWRITE( hw_const#0 == SPIDXRF_1[0], tmp#116 == UNITRF_0_0[1] )
    DEAD_REGS: {  };
instr: 34
    MC: OP: NONE LINE:-1,
    U5: OP: SELECT LINE:-1 STAGE:-1, // D:\working\im_apps\h264\me_fast_jitter2_kc.i:-1
    U1: OP: NOT LINE:-1 STAGE:-1, // D:\working\im_apps\h264\me_fast_jitter2_kc.i:-1
    U2: OP: IEQ32 LINE:51 STAGE:-1, // D:\working\im_apps\h264\me_fast_jitter2_kc.i:51
    U3: OP: NSELECT LINE:-1 STAGE:-1, // D:\working\im_apps\h264\me_fast_jitter2_kc.i:-1
    U4: OP: NSELECT LINE:-1 STAGE:-1, // D:\working\im_apps\h264\me_fast_jitter2_kc.i:-1
    B:39 = RF:18:OUT:2:REG:0 VAR: hw_const#0 DATATYPE: ANYINT,
    U5:IN:2 = B:39 VAR: hw_const#0 DATATYPE: ANYINT,
    B:11 = RF:14:OUT:0:REG:0 VAR: cluster#id DATATYPE: ANYINT,
    U5:IN:1 = B:11 VAR: cluster#id DATATYPE: ANYINT,
    B:28 = U5:OUT:0 INSTR_LOG:1|cluster#id#||0 VAR: cluster#id DATATYPE: ANYINT,
    RF:5:IN:0:REG:2 = B:28 STAGE:-1 VAR: cluster#id DATATYPE: ANYINT,
    RF:3:IN:0:REG:4 = B:28 STAGE:-1 VAR: cluster#id DATATYPE: ANYINT,
    B:29 = U0:OUT:0 INSTR_LOG:2|top_range#165#||0 VAR: top_range#165 DATATYPE: INT,
    RF:8:IN:0:REG:6 = B:29 STAGE:-1 VAR: top_range#165 DATATYPE: INT,
    B:14 = RF:4:OUT:0:REG:2 VAR: const#2 DATATYPE: ANYINT,
    U1:IN:0 = B:14 VAR: const#2 DATATYPE: ANYINT,
    B:30 = U1:OUT:0 INSTR_LOG:1|const#-3#||0 VAR: const#-3 DATATYPE: ANYINT,
    RF:7:IN:0:REG:6 = B:30 STAGE:-1 VAR: const#-3 DATATYPE: ANYINT,
    B:16 = RF:5:OUT:0:REG:0 VAR: hw_const#0 DATATYPE: ANYINT,
    U2:IN:0 = B:16 VAR: hw_const#0 DATATYPE: ANYINT,
    B:17 = RF:9:OUT:0:REG:6 VAR: const#0 DATATYPE: ANYINT,
    U2:IN:1 = B:17 VAR: const#0 DATATYPE: ANYINT,
    B:47 = U2:OUT:0 INSTR_LOG:1|cc_true#||0 VAR: cc_true DATATYPE: CC,
    RF:18:IN:1:REG:2 = B:47 STAGE:-1 VAR: cc_true DATATYPE: CC,
    B:43 = RF:18:OUT:6:REG:0 VAR: hw_const#0 DATATYPE: ANYINT,
    U3:IN:2 = B:43 VAR: hw_const#0 DATATYPE: ANYINT,
    B:18 = RF:10:OUT:0:REG:4 VAR: idx DATATYPE: INT,
    U3:IN:0 = B:18 VAR: idx DATATYPE: INT,
    B:33 = U3:OUT:1 INSTR_LOG:1|idx#||1 VAR: idx DATATYPE: INT,
    RF:17:IN:0:REG:2 = B:33 STAGE:-1 VAR: idx DATATYPE: INT,
    B:44 = RF:18:OUT:7:REG:0 VAR: hw_const#0 DATATYPE: ANYINT,
    U4:IN:2 = B:44 VAR: hw_const#0 DATATYPE: ANYINT,
    B:20 = RF:11:OUT:0:REG:2 VAR: idx DATATYPE: INT,
    U4:IN:0 = B:20 VAR: idx DATATYPE: INT,
    B:35 = U4:OUT:1 INSTR_LOG:1|idx#||1 VAR: idx DATATYPE: INT,
    RF:4:IN:0:REG:2 = B:35 STAGE:-1 VAR: idx DATATYPE: INT,
    //  IN:DIVIDER_0: ( cluster#id ) = SELECT( hw_const#0 == CCRF_0[0], cluster#id == UNITRF_CID_0[0] )
    // OUT:DIVIDER_0: SELECT => ( cluster#id == UNITRF_0_4[2], cluster#id == UNITRF_0_2[4] )
    // OUT:ADDER_0: ISUB32 => ( top_range#165 == UNITRF_1_2[6] )
    //  IN:ADDER_1: ( const#-3 ) = NOT( const#2 == UNITRF_0_3[2] )
    // OUT:ADDER_1: NOT => ( const#-3 == UNITRF_1_1[6] )
    //  IN:ADDER_2: ( cc_true ) = IEQ32( hw_const#0 == UNITRF_0_4[0], const#0 == UNITRF_1_3[6] )
    // OUT:ADDER_2: IEQ32 => ( cc_true == CCRF_0[2] )
    //  IN:MULTIPLIER_0: ( idx ) = NSELECT( hw_const#0 == CCRF_0[0], idx == MULRF_0_0[4] )
    // OUT:MULTIPLIER_0: NSELECT => ( idx == SPIDXRF_1[2] )
    //  IN:MULTIPLIER_1: ( idx ) = NSELECT( hw_const#0 == CCRF_0[0], idx == MULRF_0_1[2] )
    // OUT:MULTIPLIER_1: NSELECT => ( idx == UNITRF_0_3[2] )
    // OUT:SP_SCHED_WRITE_0: SPWRITE => ( sp_motions_in#115 == SP_SCHED_RF_0[72] )
    DEAD_REGS: {  };
instr: 35
    MC: OP: NONE LINE:-1,
    U6: OP: SPWRITE LINE:89 SP_BASE:60 SP_STAGE:2:0:0 STAGE:2, // D:\working\im_apps\h264\me_fast_jitter2_kc.i:89
    U8: OP: GEN_CISTATE LINE:89 STAGE:1, // D:\working\im_apps\h264\me_fast_jitter2_kc.i:89
    B:30 = U1:OUT:0 INSTR_LOG:2|idx#||0 VAR: idx DATATYPE: INT,
    RF:11:IN:0:REG:1 = B:30 STAGE:2 VAR: idx DATATYPE: INT,
    RF:2:IN:0:REG:1 = B:30 STAGE:2 VAR: idx DATATYPE: INT,
    RF:17:IN:0:REG:2 = B:30 STAGE:2 VAR: idx DATATYPE: INT,
    RF:4:IN:0:REG:2 = B:30 STAGE:2 VAR: idx DATATYPE: INT,
    RF:10:IN:0:REG:3 = B:30 STAGE:2 VAR: idx DATATYPE: INT,
    RF:6:IN:0:REG:2 = B:30 STAGE:2 VAR: idx DATATYPE: INT,
    RF:5:IN:0:REG:4 = B:30 STAGE:2 VAR: idx DATATYPE: INT,
    RF:3:IN:0:REG:6 = B:30 STAGE:2 VAR: idx DATATYPE: INT,
    B:7 = RF:17:OUT:0:REG:2 VAR: idx DATATYPE: INT,
    U6:IN:2 = B:7 VAR: idx DATATYPE: INT,
    B:6 = RF:1:OUT:0:REG:1 VAR: tmp#143 DATATYPE: UNDEFINED,
    U6:IN:1 = B:6 VAR:

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