📄 me_fast_jitter2_kc.uc
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U4:IN:2 = B:44 VAR: hw_const#0 DATATYPE: ANYINT,
B:20 = RF:11:OUT:0:REG:2 VAR: idx DATATYPE: INT,
U4:IN:0 = B:20 VAR: idx DATATYPE: INT,
B:35 = U4:OUT:1 INSTR_LOG:1|idx#||1 VAR: idx DATATYPE: INT,
RF:17:IN:0:REG:1 = B:35 STAGE:-1 VAR: idx DATATYPE: INT,
B:39 = RF:18:OUT:2:REG:0 VAR: hw_const#0 DATATYPE: ANYINT,
U5:IN:2 = B:39 VAR: hw_const#0 DATATYPE: ANYINT,
B:10 = RF:6:OUT:0:REG:2 VAR: const#255 DATATYPE: ANYINT,
U5:IN:0 = B:10 VAR: const#255 DATATYPE: ANYINT,
B:28 = U5:OUT:0 INSTR_LOG:1|const#255#||0 VAR: const#255 DATATYPE: ANYINT,
RF:4:IN:0:REG:2 = B:28 STAGE:-1 VAR: const#255 DATATYPE: ANYINT,
// IN:ADDER_0: ( tmp#135 ) = IADD32( tmp#134 == UNITRF_0_2[3], hw_const#1 == UNITRF_1_1[0] )
// IN:MULTIPLIER_1: ( idx ) = NSELECT( hw_const#0 == CCRF_0[0], idx == MULRF_0_1[2] )
// OUT:MULTIPLIER_1: NSELECT => ( idx == SPIDXRF_1[1] )
// IN:DIVIDER_0: ( const#255 ) = NSELECT( hw_const#0 == CCRF_0[0], const#255 == UNITRF_1_0[2] )
// OUT:DIVIDER_0: NSELECT => ( const#255 == UNITRF_0_3[2] )
DEAD_REGS: { };
instr: 27
MC: OP: NONE LINE:-1,
U1: OP: AND LINE:45 STAGE:-1, // D:\working\im_apps\h264\me_fast_jitter2_kc.i:45
U5: OP: SELECT LINE:-1 STAGE:-1, // D:\working\im_apps\h264\me_fast_jitter2_kc.i:-1
U3: OP: NSELECT LINE:-1 STAGE:-1, // D:\working\im_apps\h264\me_fast_jitter2_kc.i:-1
U4: OP: SELECT LINE:-1 STAGE:-1, // D:\working\im_apps\h264\me_fast_jitter2_kc.i:-1
B:29 = U0:OUT:0 INSTR_LOG:2|tmp#135#||0 VAR: tmp#135 DATATYPE: INT,
RF:5:IN:0:REG:2 = B:29 STAGE:-1 VAR: tmp#135 DATATYPE: INT,
B:15 = RF:8:OUT:0:REG:4 VAR: margin DATATYPE: INT,
U1:IN:1 = B:15 VAR: margin DATATYPE: INT,
B:14 = RF:4:OUT:0:REG:2 VAR: const#255 DATATYPE: ANYINT,
U1:IN:0 = B:14 VAR: const#255 DATATYPE: ANYINT,
B:30 = U1:OUT:0 INSTR_LOG:1|top_margin#||0 VAR: top_margin DATATYPE: INT,
RF:3:IN:0:REG:3 = B:30 STAGE:-1 VAR: top_margin DATATYPE: INT,
RF:6:IN:0:REG:2 = B:30 STAGE:-1 VAR: top_margin DATATYPE: INT,
B:39 = RF:18:OUT:2:REG:0 VAR: hw_const#0 DATATYPE: ANYINT,
U5:IN:2 = B:39 VAR: hw_const#0 DATATYPE: ANYINT,
B:11 = RF:14:OUT:0:REG:3 VAR: idx DATATYPE: INT,
U5:IN:1 = B:11 VAR: idx DATATYPE: INT,
B:28 = U5:OUT:0 INSTR_LOG:1|idx#||0 VAR: idx DATATYPE: INT,
RF:17:IN:0:REG:1 = B:28 STAGE:-1 VAR: idx DATATYPE: INT,
B:43 = RF:18:OUT:6:REG:0 VAR: hw_const#0 DATATYPE: ANYINT,
U3:IN:2 = B:43 VAR: hw_const#0 DATATYPE: ANYINT,
B:18 = RF:10:OUT:0:REG:3 VAR: margin DATATYPE: INT,
U3:IN:0 = B:18 VAR: margin DATATYPE: INT,
B:33 = U3:OUT:1 INSTR_LOG:1|margin#||1 VAR: margin DATATYPE: INT,
RF:4:IN:0:REG:2 = B:33 STAGE:-1 VAR: margin DATATYPE: INT,
B:44 = RF:18:OUT:7:REG:0 VAR: hw_const#0 DATATYPE: ANYINT,
U4:IN:2 = B:44 VAR: hw_const#0 DATATYPE: ANYINT,
B:21 = RF:13:OUT:0:REG:3 VAR: const#-2 DATATYPE: ANYINT,
U4:IN:1 = B:21 VAR: const#-2 DATATYPE: ANYINT,
B:35 = U4:OUT:1 INSTR_LOG:1|const#-2#||1 VAR: const#-2 DATATYPE: ANYINT,
RF:8:IN:0:REG:4 = B:35 STAGE:-1 VAR: const#-2 DATATYPE: ANYINT,
RF:9:IN:0:REG:6 = B:35 STAGE:-1 VAR: const#-2 DATATYPE: ANYINT,
// OUT:ADDER_0: IADD32 => ( tmp#135 == UNITRF_0_4[2] )
// IN:ADDER_1: ( top_margin ) = AND( margin == UNITRF_1_2[4], const#255 == UNITRF_0_3[2] )
// OUT:ADDER_1: AND => ( top_margin == UNITRF_0_2[3], top_margin == UNITRF_1_0[2] )
// IN:DIVIDER_0: ( idx ) = SELECT( hw_const#0 == CCRF_0[0], idx == UNITRF_CID_0[3] )
// OUT:DIVIDER_0: SELECT => ( idx == SPIDXRF_1[1] )
// IN:MULTIPLIER_0: ( margin ) = NSELECT( hw_const#0 == CCRF_0[0], margin == MULRF_0_0[3] )
// OUT:MULTIPLIER_0: NSELECT => ( margin == UNITRF_0_3[2] )
// IN:MULTIPLIER_1: ( const#-2 ) = SELECT( hw_const#0 == CCRF_0[0], const#-2 == MULRF_1_1[3] )
// OUT:MULTIPLIER_1: SELECT => ( const#-2 == UNITRF_1_2[4], const#-2 == UNITRF_1_3[6] )
DEAD_REGS: { };
instr: 28
MC: OP: NONE LINE:-1,
U2: OP: SHIFT32 LINE:84 STAGE:-1, // D:\working\im_apps\h264\me_fast_jitter2_kc.i:84
U1: OP: SHIFT32 LINE:46 STAGE:-1, // D:\working\im_apps\h264\me_fast_jitter2_kc.i:46
U0: OP: ILT32 LINE:72 STAGE:-1, // D:\working\im_apps\h264\me_fast_jitter2_kc.i:72
U3: OP: NSELECT LINE:-1 STAGE:-1, // D:\working\im_apps\h264\me_fast_jitter2_kc.i:-1
B:16 = RF:5:OUT:0:REG:2 VAR: tmp#135 DATATYPE: INT,
U2:IN:0 = B:16 VAR: tmp#135 DATATYPE: INT,
B:17 = RF:9:OUT:0:REG:6 VAR: const#-2 DATATYPE: ANYINT,
U2:IN:1 = B:17 VAR: const#-2 DATATYPE: ANYINT,
B:31 = U2:OUT:0 INSTR_LOG:1|i#||0 VAR: i DATATYPE: INT,
RF:15:IN:0:REG:1 = B:31 STAGE:-1 VAR: i DATATYPE: INT,
B:14 = RF:4:OUT:0:REG:2 VAR: margin DATATYPE: INT,
U1:IN:0 = B:14 VAR: margin DATATYPE: INT,
B:15 = RF:8:OUT:0:REG:5 VAR: const#-8 DATATYPE: ANYINT,
U1:IN:1 = B:15 VAR: const#-8 DATATYPE: ANYINT,
B:30 = U1:OUT:0 INSTR_LOG:1|tmp#118#||0 VAR: tmp#118 DATATYPE: INT,
RF:5:IN:0:REG:2 = B:30 STAGE:-1 VAR: tmp#118 DATATYPE: INT,
B:12 = RF:3:OUT:0:REG:3 VAR: top_margin DATATYPE: INT,
U0:IN:0 = B:12 VAR: top_margin DATATYPE: INT,
B:13 = RF:7:OUT:0:REG:2 VAR: const#16 DATATYPE: ANYINT,
U0:IN:1 = B:13 VAR: const#16 DATATYPE: ANYINT,
B:43 = RF:18:OUT:6:REG:0 VAR: hw_const#0 DATATYPE: ANYINT,
U3:IN:2 = B:43 VAR: hw_const#0 DATATYPE: ANYINT,
B:18 = RF:10:OUT:0:REG:4 VAR: idx DATATYPE: INT,
U3:IN:0 = B:18 VAR: idx DATATYPE: INT,
B:33 = U3:OUT:1 INSTR_LOG:1|idx#||1 VAR: idx DATATYPE: INT,
RF:17:IN:0:REG:1 = B:33 STAGE:-1 VAR: idx DATATYPE: INT,
// IN:ADDER_2: ( i ) = SHIFT32( tmp#135 == UNITRF_0_4[2], const#-2 == UNITRF_1_3[6] )
// OUT:ADDER_2: SHIFT32 => ( i == PERMRF_0[1] )
// IN:ADDER_1: ( tmp#118 ) = SHIFT32( margin == UNITRF_0_3[2], const#-8 == UNITRF_1_2[5] )
// OUT:ADDER_1: SHIFT32 => ( tmp#118 == UNITRF_0_4[2] )
// IN:ADDER_0: ( tmp#124 ) = ILT32( top_margin == UNITRF_0_2[3], const#16 == UNITRF_1_1[2] )
// IN:MULTIPLIER_0: ( idx ) = NSELECT( hw_const#0 == CCRF_0[0], idx == MULRF_0_0[4] )
// OUT:MULTIPLIER_0: NSELECT => ( idx == SPIDXRF_1[1] )
DEAD_REGS: { };
instr: 29
MC: OP: NONE LINE:-1 UCRF_RD:-1 COMM_SRC_IDX:0,
U7: OP: COMMXUCDATA LINE:86 STAGE:-1, // D:\working\im_apps\h264\me_fast_jitter2_kc.i:86
U2: OP: AND LINE:46 STAGE:-1, // D:\working\im_apps\h264\me_fast_jitter2_kc.i:46
U5: OP: SELECT LINE:-1 STAGE:-1, // D:\working\im_apps\h264\me_fast_jitter2_kc.i:-1
B:8 = RF:2:OUT:0:REG:0 VAR: hw_const#0 DATATYPE: ANYINT,
U7:IN:0 = B:8 VAR: hw_const#0 DATATYPE: ANYINT,
B:9 = RF:15:OUT:0:REG:1 VAR: i DATATYPE: INT,
U7:IN:1 = B:9 VAR: i DATATYPE: INT,
B:16 = RF:5:OUT:0:REG:2 VAR: tmp#118 DATATYPE: INT,
U2:IN:0 = B:16 VAR: tmp#118 DATATYPE: INT,
B:17 = RF:9:OUT:0:REG:3 VAR: const#255 DATATYPE: ANYINT,
U2:IN:1 = B:17 VAR: const#255 DATATYPE: ANYINT,
B:31 = U2:OUT:0 INSTR_LOG:1|bottom_margin#||0 VAR: bottom_margin DATATYPE: INT,
RF:3:IN:0:REG:3 = B:31 STAGE:-1 VAR: bottom_margin DATATYPE: INT,
RF:11:IN:0:REG:3 = B:31 STAGE:-1 VAR: bottom_margin DATATYPE: INT,
B:45 = U0:OUT:0 INSTR_LOG:2|tmp#124#||0 VAR: tmp#124 DATATYPE: CC,
RF:18:IN:0:REG:1 = B:45 STAGE:-1 VAR: tmp#124 DATATYPE: CC,
B:39 = RF:18:OUT:2:REG:0 VAR: hw_const#0 DATATYPE: ANYINT,
U5:IN:2 = B:39 VAR: hw_const#0 DATATYPE: ANYINT,
B:11 = RF:14:OUT:0:REG:3 VAR: idx DATATYPE: INT,
U5:IN:1 = B:11 VAR: idx DATATYPE: INT,
B:28 = U5:OUT:0 INSTR_LOG:1|idx#||0 VAR: idx DATATYPE: INT,
RF:17:IN:0:REG:2 = B:28 STAGE:-1 VAR: idx DATATYPE: INT,
// IN:COMM_SCHED_0: ( i ) = COMMXUCDATA( hw_const#0 == UNITRF_0_1[0], i == PERMRF_0[1] )
// IN:ADDER_2: ( bottom_margin ) = AND( tmp#118 == UNITRF_0_4[2], const#255 == UNITRF_1_3[3] )
// OUT:ADDER_2: AND => ( bottom_margin == UNITRF_0_2[3], bottom_margin == MULRF_0_1[3] )
// OUT:ADDER_0: ILT32 => ( tmp#124 == CCRF_0[1] )
// IN:DIVIDER_0: ( idx ) = SELECT( hw_const#0 == CCRF_0[0], idx == UNITRF_CID_0[3] )
// OUT:DIVIDER_0: SELECT => ( idx == SPIDXRF_1[2] )
DEAD_REGS: { };
instr: 30
MC: OP: NONE LINE:-1 UCRF_WR:3 STAGES:-1,
U7: OP: SELECT LINE:-1 STAGE:-1, // D:\working\im_apps\h264\me_fast_jitter2_kc.i:-1
U0: OP: ILT32 LINE:73 STAGE:-1, // D:\working\im_apps\h264\me_fast_jitter2_kc.i:73
U5: OP: SELECT LINE:72 STAGE:-1, // D:\working\im_apps\h264\me_fast_jitter2_kc.i:72
U3: OP: NSELECT LINE:-1 STAGE:-1, // D:\working\im_apps\h264\me_fast_jitter2_kc.i:-1
U4: OP: NSELECT LINE:-1 STAGE:-1, // D:\working\im_apps\h264\me_fast_jitter2_kc.i:-1
B:38 = RF:18:OUT:1:REG:0 VAR: hw_const#0 DATATYPE: ANYINT,
U7:IN:2 = B:38 VAR: hw_const#0 DATATYPE: ANYINT,
B:9 = RF:15:OUT:0:REG:0 VAR: hw_const#8 DATATYPE: ANYINT,
U7:IN:1 = B:9 VAR: hw_const#8 DATATYPE: ANYINT,
B:27 = U7:OUT:0 INSTR_LOG:1|const#8#||0 VAR: const#8 DATATYPE: ANYINT,
RF:5:IN:0:REG:2 = B:27 STAGE:-1 VAR: const#8 DATATYPE: ANYINT,
B:12 = RF:3:OUT:0:REG:3 VAR: bottom_margin DATATYPE: INT,
U0:IN:0 = B:12 VAR: bottom_margin DATATYPE: INT,
B:13 = RF:7:OUT:0:REG:4 VAR: const#15 DATATYPE: ANYINT,
U0:IN:1 = B:13 VAR: const#15 DATATYPE: ANYINT,
B:39 = RF:18:OUT:2:REG:1 VAR: tmp#124 DATATYPE: CC,
U5:IN:2 = B:39 VAR: tmp#124 DATATYPE: CC,
B:10 = RF:6:OUT:0:REG:2 VAR: top_margin DATATYPE: INT,
U5:IN:0 = B:10 VAR: top_margin DATATYPE: INT,
B:11 = RF:14:OUT:0:REG:2 VAR: const#16 DATATYPE: ANYINT,
U5:IN:1 = B:11 VAR: const#16 DATATYPE: ANYINT,
B:28 = U5:OUT:0 INSTR_LOG:1|tmp#125#||0 VAR: tmp#125 DATATYPE: INT,
RF:7:IN:0:REG:6 = B:28 STAGE:-1 VAR: tmp#125 DATATYPE: INT,
B:43 = RF:18:OUT:6:REG:0 VAR: hw_const#0 DATATYPE: ANYINT,
U3:IN:2 = B:43 VAR: hw_const#0 DATATYPE: ANYINT,
B:18 = RF:10:OUT:0:REG:4 VAR: idx DATATYPE: INT,
U3:IN:0 = B:18 VAR: idx DATATYPE: INT,
B:33 = U3:OUT:1 INSTR_LOG:1|idx#||1 VAR: idx DATATYPE: INT,
RF:17:IN:0:REG:2 = B:33 STAGE:-1 VAR: idx DATATYPE: INT,
B:44 = RF:18:OUT:7:REG:0 VAR: hw_const#0 DATATYPE: ANYINT,
U4:IN:2 = B:44 VAR: hw_const#0 DATATYPE: ANYINT,
B:20 = RF:11:OUT:0:REG:1 VAR: const#2 DATATYPE: ANYINT,
U4:IN:0 = B:20 VAR: const#2 DATATYPE: ANYINT,
B:35 = U4:OUT:1 INSTR_LOG:1|const#2#||1 VAR: const#2 DATATYPE: ANYINT,
RF:9:IN:0:REG:3 = B:35 STAGE:-1 VAR: const#2 DATATYPE: ANYINT,
RF:4:IN:0:REG:2 = B:35 STAGE:-1 VAR: const#2 DATATYPE: ANYINT,
// OUT:COMM_SCHED_0: COMM_WR_UCR => ( loopcnt == UCRF_0[3] )
// IN:COMM_SCHED_0: ( const#8 ) = SELECT( hw_const#0 == CCRF_0[0], hw_const#8 == PERMRF_0[0] )
// OUT:COMM_SCHED_0: SELECT => ( const#8 == UNITRF_0_4[2] )
// IN:ADDER_0: ( tmp#127 ) = ILT32( bottom_margin == UNITRF_0_2[3], const#15 == UNITRF_1_1[4] )
// IN:DIVIDER_0: ( tmp#125 ) = SELECT( tmp#124 == CCRF_0[1], top_margin == UNITRF_1_0[2], const#16 == UNITRF_CID_0[2] )
// OUT:DIVIDER_0: SELECT => ( tmp#125 == UNITRF_1_1[6] )
// IN:MULTIPLIER_0: ( idx ) = NSELECT( hw_const#0 == CCRF_0[0], idx == MULRF_0_0[4] )
// OUT:MULTIPLIER_0: NSELECT => ( idx == SPIDXRF_1[2] )
// IN:MULTIPLIER_1: ( const#2 ) = NSELECT( hw_const#0 == CCRF_0[0], const#2 == MULRF_0_1[1] )
// OUT:MULTIPLIER_1: NSELECT => ( const#2 == UNITRF_1_3[3], const#2 == UNITRF_0_3[2] )
DEAD_REGS: { };
instr: 31
MC: OP: CHK_UCR LINE:88 UCRF_RD:3 UCONDRF_WR:1 STAGES:-1,
U2: OP: OR LINE:-1 STAGE:-1, // D:\working\im_apps\h264\me_fast_jitter2_kc.i:-1
U1: OP: OR LINE:-1 STAGE:-1, // D:\working\im_apps\h264\me_fast_jitter2_kc.i:-1
U4: OP: NSELECT LINE:-1 STAGE:-1, // D:\working\im_apps\h264\me_fast_jitter2_kc.i:-1
B:16 = RF:5:OUT:0:REG:2 VAR: const#8 DATATYPE: ANYINT,
U2:IN:0 = B:16 VAR: const#8 DATATYPE: ANYINT,
B:17 = RF:9:OUT:0:REG:5 VAR: const#4 DATATYPE: ANYINT,
U2:IN:1 = B:17 VAR: const#4 DATATYPE: ANYINT,
B:31 = U2:OUT:0 INSTR_LOG:1|const#12#||0 VAR: const#12 DATATYPE: ANYINT,
RF:7:IN:0:REG:4 = B:31 STAGE:-1 VAR: const#12 DATATYPE: ANYINT,
B:15 = RF:8:OUT:0:REG:0 VAR: hw_const#1 DATATYPE: ANYINT,
U1:IN:1 = B:15 VAR: hw_const#1 DATATYPE: ANYINT,
B:14 = RF:4:OUT:0:REG:2 VAR: const#2 DATATYPE: ANYINT,
U1:IN:0 = B:14 VAR: const#2 DATATYPE: ANYINT,
B:30 = U1:OUT:0 INSTR_LOG:1|const#3#||0 VAR: const#3 DATATYPE: ANYINT,
RF:3:IN:0:REG:3 = B:30 STAGE:-1 VAR: const#3 DATATYPE: ANYINT,
RF:8:IN:0:REG:5 = B:30 STAGE:-1 VAR: const#3 DATATYPE: ANYINT,
B:45 = U0:OUT:0 INSTR_LOG:2|tmp#127#||0 VAR: tmp#127 DATATYPE: CC,
RF:18:IN:0:REG:1 = B:45 STAGE:-1 VAR: tmp#127 DATATYPE: CC,
B:44 = RF:18:OUT:7:REG:0 VAR: hw_const#0 DATATYPE: ANYINT,
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