📄 me_fast_jitter2_kc.uc
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U2:IN:1 = B:17 VAR: const#-16 DATATYPE: ANYINT,
B:31 = U2:OUT:0 INSTR_LOG:1|tmp#119#||0 VAR: tmp#119 DATATYPE: INT,
RF:4:IN:0:REG:2 = B:31 STAGE:-1 VAR: tmp#119 DATATYPE: INT,
B:44 = RF:18:OUT:7:REG:0 VAR: hw_const#0 DATATYPE: ANYINT,
U4:IN:2 = B:44 VAR: hw_const#0 DATATYPE: ANYINT,
B:20 = RF:11:OUT:0:REG:2 VAR: const#255 DATATYPE: ANYINT,
U4:IN:0 = B:20 VAR: const#255 DATATYPE: ANYINT,
B:35 = U4:OUT:1 INSTR_LOG:1|const#255#||1 VAR: const#255 DATATYPE: ANYINT,
RF:8:IN:0:REG:6 = B:35 STAGE:-1 VAR: const#255 DATATYPE: ANYINT,
B:13 = RF:7:OUT:0:REG:0 VAR: hw_const#1 DATATYPE: ANYINT,
U0:IN:1 = B:13 VAR: hw_const#1 DATATYPE: ANYINT,
B:12 = RF:3:OUT:0:REG:2 VAR: const#8 DATATYPE: ANYINT,
U0:IN:0 = B:12 VAR: const#8 DATATYPE: ANYINT,
B:29 = U0:OUT:0 INSTR_LOG:1|const#9#||0 VAR: const#9 DATATYPE: ANYINT,
RF:9:IN:0:REG:2 = B:29 STAGE:-1 VAR: const#9 DATATYPE: ANYINT,
// OUT:ADDER_1: IADD32 => ( tmp#130 == UNITRF_0_2[2] )
// IN:ADDER_2: ( tmp#119 ) = SHIFT32( margin == UNITRF_0_4[2], const#-16 == UNITRF_1_3[2] )
// OUT:ADDER_2: SHIFT32 => ( tmp#119 == UNITRF_0_3[2] )
// IN:MULTIPLIER_1: ( const#255 ) = NSELECT( hw_const#0 == CCRF_0[0], const#255 == MULRF_0_1[2] )
// OUT:MULTIPLIER_1: NSELECT => ( const#255 == UNITRF_1_2[6] )
// IN:ADDER_0: ( const#9 ) = OR( hw_const#1 == UNITRF_1_1[0], const#8 == UNITRF_0_2[2] )
// OUT:ADDER_0: OR => ( const#9 == UNITRF_1_3[2] )
DEAD_REGS: { };
instr: 18
MC: OP: NONE LINE:-1,
U0: OP: ISUB32 LINE:76 STAGE:-1, // D:\working\im_apps\h264\me_fast_jitter2_kc.i:76
U2: OP: OR LINE:-1 STAGE:-1, // D:\working\im_apps\h264\me_fast_jitter2_kc.i:-1
U1: OP: AND LINE:47 STAGE:-1, // D:\working\im_apps\h264\me_fast_jitter2_kc.i:47
B:12 = RF:3:OUT:0:REG:2 VAR: tmp#130 DATATYPE: INT,
U0:IN:0 = B:12 VAR: tmp#130 DATATYPE: INT,
B:13 = RF:7:OUT:0:REG:2 VAR: const#16 DATATYPE: ANYINT,
U0:IN:1 = B:13 VAR: const#16 DATATYPE: ANYINT,
B:17 = RF:9:OUT:0:REG:2 VAR: const#9 DATATYPE: ANYINT,
U2:IN:1 = B:17 VAR: const#9 DATATYPE: ANYINT,
B:16 = RF:5:OUT:0:REG:1 VAR: const#2 DATATYPE: ANYINT,
U2:IN:0 = B:16 VAR: const#2 DATATYPE: ANYINT,
B:31 = U2:OUT:0 INSTR_LOG:1|const#11#||0 VAR: const#11 DATATYPE: ANYINT,
RF:5:IN:0:REG:1 = B:31 STAGE:-1 VAR: const#11 DATATYPE: ANYINT,
B:14 = RF:4:OUT:0:REG:2 VAR: tmp#119 DATATYPE: INT,
U1:IN:0 = B:14 VAR: tmp#119 DATATYPE: INT,
B:15 = RF:8:OUT:0:REG:6 VAR: const#255 DATATYPE: ANYINT,
U1:IN:1 = B:15 VAR: const#255 DATATYPE: ANYINT,
B:30 = U1:OUT:0 INSTR_LOG:1|left_margin#||0 VAR: left_margin DATATYPE: INT,
RF:9:IN:0:REG:4 = B:30 STAGE:-1 VAR: left_margin DATATYPE: INT,
RF:8:IN:0:REG:6 = B:30 STAGE:-1 VAR: left_margin DATATYPE: INT,
RF:7:IN:0:REG:5 = B:30 STAGE:-1 VAR: left_margin DATATYPE: INT,
// IN:ADDER_0: ( num_cols_to_right ) = ISUB32( tmp#130 == UNITRF_0_2[2], const#16 == UNITRF_1_1[2] )
// IN:ADDER_2: ( const#11 ) = OR( const#9 == UNITRF_1_3[2], const#2 == UNITRF_0_4[1] )
// OUT:ADDER_2: OR => ( const#11 == UNITRF_0_4[1] )
// IN:ADDER_1: ( left_margin ) = AND( tmp#119 == UNITRF_0_3[2], const#255 == UNITRF_1_2[6] )
// OUT:ADDER_1: AND => ( left_margin == UNITRF_1_3[4], left_margin == UNITRF_1_2[6], left_margin == UNITRF_1_1[5] )
DEAD_REGS: { };
instr: 19
MC: OP: NONE LINE:-1,
U2: OP: OR LINE:-1 STAGE:-1, // D:\working\im_apps\h264\me_fast_jitter2_kc.i:-1
B:29 = U0:OUT:0 INSTR_LOG:2|num_cols_to_right#||0 VAR: num_cols_to_right DATATYPE: INT,
RF:5:IN:0:REG:1 = B:29 STAGE:-1 VAR: num_cols_to_right DATATYPE: INT,
RF:11:IN:0:REG:2 = B:29 STAGE:-1 VAR: num_cols_to_right DATATYPE: INT,
RF:3:IN:0:REG:2 = B:29 STAGE:-1 VAR: num_cols_to_right DATATYPE: INT,
B:16 = RF:5:OUT:0:REG:1 VAR: const#11 DATATYPE: ANYINT,
U2:IN:0 = B:16 VAR: const#11 DATATYPE: ANYINT,
B:17 = RF:9:OUT:0:REG:5 VAR: const#4 DATATYPE: ANYINT,
U2:IN:1 = B:17 VAR: const#4 DATATYPE: ANYINT,
B:31 = U2:OUT:0 INSTR_LOG:1|const#15#||0 VAR: const#15 DATATYPE: ANYINT,
RF:7:IN:0:REG:4 = B:31 STAGE:-1 VAR: const#15 DATATYPE: ANYINT,
RF:13:IN:0:REG:4 = B:31 STAGE:-1 VAR: const#15 DATATYPE: ANYINT,
RF:9:IN:0:REG:2 = B:31 STAGE:-1 VAR: const#15 DATATYPE: ANYINT,
RF:12:IN:0:REG:5 = B:31 STAGE:-1 VAR: const#15 DATATYPE: ANYINT,
// OUT:ADDER_0: ISUB32 => ( num_cols_to_right == UNITRF_0_4[1], num_cols_to_right == MULRF_0_1[2], num_cols_to_right == UNITRF_0_2[2] )
// IN:ADDER_2: ( const#15 ) = OR( const#11 == UNITRF_0_4[1], const#4 == UNITRF_1_3[5] )
// OUT:ADDER_2: OR => ( const#15 == UNITRF_1_1[4], const#15 == MULRF_1_1[4], const#15 == UNITRF_1_3[2], const#15 == MULRF_1_0[5] )
DEAD_REGS: { };
instr: 20
MC: OP: NONE LINE:-1,
U2: OP: ILT32 LINE:77 STAGE:-1, // D:\working\im_apps\h264\me_fast_jitter2_kc.i:77
U0: OP: ISUB32 LINE:87 STAGE:-1, // D:\working\im_apps\h264\me_fast_jitter2_kc.i:87
B:16 = RF:5:OUT:0:REG:1 VAR: num_cols_to_right DATATYPE: INT,
U2:IN:0 = B:16 VAR: num_cols_to_right DATATYPE: INT,
B:17 = RF:9:OUT:0:REG:2 VAR: const#15 DATATYPE: ANYINT,
U2:IN:1 = B:17 VAR: const#15 DATATYPE: ANYINT,
B:12 = RF:3:OUT:0:REG:3 VAR: const#16 DATATYPE: ANYINT,
U0:IN:0 = B:12 VAR: const#16 DATATYPE: ANYINT,
B:13 = RF:7:OUT:0:REG:5 VAR: left_margin DATATYPE: INT,
U0:IN:1 = B:13 VAR: left_margin DATATYPE: INT,
// IN:ADDER_2: ( tmp#132 ) = ILT32( num_cols_to_right == UNITRF_0_4[1], const#15 == UNITRF_1_3[2] )
// IN:ADDER_0: ( tmp#136 ) = ISUB32( const#16 == UNITRF_0_2[3], left_margin == UNITRF_1_1[5] )
DEAD_REGS: { };
instr: 21
MC: OP: NONE LINE:-1,
U5: OP: NSELECT LINE:-1 STAGE:-1, // D:\working\im_apps\h264\me_fast_jitter2_kc.i:-1
B:47 = U2:OUT:0 INSTR_LOG:2|tmp#132#||0 VAR: tmp#132 DATATYPE: CC,
RF:18:IN:1:REG:1 = B:47 STAGE:-1 VAR: tmp#132 DATATYPE: CC,
B:29 = U0:OUT:0 INSTR_LOG:2|tmp#136#||0 VAR: tmp#136 DATATYPE: INT,
RF:5:IN:0:REG:1 = B:29 STAGE:-1 VAR: tmp#136 DATATYPE: INT,
B:39 = RF:18:OUT:2:REG:0 VAR: hw_const#0 DATATYPE: ANYINT,
U5:IN:2 = B:39 VAR: hw_const#0 DATATYPE: ANYINT,
B:10 = RF:6:OUT:0:REG:3 VAR: const#-2 DATATYPE: ANYINT,
U5:IN:0 = B:10 VAR: const#-2 DATATYPE: ANYINT,
B:28 = U5:OUT:0 INSTR_LOG:1|const#-2#||0 VAR: const#-2 DATATYPE: ANYINT,
RF:9:IN:0:REG:6 = B:28 STAGE:-1 VAR: const#-2 DATATYPE: ANYINT,
// OUT:ADDER_2: ILT32 => ( tmp#132 == CCRF_0[1] )
// OUT:ADDER_0: ISUB32 => ( tmp#136 == UNITRF_0_4[1] )
// IN:DIVIDER_0: ( const#-2 ) = NSELECT( hw_const#0 == CCRF_0[0], const#-2 == UNITRF_1_0[3] )
// OUT:DIVIDER_0: NSELECT => ( const#-2 == UNITRF_1_3[6] )
DEAD_REGS: { };
instr: 22
MC: OP: NONE LINE:-1,
U4: OP: SELECT LINE:77 STAGE:-1, // D:\working\im_apps\h264\me_fast_jitter2_kc.i:77
U2: OP: SHIFT32 LINE:87 STAGE:-1, // D:\working\im_apps\h264\me_fast_jitter2_kc.i:87
B:44 = RF:18:OUT:7:REG:1 VAR: tmp#132 DATATYPE: CC,
U4:IN:2 = B:44 VAR: tmp#132 DATATYPE: CC,
B:20 = RF:11:OUT:0:REG:2 VAR: num_cols_to_right DATATYPE: INT,
U4:IN:0 = B:20 VAR: num_cols_to_right DATATYPE: INT,
B:21 = RF:13:OUT:0:REG:4 VAR: const#15 DATATYPE: ANYINT,
U4:IN:1 = B:21 VAR: const#15 DATATYPE: ANYINT,
B:35 = U4:OUT:1 INSTR_LOG:1|tmp#133#||1 VAR: tmp#133 DATATYPE: INT,
RF:6:IN:0:REG:3 = B:35 STAGE:-1 VAR: tmp#133 DATATYPE: INT,
B:16 = RF:5:OUT:0:REG:1 VAR: tmp#136 DATATYPE: INT,
U2:IN:0 = B:16 VAR: tmp#136 DATATYPE: INT,
B:17 = RF:9:OUT:0:REG:6 VAR: const#-2 DATATYPE: ANYINT,
U2:IN:1 = B:17 VAR: const#-2 DATATYPE: ANYINT,
B:31 = U2:OUT:0 INSTR_LOG:1|idx#||0 VAR: idx DATATYPE: INT,
RF:3:IN:0:REG:5 = B:31 STAGE:-1 VAR: idx DATATYPE: INT,
RF:9:IN:0:REG:7 = B:31 STAGE:-1 VAR: idx DATATYPE: INT,
RF:10:IN:0:REG:4 = B:31 STAGE:-1 VAR: idx DATATYPE: INT,
RF:14:IN:0:REG:3 = B:31 STAGE:-1 VAR: idx DATATYPE: INT,
RF:11:IN:0:REG:2 = B:31 STAGE:-1 VAR: idx DATATYPE: INT,
RF:2:IN:0:REG:1 = B:31 STAGE:-1 VAR: idx DATATYPE: INT,
// IN:MULTIPLIER_1: ( tmp#133 ) = SELECT( tmp#132 == CCRF_0[1], num_cols_to_right == MULRF_0_1[2], const#15 == MULRF_1_1[4] )
// OUT:MULTIPLIER_1: SELECT => ( tmp#133 == UNITRF_1_0[3] )
// IN:ADDER_2: ( idx ) = SHIFT32( tmp#136 == UNITRF_0_4[1], const#-2 == UNITRF_1_3[6] )
// OUT:ADDER_2: SHIFT32 => ( idx == UNITRF_0_2[5], idx == UNITRF_1_3[7], idx == MULRF_0_0[4], idx == UNITRF_CID_0[3], idx == MULRF_0_1[2], idx == UNITRF_0_1[1] )
DEAD_REGS: { };
instr: 23
MC: OP: NONE LINE:-1,
U5: OP: NSELECT LINE:77 STAGE:-1, // D:\working\im_apps\h264\me_fast_jitter2_kc.i:77
U4: OP: NSELECT LINE:-1 STAGE:-1, // D:\working\im_apps\h264\me_fast_jitter2_kc.i:-1
B:39 = RF:18:OUT:2:REG:0 VAR: hw_const#0 DATATYPE: ANYINT,
U5:IN:2 = B:39 VAR: hw_const#0 DATATYPE: ANYINT,
B:10 = RF:6:OUT:0:REG:3 VAR: tmp#133 DATATYPE: INT,
U5:IN:0 = B:10 VAR: tmp#133 DATATYPE: INT,
B:28 = U5:OUT:0 INSTR_LOG:1|right_range#168#||0 VAR: right_range#168 DATATYPE: INT,
RF:4:IN:0:REG:2 = B:28 STAGE:-1 VAR: right_range#168 DATATYPE: INT,
RF:5:IN:0:REG:1 = B:28 STAGE:-1 VAR: right_range#168 DATATYPE: INT,
B:44 = RF:18:OUT:7:REG:0 VAR: hw_const#0 DATATYPE: ANYINT,
U4:IN:2 = B:44 VAR: hw_const#0 DATATYPE: ANYINT,
B:20 = RF:11:OUT:0:REG:2 VAR: idx DATATYPE: INT,
U4:IN:0 = B:20 VAR: idx DATATYPE: INT,
B:35 = U4:OUT:1 INSTR_LOG:1|idx#||1 VAR: idx DATATYPE: INT,
RF:17:IN:0:REG:1 = B:35 STAGE:-1 VAR: idx DATATYPE: INT,
// IN:DIVIDER_0: ( right_range#168 ) = NSELECT( hw_const#0 == CCRF_0[0], tmp#133 == UNITRF_1_0[3] )
// OUT:DIVIDER_0: NSELECT => ( right_range#168 == UNITRF_0_3[2], right_range#168 == UNITRF_0_4[1] )
// IN:MULTIPLIER_1: ( idx ) = NSELECT( hw_const#0 == CCRF_0[0], idx == MULRF_0_1[2] )
// OUT:MULTIPLIER_1: NSELECT => ( idx == SPIDXRF_1[1] )
DEAD_REGS: { };
instr: 24
MC: OP: NONE LINE:-1,
U1: OP: IADD32 LINE:84 STAGE:-1, // D:\working\im_apps\h264\me_fast_jitter2_kc.i:84
U5: OP: SELECT LINE:-1 STAGE:-1, // D:\working\im_apps\h264\me_fast_jitter2_kc.i:-1
B:15 = RF:8:OUT:0:REG:6 VAR: left_margin DATATYPE: INT,
U1:IN:1 = B:15 VAR: left_margin DATATYPE: INT,
B:14 = RF:4:OUT:0:REG:2 VAR: right_range DATATYPE: INT,
U1:IN:0 = B:14 VAR: right_range DATATYPE: INT,
B:39 = RF:18:OUT:2:REG:0 VAR: hw_const#0 DATATYPE: ANYINT,
U5:IN:2 = B:39 VAR: hw_const#0 DATATYPE: ANYINT,
B:11 = RF:14:OUT:0:REG:3 VAR: idx DATATYPE: INT,
U5:IN:1 = B:11 VAR: idx DATATYPE: INT,
B:28 = U5:OUT:0 INSTR_LOG:1|idx#||0 VAR: idx DATATYPE: INT,
RF:17:IN:0:REG:1 = B:28 STAGE:-1 VAR: idx DATATYPE: INT,
// IN:ADDER_1: ( tmp#134 ) = IADD32( left_margin == UNITRF_1_2[6], right_range == UNITRF_0_3[2] )
// IN:DIVIDER_0: ( idx ) = SELECT( hw_const#0 == CCRF_0[0], idx == UNITRF_CID_0[3] )
// OUT:DIVIDER_0: SELECT => ( idx == SPIDXRF_1[1] )
DEAD_REGS: { };
instr: 25
MC: OP: NONE LINE:-1,
U3: OP: NSELECT LINE:-1 STAGE:-1, // D:\working\im_apps\h264\me_fast_jitter2_kc.i:-1
B:30 = U1:OUT:0 INSTR_LOG:2|tmp#134#||0 VAR: tmp#134 DATATYPE: INT,
RF:3:IN:0:REG:3 = B:30 STAGE:-1 VAR: tmp#134 DATATYPE: INT,
B:43 = RF:18:OUT:6:REG:0 VAR: hw_const#0 DATATYPE: ANYINT,
U3:IN:2 = B:43 VAR: hw_const#0 DATATYPE: ANYINT,
B:18 = RF:10:OUT:0:REG:4 VAR: idx DATATYPE: INT,
U3:IN:0 = B:18 VAR: idx DATATYPE: INT,
B:33 = U3:OUT:1 INSTR_LOG:1|idx#||1 VAR: idx DATATYPE: INT,
RF:17:IN:0:REG:1 = B:33 STAGE:-1 VAR: idx DATATYPE: INT,
// OUT:ADDER_1: IADD32 => ( tmp#134 == UNITRF_0_2[3] )
// IN:MULTIPLIER_0: ( idx ) = NSELECT( hw_const#0 == CCRF_0[0], idx == MULRF_0_0[4] )
// OUT:MULTIPLIER_0: NSELECT => ( idx == SPIDXRF_1[1] )
DEAD_REGS: { };
instr: 26
MC: OP: NONE LINE:-1,
U0: OP: IADD32 LINE:84 STAGE:-1, // D:\working\im_apps\h264\me_fast_jitter2_kc.i:84
U4: OP: NSELECT LINE:-1 STAGE:-1, // D:\working\im_apps\h264\me_fast_jitter2_kc.i:-1
U5: OP: NSELECT LINE:-1 STAGE:-1, // D:\working\im_apps\h264\me_fast_jitter2_kc.i:-1
B:12 = RF:3:OUT:0:REG:3 VAR: tmp#134 DATATYPE: INT,
U0:IN:0 = B:12 VAR: tmp#134 DATATYPE: INT,
B:13 = RF:7:OUT:0:REG:0 VAR: hw_const#1 DATATYPE: ANYINT,
U0:IN:1 = B:13 VAR: hw_const#1 DATATYPE: ANYINT,
B:44 = RF:18:OUT:7:REG:0 VAR: hw_const#0 DATATYPE: ANYINT,
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