rle_kc.uc

H.264完整的C语言代码和DCT的代码

    B:38 = RF:18:OUT:1:REG:0 VAR: hw_const#0 DATATYPE: ANYINT,
    U7:IN:2 = B:38 VAR: hw_const#0 DATATYPE: ANYINT,
    B:8 = RF:2:OUT:0:REG:0 VAR: hw_const#0 DATATYPE: ANYINT,
    U7:IN:0 = B:8 VAR: hw_const#0 DATATYPE: ANYINT,
    B:27 = U7:OUT:0 INSTR_LOG:1|tmp#66#||0 VAR: tmp#66 DATATYPE: HALF2,
    RF:6:IN:0:REG:5 = B:27 STAGE:-1 VAR: tmp#66 DATATYPE: HALF2,
    B:39 = RF:18:OUT:2:REG:0 VAR: hw_const#0 DATATYPE: ANYINT,
    U5:IN:2 = B:39 VAR: hw_const#0 DATATYPE: ANYINT,
    B:11 = RF:14:OUT:0:REG:0 VAR: cluster#id DATATYPE: ANYINT,
    U5:IN:1 = B:11 VAR: cluster#id DATATYPE: ANYINT,
    B:28 = U5:OUT:0 INSTR_LOG:1|cluster#id#||0 VAR: cluster#id DATATYPE: ANYINT,
    RF:4:IN:0:REG:6 = B:28 STAGE:-1 VAR: cluster#id DATATYPE: ANYINT,
    RF:16:IN:0:REG:1 = B:28 STAGE:-1 VAR: cluster#id DATATYPE: ANYINT,
    RF:17:IN:0:REG:1 = B:28 STAGE:-1 VAR: cluster#id DATATYPE: ANYINT,
    RF:5:IN:0:REG:5 = B:28 STAGE:-1 VAR: cluster#id DATATYPE: ANYINT,
    B:42 = RF:18:OUT:5:REG:0 VAR: hw_const#0 DATATYPE: ANYINT,
    U2:IN:2 = B:42 VAR: hw_const#0 DATATYPE: ANYINT,
    B:17 = RF:9:OUT:0:REG:0 VAR: hw_const#1 DATATYPE: ANYINT,
    U2:IN:1 = B:17 VAR: hw_const#1 DATATYPE: ANYINT,
    B:31 = U2:OUT:0 INSTR_LOG:1|const#1#||0 VAR: const#1 DATATYPE: ANYINT,
    RF:3:IN:0:REG:7 = B:31 STAGE:-1 VAR: const#1 DATATYPE: ANYINT,
    RF:2:IN:0:REG:3 = B:31 STAGE:-1 VAR: const#1 DATATYPE: ANYINT,
    B:12 = RF:3:OUT:0:REG:3 VAR: clzero DATATYPE: UINT,
    U0:IN:0 = B:12 VAR: clzero DATATYPE: UINT,
    B:13 = RF:7:OUT:0:REG:6 VAR: tmp#7 DATATYPE: UINT,
    U0:IN:1 = B:13 VAR: tmp#7 DATATYPE: UINT,
    B:45 = U0:OUT:0 INSTR_LOG:1|Iframe#||0 VAR: Iframe DATATYPE: CC,
    RF:18:IN:0:REG:3 = B:45 STAGE:-1 VAR: Iframe DATATYPE: CC,
    B:14 = RF:4:OUT:0:REG:6 VAR: const#-9 DATATYPE: ANYINT,
    U1:IN:0 = B:14 VAR: const#-9 DATATYPE: ANYINT,
    B:15 = RF:8:OUT:0:REG:4 VAR: const#-8 DATATYPE: ANYINT,
    U1:IN:1 = B:15 VAR: const#-8 DATATYPE: ANYINT,
    B:30 = U1:OUT:0 INSTR_LOG:1|const#-16#||0 VAR: const#-16 DATATYPE: ANYINT,
    RF:8:IN:0:REG:4 = B:30 STAGE:-1 VAR: const#-16 DATATYPE: ANYINT,
    RF:9:IN:0:REG:4 = B:30 STAGE:-1 VAR: const#-16 DATATYPE: ANYINT,
    RF:7:IN:0:REG:6 = B:30 STAGE:-1 VAR: const#-16 DATATYPE: ANYINT,
    B:49 = U8:OUT:0 INSTR_LOG:1|jb_out#5#||0 VAR: jb_out#5 DATATYPE: UNDEFINED,
    RF:19:IN:0:REG:2 = B:49 STAGE:-1 VAR: jb_out#5 DATATYPE: UNDEFINED,
    //  IN:COMM_SCHED_0: ( tmp#66 ) = NSELECT( hw_const#0 == CCRF_0[0], hw_const#0 == UNITRF_0_1[0] )
    // OUT:COMM_SCHED_0: NSELECT => ( tmp#66 == UNITRF_1_0[5] )
    //  IN:DIVIDER_0: ( cluster#id ) = SELECT( hw_const#0 == CCRF_0[0], cluster#id == UNITRF_CID_0[0] )
    // OUT:DIVIDER_0: SELECT => ( cluster#id == UNITRF_0_3[6], cluster#id == SPIDXRF_0[1], cluster#id == SPIDXRF_1[1], cluster#id == UNITRF_0_4[5] )
    //  IN:ADDER_2: ( const#1 ) = SELECT( hw_const#0 == CCRF_0[0], hw_const#1 == UNITRF_1_3[0] )
    // OUT:ADDER_2: SELECT => ( const#1 == UNITRF_0_2[7], const#1 == UNITRF_0_1[3] )
    //  IN:ADDER_0: ( Iframe ) = AND( clzero == UNITRF_0_2[3], tmp#7 == UNITRF_1_1[6] )
    // OUT:ADDER_0: AND => ( Iframe == CCRF_0[3] )
    //  IN:ADDER_1: ( const#-16 ) = AND( const#-9 == UNITRF_0_3[6], const#-8 == UNITRF_1_2[4] )
    // OUT:ADDER_1: AND => ( const#-16 == UNITRF_1_2[4], const#-16 == UNITRF_1_3[4], const#-16 == UNITRF_1_1[6] )
    // OUT:SP_SCHED_WRITE_0: SPWRITE => ( sp_motion#3 == SP_SCHED_RF_0[204] )
    // OUT:JUKEBOX_SCHED_0: INIT_COSTATE => ( jb_out#5 == JBRF_0[2] )
    DEAD_REGS: {  };
instr: 19
    MC: OP: NONE LINE:-1,
    B:22 = IN:0 STAGE:-1 LINE:104 VAR: tmp DATATYPE: HALF2,
    RF:1:IN:0:REG:2 = B:22 STAGE:-1 VAR: tmp DATATYPE: HALF2,
    // OUT:INOUT_0: DATA_IN => ( tmp == UNITRF_0_0[2] )
    DEAD_REGS: {  };
instr: 20
    MC: OP: NONE LINE:-1,
    U6: OP: SPWRITE LINE:104 SP_BASE:180 SP_STAGE:-1:0:0 STAGE:-1, // D:\working\im_apps\h264\rle_kc.i:104
    B:22 = IN:0 STAGE:-1 LINE:105 VAR: tmp DATATYPE: HALF2,
    RF:1:IN:0:REG:2 = B:22 STAGE:-1 VAR: tmp DATATYPE: HALF2,
    B:7 = RF:17:OUT:0:REG:0 VAR: hw_const#0 DATATYPE: ANYINT,
    U6:IN:2 = B:7 VAR: hw_const#0 DATATYPE: ANYINT,
    B:6 = RF:1:OUT:0:REG:2 VAR: tmp DATATYPE: HALF2,
    U6:IN:1 = B:6 VAR: tmp DATATYPE: HALF2,
    // OUT:INOUT_0: DATA_IN => ( tmp == UNITRF_0_0[2] )
    //  IN:SP_SCHED_WRITE_0: ( Y2Y1 ) = SPWRITE( hw_const#0 == SPIDXRF_1[0], tmp == UNITRF_0_0[2] )
    DEAD_REGS: {  };
instr: 21
    MC: OP: NONE LINE:-1,
    U6: OP: SPWRITE LINE:105 SP_BASE:181 SP_STAGE:-1:0:0 STAGE:-1, // D:\working\im_apps\h264\rle_kc.i:105
    B:22 = IN:0 STAGE:-1 LINE:106 VAR: tmp DATATYPE: HALF2,
    RF:1:IN:0:REG:2 = B:22 STAGE:-1 VAR: tmp DATATYPE: HALF2,
    B:7 = RF:17:OUT:0:REG:0 VAR: hw_const#0 DATATYPE: ANYINT,
    U6:IN:2 = B:7 VAR: hw_const#0 DATATYPE: ANYINT,
    B:6 = RF:1:OUT:0:REG:2 VAR: tmp DATATYPE: HALF2,
    U6:IN:1 = B:6 VAR: tmp DATATYPE: HALF2,
    // OUT:INOUT_0: DATA_IN => ( tmp == UNITRF_0_0[2] )
    //  IN:SP_SCHED_WRITE_0: ( Y2Y1 ) = SPWRITE( hw_const#0 == SPIDXRF_1[0], tmp == UNITRF_0_0[2] )
    // OUT:SP_SCHED_WRITE_0: SPWRITE => ( Y2Y1 == SP_SCHED_RF_0[180] )
    DEAD_REGS: {  };
instr: 22
    MC: OP: NONE LINE:-1,
    U6: OP: SPWRITE LINE:106 SP_BASE:182 SP_STAGE:-1:0:0 STAGE:-1, // D:\working\im_apps\h264\rle_kc.i:106
    B:22 = IN:0 STAGE:-1 LINE:107 VAR: tmp DATATYPE: HALF2,
    RF:1:IN:0:REG:2 = B:22 STAGE:-1 VAR: tmp DATATYPE: HALF2,
    B:7 = RF:17:OUT:0:REG:0 VAR: hw_const#0 DATATYPE: ANYINT,
    U6:IN:2 = B:7 VAR: hw_const#0 DATATYPE: ANYINT,
    B:6 = RF:1:OUT:0:REG:2 VAR: tmp DATATYPE: HALF2,
    U6:IN:1 = B:6 VAR: tmp DATATYPE: HALF2,
    // OUT:INOUT_0: DATA_IN => ( tmp == UNITRF_0_0[2] )
    //  IN:SP_SCHED_WRITE_0: ( Y2Y1 ) = SPWRITE( hw_const#0 == SPIDXRF_1[0], tmp == UNITRF_0_0[2] )
    // OUT:SP_SCHED_WRITE_0: SPWRITE => ( Y2Y1 == SP_SCHED_RF_0[180] )
    DEAD_REGS: {  };
instr: 23
    MC: OP: NONE LINE:-1,
    U6: OP: SPWRITE LINE:107 SP_BASE:183 SP_STAGE:-1:0:0 STAGE:-1, // D:\working\im_apps\h264\rle_kc.i:107
    B:22 = IN:0 STAGE:-1 LINE:108 VAR: tmp DATATYPE: HALF2,
    RF:1:IN:0:REG:2 = B:22 STAGE:-1 VAR: tmp DATATYPE: HALF2,
    B:7 = RF:17:OUT:0:REG:0 VAR: hw_const#0 DATATYPE: ANYINT,
    U6:IN:2 = B:7 VAR: hw_const#0 DATATYPE: ANYINT,
    B:6 = RF:1:OUT:0:REG:2 VAR: tmp DATATYPE: HALF2,
    U6:IN:1 = B:6 VAR: tmp DATATYPE: HALF2,
    // OUT:INOUT_0: DATA_IN => ( tmp == UNITRF_0_0[2] )
    //  IN:SP_SCHED_WRITE_0: ( Y2Y1 ) = SPWRITE( hw_const#0 == SPIDXRF_1[0], tmp == UNITRF_0_0[2] )
    // OUT:SP_SCHED_WRITE_0: SPWRITE => ( Y2Y1 == SP_SCHED_RF_0[180] )
    DEAD_REGS: {  };
instr: 24
    MC: OP: NONE LINE:-1,
    U6: OP: SPWRITE LINE:108 SP_BASE:184 SP_STAGE:-1:0:0 STAGE:-1, // D:\working\im_apps\h264\rle_kc.i:108
    B:22 = IN:0 STAGE:-1 LINE:109 VAR: tmp DATATYPE: HALF2,
    RF:1:IN:0:REG:2 = B:22 STAGE:-1 VAR: tmp DATATYPE: HALF2,
    B:7 = RF:17:OUT:0:REG:0 VAR: hw_const#0 DATATYPE: ANYINT,
    U6:IN:2 = B:7 VAR: hw_const#0 DATATYPE: ANYINT,
    B:6 = RF:1:OUT:0:REG:2 VAR: tmp DATATYPE: HALF2,
    U6:IN:1 = B:6 VAR: tmp DATATYPE: HALF2,
    // OUT:INOUT_0: DATA_IN => ( tmp == UNITRF_0_0[2] )
    //  IN:SP_SCHED_WRITE_0: ( Y2Y1 ) = SPWRITE( hw_const#0 == SPIDXRF_1[0], tmp == UNITRF_0_0[2] )
    // OUT:SP_SCHED_WRITE_0: SPWRITE => ( Y2Y1 == SP_SCHED_RF_0[180] )
    DEAD_REGS: {  };
instr: 25
    MC: OP: NONE LINE:-1,
    U6: OP: SPWRITE LINE:109 SP_BASE:185 SP_STAGE:-1:0:0 STAGE:-1, // D:\working\im_apps\h264\rle_kc.i:109
    B:22 = IN:0 STAGE:-1 LINE:110 VAR: tmp DATATYPE: HALF2,
    RF:1:IN:0:REG:2 = B:22 STAGE:-1 VAR: tmp DATATYPE: HALF2,
    B:7 = RF:17:OUT:0:REG:0 VAR: hw_const#0 DATATYPE: ANYINT,
    U6:IN:2 = B:7 VAR: hw_const#0 DATATYPE: ANYINT,
    B:6 = RF:1:OUT:0:REG:2 VAR: tmp DATATYPE: HALF2,
    U6:IN:1 = B:6 VAR: tmp DATATYPE: HALF2,
    // OUT:INOUT_0: DATA_IN => ( tmp == UNITRF_0_0[2] )
    //  IN:SP_SCHED_WRITE_0: ( Y2Y1 ) = SPWRITE( hw_const#0 == SPIDXRF_1[0], tmp == UNITRF_0_0[2] )
    // OUT:SP_SCHED_WRITE_0: SPWRITE => ( Y2Y1 == SP_SCHED_RF_0[180] )
    DEAD_REGS: {  };
instr: 26
    MC: OP: NONE LINE:-1,
    U6: OP: SPWRITE LINE:110 SP_BASE:186 SP_STAGE:-1:0:0 STAGE:-1, // D:\working\im_apps\h264\rle_kc.i:110
    B:22 = IN:0 STAGE:-1 LINE:111 VAR: tmp DATATYPE: HALF2,
    RF:1:IN:0:REG:2 = B:22 STAGE:-1 VAR: tmp DATATYPE: HALF2,
    B:7 = RF:17:OUT:0:REG:0 VAR: hw_const#0 DATATYPE: ANYINT,
    U6:IN:2 = B:7 VAR: hw_const#0 DATATYPE: ANYINT,
    B:6 = RF:1:OUT:0:REG:2 VAR: tmp DATATYPE: HALF2,
    U6:IN:1 = B:6 VAR: tmp DATATYPE: HALF2,
    // OUT:INOUT_0: DATA_IN => ( tmp == UNITRF_0_0[2] )
    //  IN:SP_SCHED_WRITE_0: ( Y2Y1 ) = SPWRITE( hw_const#0 == SPIDXRF_1[0], tmp == UNITRF_0_0[2] )
    // OUT:SP_SCHED_WRITE_0: SPWRITE => ( Y2Y1 == SP_SCHED_RF_0[180] )
    DEAD_REGS: {  };
instr: 27
    MC: OP: NONE LINE:-1,
    U6: OP: SPWRITE LINE:111 SP_BASE:187 SP_STAGE:-1:0:0 STAGE:-1, // D:\working\im_apps\h264\rle_kc.i:111
    B:23 = IN:1 STAGE:-1 LINE:120 VAR: tmp DATATYPE: HALF2,
    RF:1:IN:0:REG:2 = B:23 STAGE:-1 VAR: tmp DATATYPE: HALF2,
    B:7 = RF:17:OUT:0:REG:0 VAR: hw_const#0 DATATYPE: ANYINT,
    U6:IN:2 = B:7 VAR: hw_const#0 DATATYPE: ANYINT,
    B:6 = RF:1:OUT:0:REG:2 VAR: tmp DATATYPE: HALF2,
    U6:IN:1 = B:6 VAR: tmp DATATYPE: HALF2,
    // OUT:INOUT_1: DATA_IN => ( tmp == UNITRF_0_0[2] )
    //  IN:SP_SCHED_WRITE_0: ( Y2Y1 ) = SPWRITE( hw_const#0 == SPIDXRF_1[0], tmp == UNITRF_0_0[2] )
    // OUT:SP_SCHED_WRITE_0: SPWRITE => ( Y2Y1 == SP_SCHED_RF_0[180] )
    DEAD_REGS: {  };
instr: 28
    MC: OP: NONE LINE:-1,
    U6: OP: SPWRITE LINE:120 SP_BASE:188 SP_STAGE:-1:0:0 STAGE:-1, // D:\working\im_apps\h264\rle_kc.i:120
    B:23 = IN:1 STAGE:-1 LINE:120 VAR: tmp DATATYPE: HALF2,
    RF:1:IN:0:REG:2 = B:23 STAGE:-1 VAR: tmp DATATYPE: HALF2,
    B:7 = RF:17:OUT:0:REG:0 VAR: hw_const#0 DATATYPE: ANYINT,
    U6:IN:2 = B:7 VAR: hw_const#0 DATATYPE: ANYINT,
    B:6 = RF:1:OUT:0:REG:2 VAR: tmp DATATYPE: HALF2,
    U6:IN:1 = B:6 VAR: tmp DATATYPE: HALF2,
    // OUT:INOUT_1: DATA_IN => ( tmp == UNITRF_0_0[2] )
    //  IN:SP_SCHED_WRITE_0: ( CrCb ) = SPWRITE( hw_const#0 == SPIDXRF_1[0], tmp == UNITRF_0_0[2] )
    // OUT:SP_SCHED_WRITE_0: SPWRITE => ( Y2Y1 == SP_SCHED_RF_0[180] )
    DEAD_REGS: {  };
instr: 29
    MC: OP: NONE LINE:-1,
    U6: OP: SPWRITE LINE:120 SP_BASE:189 SP_STAGE:-1:0:0 STAGE:-1, // D:\working\im_apps\h264\rle_kc.i:120
    B:23 = IN:1 STAGE:-1 LINE:121 VAR: tmp DATATYPE: HALF2,
    RF:1:IN:0:REG:2 = B:23 STAGE:-1 VAR: tmp DATATYPE: HALF2,
    B:7 = RF:17:OUT:0:REG:0 VAR: hw_const#0 DATATYPE: ANYINT,
    U6:IN:2 = B:7 VAR: hw_const#0 DATATYPE: ANYINT,
    B:6 = RF:1:OUT:0:REG:2 VAR: tmp DATATYPE: HALF2,
    U6:IN:1 = B:6 VAR: tmp DATATYPE: HALF2,
    // OUT:INOUT_1: DATA_IN => ( tmp == UNITRF_0_0[2] )
    //  IN:SP_SCHED_WRITE_0: ( CrCb ) = SPWRITE( hw_const#0 == SPIDXRF_1[0], tmp == UNITRF_0_0[2] )
    // OUT:SP_SCHED_WRITE_0: SPWRITE => ( CrCb == SP_SCHED_RF_0[188] )
    DEAD_REGS: {  };
instr: 30
    MC: OP: NONE LINE:-1,
    U6: OP: SPWRITE LINE:121 SP_BASE:190 SP_STAGE:-1:0:0 STAGE:-1, // D:\working\im_apps\h264\rle_kc.i:121
    B:23 = IN:1 STAGE:-1 LINE:121 VAR: tmp DATATYPE: HALF2,
    RF:1:IN:0:REG:2 = B:23 STAGE:-1 VAR: tmp DATATYPE: HALF2,
    B:7 = RF:17:OUT:0:REG:0 VAR: hw_const#0 DATATYPE: ANYINT,
    U6:IN:2 = B:7 VAR: hw_const#0 DATATYPE: ANYINT,
    B:6 = RF:1:OUT:0:REG:2 VAR: tmp DATATYPE: HALF2,
    U6:IN:1 = B:6 VAR: tmp DATATYPE: HALF2,
    // OUT:INOUT_1: DATA_IN => ( tmp == UNITRF_0_0[2] )
    //  IN:SP_SCHED_WRITE_0: ( CrCb ) = SPWRITE( hw_const#0 == SPIDXRF_1[0], tmp == UNITRF_0_0[2] )
    // OUT:SP_SCHED_WRITE_0: SPWRITE => ( CrCb == SP_SCHED_RF_0[188] )
    DEAD_REGS: {  };
instr: 31
    MC: OP: NONE LINE:-1,
    U6: OP: SPWRITE LINE:121 SP_BASE:191 SP_STAGE:-1:0:0 STAGE:-1, // D:\working\im_apps\h264\rle_kc.i:121
    B:23 = IN:1 STAGE:-1 LINE:122 VAR: tmp DATATYPE: HALF2,
    RF:1:IN:0:REG:2 = B:23 STAGE:-1 VAR: tmp DATATYPE: HALF2,
    B:7 = RF:17:OUT:0:REG:0 VAR: hw_const#0 DATATYPE: ANYINT,
    U6:IN:2 = B:7 VAR: hw_const#0 DATATYPE: ANYINT,
    B:6 = RF:1:OUT:0:REG:2 VAR: tmp DATATYPE: HALF2,
    U6:IN:1 = B:6 VAR: tmp DATATYPE: HALF2,