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📄 me_fast_jitter1_kc.uc

📁 H.264完整的C语言代码和DCT的代码
💻 UC
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    U1: OP: SHIFT32 LINE:52 STAGE:-1, // D:\working\im_apps\h264\me_fast_jitter1_kc.i:52
    U5: OP: SELECT LINE:-1 STAGE:-1, // D:\working\im_apps\h264\me_fast_jitter1_kc.i:-1
    B:17 = RF:9:OUT:0:REG:6 VAR: left_margin DATATYPE: INT,
    U2:IN:1 = B:17 VAR: left_margin DATATYPE: INT,
    B:16 = RF:5:OUT:0:REG:1 VAR: right_range DATATYPE: INT,
    U2:IN:0 = B:16 VAR: right_range DATATYPE: INT,
    B:14 = RF:4:OUT:0:REG:6 VAR: margin DATATYPE: INT,
    U1:IN:0 = B:14 VAR: margin DATATYPE: INT,
    B:15 = RF:8:OUT:0:REG:6 VAR: const#-8 DATATYPE: ANYINT,
    U1:IN:1 = B:15 VAR: const#-8 DATATYPE: ANYINT,
    B:30 = U1:OUT:0 INSTR_LOG:1|tmp#122#||0 VAR: tmp#122 DATATYPE: INT,
    RF:7:IN:0:REG:4 = B:30 STAGE:-1 VAR: tmp#122 DATATYPE: INT,
    B:39 = RF:18:OUT:2:REG:0 VAR: hw_const#0 DATATYPE: ANYINT,
    U5:IN:2 = B:39 VAR: hw_const#0 DATATYPE: ANYINT,
    B:11 = RF:14:OUT:0:REG:3 VAR: idx DATATYPE: INT,
    U5:IN:1 = B:11 VAR: idx DATATYPE: INT,
    B:28 = U5:OUT:0 INSTR_LOG:1|idx#||0 VAR: idx DATATYPE: INT,
    RF:17:IN:0:REG:1 = B:28 STAGE:-1 VAR: idx DATATYPE: INT,
    //  IN:ADDER_2: ( tmp#140 ) = IADD32( left_margin == UNITRF_1_3[6], right_range == UNITRF_0_4[1] )
    //  IN:ADDER_1: ( tmp#122 ) = SHIFT32( margin == UNITRF_0_3[6], const#-8 == UNITRF_1_2[6] )
    // OUT:ADDER_1: SHIFT32 => ( tmp#122 == UNITRF_1_1[4] )
    //  IN:DIVIDER_0: ( idx ) = SELECT( hw_const#0 == CCRF_0[0], idx == UNITRF_CID_0[3] )
    // OUT:DIVIDER_0: SELECT => ( idx == SPIDXRF_1[1] )
    DEAD_REGS: {  };
instr: 25
    MC: OP: NONE LINE:-1,
    U0: OP: AND LINE:52 STAGE:-1, // D:\working\im_apps\h264\me_fast_jitter1_kc.i:52
    U1: OP: AND LINE:51 STAGE:-1, // D:\working\im_apps\h264\me_fast_jitter1_kc.i:51
    U5: OP: SELECT LINE:-1 STAGE:-1, // D:\working\im_apps\h264\me_fast_jitter1_kc.i:-1
    B:31 = U2:OUT:0 INSTR_LOG:2|tmp#140#||0 VAR: tmp#140 DATATYPE: INT,
    RF:4:IN:0:REG:5 = B:31 STAGE:-1 VAR: tmp#140 DATATYPE: INT,
    B:13 = RF:7:OUT:0:REG:4 VAR: tmp#122 DATATYPE: INT,
    U0:IN:1 = B:13 VAR: tmp#122 DATATYPE: INT,
    B:12 = RF:3:OUT:0:REG:3 VAR: const#255 DATATYPE: ANYINT,
    U0:IN:0 = B:12 VAR: const#255 DATATYPE: ANYINT,
    B:29 = U0:OUT:0 INSTR_LOG:1|bottom_margin#||0 VAR: bottom_margin DATATYPE: INT,
    RF:5:IN:0:REG:1 = B:29 STAGE:-1 VAR: bottom_margin DATATYPE: INT,
    RF:10:IN:0:REG:2 = B:29 STAGE:-1 VAR: bottom_margin DATATYPE: INT,
    B:15 = RF:8:OUT:0:REG:5 VAR: margin DATATYPE: INT,
    U1:IN:1 = B:15 VAR: margin DATATYPE: INT,
    B:14 = RF:4:OUT:0:REG:5 VAR: const#255 DATATYPE: ANYINT,
    U1:IN:0 = B:14 VAR: const#255 DATATYPE: ANYINT,
    B:30 = U1:OUT:0 INSTR_LOG:1|top_margin#||0 VAR: top_margin DATATYPE: INT,
    RF:3:IN:0:REG:3 = B:30 STAGE:-1 VAR: top_margin DATATYPE: INT,
    RF:11:IN:0:REG:3 = B:30 STAGE:-1 VAR: top_margin DATATYPE: INT,
    B:39 = RF:18:OUT:2:REG:0 VAR: hw_const#0 DATATYPE: ANYINT,
    U5:IN:2 = B:39 VAR: hw_const#0 DATATYPE: ANYINT,
    B:11 = RF:14:OUT:0:REG:3 VAR: idx DATATYPE: INT,
    U5:IN:1 = B:11 VAR: idx DATATYPE: INT,
    B:28 = U5:OUT:0 INSTR_LOG:1|idx#||0 VAR: idx DATATYPE: INT,
    RF:17:IN:0:REG:1 = B:28 STAGE:-1 VAR: idx DATATYPE: INT,
    // OUT:ADDER_2: IADD32 => ( tmp#140 == UNITRF_0_3[5] )
    //  IN:ADDER_0: ( bottom_margin ) = AND( tmp#122 == UNITRF_1_1[4], const#255 == UNITRF_0_2[3] )
    // OUT:ADDER_0: AND => ( bottom_margin == UNITRF_0_4[1], bottom_margin == MULRF_0_0[2] )
    //  IN:ADDER_1: ( top_margin ) = AND( margin == UNITRF_1_2[5], const#255 == UNITRF_0_3[5] )
    // OUT:ADDER_1: AND => ( top_margin == UNITRF_0_2[3], top_margin == MULRF_0_1[3] )
    //  IN:DIVIDER_0: ( idx ) = SELECT( hw_const#0 == CCRF_0[0], idx == UNITRF_CID_0[3] )
    // OUT:DIVIDER_0: SELECT => ( idx == SPIDXRF_1[1] )
    DEAD_REGS: {  };
instr: 26
    MC: OP: NONE LINE:-1,
    U1: OP: IADD32 LINE:95 STAGE:-1, // D:\working\im_apps\h264\me_fast_jitter1_kc.i:95
    U2: OP: ILT32 LINE:84 STAGE:-1, // D:\working\im_apps\h264\me_fast_jitter1_kc.i:84
    U0: OP: ILT32 LINE:83 STAGE:-1, // D:\working\im_apps\h264\me_fast_jitter1_kc.i:83
    U5: OP: SELECT LINE:-1 STAGE:-1, // D:\working\im_apps\h264\me_fast_jitter1_kc.i:-1
    B:14 = RF:4:OUT:0:REG:5 VAR: tmp#140 DATATYPE: INT,
    U1:IN:0 = B:14 VAR: tmp#140 DATATYPE: INT,
    B:15 = RF:8:OUT:0:REG:0 VAR: hw_const#1 DATATYPE: ANYINT,
    U1:IN:1 = B:15 VAR: hw_const#1 DATATYPE: ANYINT,
    B:16 = RF:5:OUT:0:REG:1 VAR: bottom_margin DATATYPE: INT,
    U2:IN:0 = B:16 VAR: bottom_margin DATATYPE: INT,
    B:17 = RF:9:OUT:0:REG:4 VAR: const#15 DATATYPE: ANYINT,
    U2:IN:1 = B:17 VAR: const#15 DATATYPE: ANYINT,
    B:12 = RF:3:OUT:0:REG:3 VAR: top_margin DATATYPE: INT,
    U0:IN:0 = B:12 VAR: top_margin DATATYPE: INT,
    B:13 = RF:7:OUT:0:REG:2 VAR: const#16 DATATYPE: ANYINT,
    U0:IN:1 = B:13 VAR: const#16 DATATYPE: ANYINT,
    B:39 = RF:18:OUT:2:REG:0 VAR: hw_const#0 DATATYPE: ANYINT,
    U5:IN:2 = B:39 VAR: hw_const#0 DATATYPE: ANYINT,
    B:11 = RF:14:OUT:0:REG:3 VAR: idx DATATYPE: INT,
    U5:IN:1 = B:11 VAR: idx DATATYPE: INT,
    B:28 = U5:OUT:0 INSTR_LOG:1|idx#||0 VAR: idx DATATYPE: INT,
    RF:17:IN:0:REG:1 = B:28 STAGE:-1 VAR: idx DATATYPE: INT,
    //  IN:ADDER_1: ( tmp#141 ) = IADD32( tmp#140 == UNITRF_0_3[5], hw_const#1 == UNITRF_1_2[0] )
    //  IN:ADDER_2: ( tmp#133 ) = ILT32( bottom_margin == UNITRF_0_4[1], const#15 == UNITRF_1_3[4] )
    //  IN:ADDER_0: ( tmp#130 ) = ILT32( top_margin == UNITRF_0_2[3], const#16 == UNITRF_1_1[2] )
    //  IN:DIVIDER_0: ( idx ) = SELECT( hw_const#0 == CCRF_0[0], idx == UNITRF_CID_0[3] )
    // OUT:DIVIDER_0: SELECT => ( idx == SPIDXRF_1[1] )
    DEAD_REGS: {  };
instr: 27
    MC: OP: NONE LINE:-1 UCRF_RD:2,
    U7: OP: COMMUCDATA LINE:47 STAGE:-1, // D:\working\im_apps\h264\me_fast_jitter1_kc.i:47
    U5: OP: SELECT LINE:-1 STAGE:-1, // D:\working\im_apps\h264\me_fast_jitter1_kc.i:-1
    U4: OP: NSELECT LINE:-1 STAGE:-1, // D:\working\im_apps\h264\me_fast_jitter1_kc.i:-1
    B:30 = U1:OUT:0 INSTR_LOG:2|tmp#141#||0 VAR: tmp#141 DATATYPE: INT,
    RF:3:IN:0:REG:3 = B:30 STAGE:-1 VAR: tmp#141 DATATYPE: INT,
    B:9 = RF:15:OUT:0:REG:0 VAR: hw_const#8 DATATYPE: ANYINT,
    U7:IN:1 = B:9 VAR: hw_const#8 DATATYPE: ANYINT,
    B:8 = RF:2:OUT:0:REG:0 VAR: hw_const#0 DATATYPE: ANYINT,
    U7:IN:0 = B:8 VAR: hw_const#0 DATATYPE: ANYINT,
    B:27 = U7:OUT:0 INSTR_LOG:1|offsets#||0 VAR: offsets DATATYPE: UINT,
    RF:5:IN:0:REG:1 = B:27 STAGE:-1 VAR: offsets DATATYPE: UINT,
    RF:6:IN:0:REG:4 = B:27 STAGE:-1 VAR: offsets DATATYPE: UINT,
    B:47 = U2:OUT:0 INSTR_LOG:2|tmp#133#||0 VAR: tmp#133 DATATYPE: CC,
    RF:18:IN:1:REG:1 = B:47 STAGE:-1 VAR: tmp#133 DATATYPE: CC,
    B:45 = U0:OUT:0 INSTR_LOG:2|tmp#130#||0 VAR: tmp#130 DATATYPE: CC,
    RF:18:IN:0:REG:2 = B:45 STAGE:-1 VAR: tmp#130 DATATYPE: CC,
    B:39 = RF:18:OUT:2:REG:0 VAR: hw_const#0 DATATYPE: ANYINT,
    U5:IN:2 = B:39 VAR: hw_const#0 DATATYPE: ANYINT,
    B:11 = RF:14:OUT:0:REG:3 VAR: idx DATATYPE: INT,
    U5:IN:1 = B:11 VAR: idx DATATYPE: INT,
    B:28 = U5:OUT:0 INSTR_LOG:1|idx#||0 VAR: idx DATATYPE: INT,
    RF:17:IN:0:REG:1 = B:28 STAGE:-1 VAR: idx DATATYPE: INT,
    B:44 = RF:18:OUT:7:REG:0 VAR: hw_const#0 DATATYPE: ANYINT,
    U4:IN:2 = B:44 VAR: hw_const#0 DATATYPE: ANYINT,
    B:20 = RF:11:OUT:0:REG:2 VAR: const#-2 DATATYPE: ANYINT,
    U4:IN:0 = B:20 VAR: const#-2 DATATYPE: ANYINT,
    B:35 = U4:OUT:1 INSTR_LOG:1|const#-2#||1 VAR: const#-2 DATATYPE: ANYINT,
    RF:9:IN:0:REG:4 = B:35 STAGE:-1 VAR: const#-2 DATATYPE: ANYINT,
    RF:8:IN:0:REG:5 = B:35 STAGE:-1 VAR: const#-2 DATATYPE: ANYINT,
    RF:7:IN:0:REG:4 = B:35 STAGE:-1 VAR: const#-2 DATATYPE: ANYINT,
    // OUT:ADDER_1: IADD32 => ( tmp#141 == UNITRF_0_2[3] )
    //  IN:COMM_SCHED_0: ( offsets ) = COMMUCDATA( hw_const#8 == PERMRF_0[0], hw_const#0 == UNITRF_0_1[0], uc_offsets == UCRF_0[2] )
    // OUT:COMM_SCHED_0: COMMUCDATA => ( offsets == UNITRF_0_4[1], offsets == UNITRF_1_0[4] )
    // OUT:ADDER_2: ILT32 => ( tmp#133 == CCRF_0[1] )
    // OUT:ADDER_0: ILT32 => ( tmp#130 == CCRF_0[2] )
    //  IN:DIVIDER_0: ( idx ) = SELECT( hw_const#0 == CCRF_0[0], idx == UNITRF_CID_0[3] )
    // OUT:DIVIDER_0: SELECT => ( idx == SPIDXRF_1[1] )
    //  IN:MULTIPLIER_1: ( const#-2 ) = NSELECT( hw_const#0 == CCRF_0[0], const#-2 == MULRF_0_1[2] )
    // OUT:MULTIPLIER_1: NSELECT => ( const#-2 == UNITRF_1_3[4], const#-2 == UNITRF_1_2[5], const#-2 == UNITRF_1_1[4] )
    DEAD_REGS: {  };
instr: 28
    MC: OP: NONE LINE:-1,
    U0: OP: SHIFT32 LINE:95 STAGE:-1, // D:\working\im_apps\h264\me_fast_jitter1_kc.i:95
    U7: OP: SELECT LINE:-1 STAGE:-1, // D:\working\im_apps\h264\me_fast_jitter1_kc.i:-1
    U2: OP: AND LINE:55 STAGE:-1, // D:\working\im_apps\h264\me_fast_jitter1_kc.i:55
    U1: OP: OR LINE:-1 STAGE:-1, // D:\working\im_apps\h264\me_fast_jitter1_kc.i:-1
    U5: OP: NSELECT LINE:-1 STAGE:-1, // D:\working\im_apps\h264\me_fast_jitter1_kc.i:-1
    U3: OP: NSELECT LINE:-1 STAGE:-1, // D:\working\im_apps\h264\me_fast_jitter1_kc.i:-1
    B:12 = RF:3:OUT:0:REG:3 VAR: tmp#141 DATATYPE: INT,
    U0:IN:0 = B:12 VAR: tmp#141 DATATYPE: INT,
    B:13 = RF:7:OUT:0:REG:4 VAR: const#-2 DATATYPE: ANYINT,
    U0:IN:1 = B:13 VAR: const#-2 DATATYPE: ANYINT,
    B:29 = U0:OUT:0 INSTR_LOG:1|i#||0 VAR: i DATATYPE: INT,
    RF:15:IN:0:REG:2 = B:29 STAGE:-1 VAR: i DATATYPE: INT,
    B:38 = RF:18:OUT:1:REG:0 VAR: hw_const#0 DATATYPE: ANYINT,
    U7:IN:2 = B:38 VAR: hw_const#0 DATATYPE: ANYINT,
    B:9 = RF:15:OUT:0:REG:0 VAR: hw_const#8 DATATYPE: ANYINT,
    U7:IN:1 = B:9 VAR: hw_const#8 DATATYPE: ANYINT,
    B:27 = U7:OUT:0 INSTR_LOG:1|const#8#||0 VAR: const#8 DATATYPE: ANYINT,
    RF:5:IN:0:REG:1 = B:27 STAGE:-1 VAR: const#8 DATATYPE: ANYINT,
    B:16 = RF:5:OUT:0:REG:1 VAR: offsets DATATYPE: UINT,
    U2:IN:0 = B:16 VAR: offsets DATATYPE: UINT,
    B:17 = RF:9:OUT:0:REG:5 VAR: const#0xffff DATATYPE: ANYINT,
    U2:IN:1 = B:17 VAR: const#0xffff DATATYPE: ANYINT,
    B:31 = U2:OUT:0 INSTR_LOG:1|xoffset#||0 VAR: xoffset DATATYPE: UINT,
    RF:4:IN:0:REG:6 = B:31 STAGE:-1 VAR: xoffset DATATYPE: UINT,
    B:15 = RF:8:OUT:0:REG:0 VAR: hw_const#1 DATATYPE: ANYINT,
    U1:IN:1 = B:15 VAR: hw_const#1 DATATYPE: ANYINT,
    B:14 = RF:4:OUT:0:REG:1 VAR: const#2 DATATYPE: ANYINT,
    U1:IN:0 = B:14 VAR: const#2 DATATYPE: ANYINT,
    B:30 = U1:OUT:0 INSTR_LOG:1|const#3#||0 VAR: const#3 DATATYPE: ANYINT,
    RF:9:IN:0:REG:5 = B:30 STAGE:-1 VAR: const#3 DATATYPE: ANYINT,
    RF:7:IN:0:REG:4 = B:30 STAGE:-1 VAR: const#3 DATATYPE: ANYINT,
    RF:11:IN:0:REG:2 = B:30 STAGE:-1 VAR: const#3 DATATYPE: ANYINT,
    B:39 = RF:18:OUT:2:REG:0 VAR: hw_const#0 DATATYPE: ANYINT,
    U5:IN:2 = B:39 VAR: hw_const#0 DATATYPE: ANYINT,
    B:10 = RF:6:OUT:0:REG:4 VAR: offsets DATATYPE: UINT,
    U5:IN:0 = B:10 VAR: offsets DATATYPE: UINT,
    B:28 = U5:OUT:0 INSTR_LOG:1|offsets#||0 VAR: offsets DATATYPE: UINT,
    RF:3:IN:0:REG:4 = B:28 STAGE:-1 VAR: offsets DATATYPE: UINT,
    B:43 = RF:18:OUT:6:REG:0 VAR: hw_const#0 DATATYPE: ANYINT,
    U3:IN:2 = B:43 VAR: hw_const#0 DATATYPE: ANYINT,
    B:18 = RF:10:OUT:0:REG:1 VAR: idx DATATYPE: INT,
    U3:IN:0 = B:18 VAR: idx DATATYPE: INT,
    B:33 = U3:OUT:1 INSTR_LOG:1|idx#||1 VAR: idx DATATYPE: INT,
    RF:17:IN:0:REG:2 = B:33 STAGE:-1 VAR: idx DATATYPE: INT,
    //  IN:ADDER_0: ( i ) = SHIFT32( tmp#141 == UNITRF_0_2[3], const#-2 == UNITRF_1_1[4] )
    // OUT:ADDER_0: SHIFT32 => ( i == PERMRF_0[2] )
    //  IN:COMM_SCHED_0: ( const#8 ) = SELECT( hw_const#0 == CCRF_0[0], hw_const#8 == PERMRF_0[0] )
    // OUT:COMM_SCHED_0: SELECT => ( const#8 == UNITRF_0_4[1] )
    //  IN:ADDER_2: ( xoffset ) = AND( offsets == UNITRF_0_4[1], const#0xffff == UNITRF_1_3[5] )
    // OUT:ADDER_2: AND => ( xoffset == UNITRF_0_3[6] )
    //  IN:ADDER_1: ( const#3 ) = OR( hw_const#1 == UNITRF_1_2[0], const#2 == UNITRF_0_3[1] )
    // OUT:ADDER_1: OR => ( const#3 == UNITRF_1_3[5], const#3 == UNITRF_1_1[4], const#3 == MULRF_0_1[2] )
    //  IN:DIVIDER_0: ( offsets ) = NSELECT( hw_const#0 == CCRF_0[0], offsets == UNITRF_1_0[4] )
    // OUT:DIVIDER_0: NSELECT => ( offsets == UNITRF_0_2[4] )
    //  IN:MULTIPLIER_0: ( idx ) = NSELECT( hw_const#0 == CCRF_0[0], idx == MULRF_0_0[1] )
    // OUT:MULTIPLIER_0: NSELECT => ( idx == SPIDXRF_1[2] )
    DEAD_REGS: {  };
instr: 29
    MC: OP: NONE LINE:-1 UCRF_RD:-1 COMM_SRC_IDX:0,
    U7: OP: COMMXUCDATA LINE:97 STAGE:-1, // D:\working\im_apps\h264\me_fast_jitter1_kc.i:97
    U2: OP: OR LINE:-1 STAGE:-1, // D:\working\im_apps\h264\me_fast_jitter1_kc.i:-1
    U5: OP: SELECT LINE:-1 STAGE:-1, // D:\working\im_apps\h264\me_fast_jitter1_kc.i:-1
    U4: OP: SELECT LINE:-1 STAGE:-1, // D:\working\im_apps\h264\me_fast_jitter1_kc.i:-1

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