📄 me_fast_jitter1_kc.uc
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B:9 = RF:15:OUT:0:REG:0 VAR: hw_const#8 DATATYPE: ANYINT,
U7:IN:1 = B:9 VAR: hw_const#8 DATATYPE: ANYINT,
B:8 = RF:2:OUT:0:REG:0 VAR: hw_const#0 DATATYPE: ANYINT,
U7:IN:0 = B:8 VAR: hw_const#0 DATATYPE: ANYINT,
B:27 = U7:OUT:0 INSTR_LOG:1|const#0xffff#||0 VAR: const#0xffff DATATYPE: ANYINT,
RF:9:IN:0:REG:5 = B:27 STAGE:-1 VAR: const#0xffff DATATYPE: ANYINT,
RF:3:IN:0:REG:1 = B:27 STAGE:-1 VAR: const#0xffff DATATYPE: ANYINT,
B:14 = RF:4:OUT:0:REG:1 VAR: const#-1 DATATYPE: ANYINT,
U1:IN:0 = B:14 VAR: const#-1 DATATYPE: ANYINT,
B:15 = RF:8:OUT:0:REG:2 VAR: const#8 DATATYPE: ANYINT,
U1:IN:1 = B:15 VAR: const#8 DATATYPE: ANYINT,
B:30 = U1:OUT:0 INSTR_LOG:1|const#-256#||0 VAR: const#-256 DATATYPE: ANYINT,
RF:5:IN:0:REG:2 = B:30 STAGE:-1 VAR: const#-256 DATATYPE: ANYINT,
B:16 = RF:5:OUT:0:REG:2 VAR: const#1 DATATYPE: ANYINT,
U2:IN:0 = B:16 VAR: const#1 DATATYPE: ANYINT,
B:17 = RF:9:OUT:0:REG:0 VAR: hw_const#1 DATATYPE: ANYINT,
U2:IN:1 = B:17 VAR: hw_const#1 DATATYPE: ANYINT,
B:31 = U2:OUT:0 INSTR_LOG:1|const#2#||0 VAR: const#2 DATATYPE: ANYINT,
RF:4:IN:0:REG:1 = B:31 STAGE:-1 VAR: const#2 DATATYPE: ANYINT,
RF:7:IN:0:REG:6 = B:31 STAGE:-1 VAR: const#2 DATATYPE: ANYINT,
RF:8:IN:0:REG:2 = B:31 STAGE:-1 VAR: const#2 DATATYPE: ANYINT,
B:49 = U8:OUT:0 INSTR_LOG:1|jb_motions_out#117#||0 VAR: jb_motions_out#117 DATATYPE: UNDEFINED,
RF:19:IN:0:REG:4 = B:49 STAGE:-1 VAR: jb_motions_out#117 DATATYPE: UNDEFINED,
B:22 = IN:4 STAGE:-1 LINE:34 VAR: tmp#116 DATATYPE: UNDEFINED,
RF:1:IN:0:REG:1 = B:22 STAGE:-1 VAR: tmp#116 DATATYPE: UNDEFINED,
B:51 = U9:OUT:0 INSTR_LOG:1|vld_motions_in#115#||0 VAR: vld_motions_in#115 DATATYPE: UNDEFINED,
RF:20:IN:0:REG:1 = B:51 STAGE:-1 VAR: vld_motions_in#115 DATATYPE: UNDEFINED,
// IN:COMM_SCHED_0: ( const#0xffff ) = COMMUCDATA( hw_const#8 == PERMRF_0[0], hw_const#0 == UNITRF_0_1[0], uc_const#0xffff == UCRF_0[5] )
// OUT:COMM_SCHED_0: COMMUCDATA => ( const#0xffff == UNITRF_1_3[5], const#0xffff == UNITRF_0_2[1] )
// IN:ADDER_1: ( const#-256 ) = SHIFT32( const#-1 == UNITRF_0_3[1], const#8 == UNITRF_1_2[2] )
// OUT:ADDER_1: SHIFT32 => ( const#-256 == UNITRF_0_4[2] )
// IN:ADDER_2: ( const#2 ) = SHIFT32( const#1 == UNITRF_0_4[2], hw_const#1 == UNITRF_1_3[0] )
// OUT:ADDER_2: SHIFT32 => ( const#2 == UNITRF_0_3[1], const#2 == UNITRF_1_1[6], const#2 == UNITRF_1_2[2] )
// OUT:JUKEBOX_SCHED_0: INIT_COSTATE => ( jb_motions_out#117 == JBRF_0[4] )
// OUT:INOUT_4: DATA_IN => ( tmp#116 == UNITRF_0_0[1] )
// OUT:VALID_SCHED_0: INIT_VALID => ( vld_motions_in#115 == VALIDRF_0[1] )
DEAD_REGS: { };
instr: 11
MC: OP: SYNCH LINE:44,
U2: OP: SHIFT32 LINE:-1 STAGE:-1, // D:\working\im_apps\h264\me_fast_jitter1_kc.i:-1
U0: OP: SHIFT32 LINE:-1 STAGE:-1, // D:\working\im_apps\h264\me_fast_jitter1_kc.i:-1
B:16 = RF:5:OUT:0:REG:1 VAR: const#8 DATATYPE: ANYINT,
U2:IN:0 = B:16 VAR: const#8 DATATYPE: ANYINT,
B:17 = RF:9:OUT:0:REG:0 VAR: hw_const#1 DATATYPE: ANYINT,
U2:IN:1 = B:17 VAR: hw_const#1 DATATYPE: ANYINT,
B:31 = U2:OUT:0 INSTR_LOG:1|const#16#||0 VAR: const#16 DATATYPE: ANYINT,
RF:4:IN:0:REG:2 = B:31 STAGE:-1 VAR: const#16 DATATYPE: ANYINT,
RF:7:IN:0:REG:2 = B:31 STAGE:-1 VAR: const#16 DATATYPE: ANYINT,
RF:13:IN:0:REG:4 = B:31 STAGE:-1 VAR: const#16 DATATYPE: ANYINT,
RF:9:IN:0:REG:2 = B:31 STAGE:-1 VAR: const#16 DATATYPE: ANYINT,
RF:5:IN:0:REG:3 = B:31 STAGE:-1 VAR: const#16 DATATYPE: ANYINT,
RF:8:IN:0:REG:3 = B:31 STAGE:-1 VAR: const#16 DATATYPE: ANYINT,
B:12 = RF:3:OUT:0:REG:2 VAR: const#-2 DATATYPE: ANYINT,
U0:IN:0 = B:12 VAR: const#-2 DATATYPE: ANYINT,
B:13 = RF:7:OUT:0:REG:6 VAR: const#2 DATATYPE: ANYINT,
U0:IN:1 = B:13 VAR: const#2 DATATYPE: ANYINT,
B:29 = U0:OUT:0 INSTR_LOG:1|const#-8#||0 VAR: const#-8 DATATYPE: ANYINT,
RF:11:IN:0:REG:3 = B:29 STAGE:-1 VAR: const#-8 DATATYPE: ANYINT,
RF:3:IN:0:REG:2 = B:29 STAGE:-1 VAR: const#-8 DATATYPE: ANYINT,
RF:6:IN:0:REG:4 = B:29 STAGE:-1 VAR: const#-8 DATATYPE: ANYINT,
// IN:ADDER_2: ( const#16 ) = SHIFT32( const#8 == UNITRF_0_4[1], hw_const#1 == UNITRF_1_3[0] )
// OUT:ADDER_2: SHIFT32 => ( const#16 == UNITRF_0_3[2], const#16 == UNITRF_1_1[2], const#16 == MULRF_1_1[4], const#16 == UNITRF_1_3[2], const#16 == UNITRF_0_4[3], const#16 == UNITRF_1_2[3] )
// IN:ADDER_0: ( const#-8 ) = SHIFT32( const#-2 == UNITRF_0_2[2], const#2 == UNITRF_1_1[6] )
// OUT:ADDER_0: SHIFT32 => ( const#-8 == MULRF_0_1[3], const#-8 == UNITRF_0_2[2], const#-8 == UNITRF_1_0[4] )
DEAD_REGS: { };
instr: 12
MC: OP: NONE LINE:-1,
U1: OP: NOT LINE:-1 STAGE:-1, // D:\working\im_apps\h264\me_fast_jitter1_kc.i:-1
U2: OP: NOT LINE:-1 STAGE:-1, // D:\working\im_apps\h264\me_fast_jitter1_kc.i:-1
B:14 = RF:4:OUT:0:REG:2 VAR: const#16 DATATYPE: ANYINT,
U1:IN:0 = B:14 VAR: const#16 DATATYPE: ANYINT,
B:30 = U1:OUT:0 INSTR_LOG:1|const#-17#||0 VAR: const#-17 DATATYPE: ANYINT,
RF:7:IN:0:REG:3 = B:30 STAGE:-1 VAR: const#-17 DATATYPE: ANYINT,
B:16 = RF:5:OUT:0:REG:2 VAR: const#-256 DATATYPE: ANYINT,
U2:IN:0 = B:16 VAR: const#-256 DATATYPE: ANYINT,
B:31 = U2:OUT:0 INSTR_LOG:1|const#255#||0 VAR: const#255 DATATYPE: ANYINT,
RF:4:IN:0:REG:5 = B:31 STAGE:-1 VAR: const#255 DATATYPE: ANYINT,
RF:3:IN:0:REG:3 = B:31 STAGE:-1 VAR: const#255 DATATYPE: ANYINT,
// IN:ADDER_1: ( const#-17 ) = NOT( const#16 == UNITRF_0_3[2] )
// OUT:ADDER_1: NOT => ( const#-17 == UNITRF_1_1[3] )
// IN:ADDER_2: ( const#255 ) = NOT( const#-256 == UNITRF_0_4[2] )
// OUT:ADDER_2: NOT => ( const#255 == UNITRF_0_3[5], const#255 == UNITRF_0_2[3] )
DEAD_REGS: { };
instr: 13
MC: OP: NONE LINE:-1 UCRF_RD:1,
U0: OP: AND LINE:-1 STAGE:-1, // D:\working\im_apps\h264\me_fast_jitter1_kc.i:-1
U4: OP: SELECT LINE:-1 STAGE:-1, // D:\working\im_apps\h264\me_fast_jitter1_kc.i:-1
U7: OP: COMMUCDATA LINE:45 STAGE:-1, // D:\working\im_apps\h264\me_fast_jitter1_kc.i:45
B:13 = RF:7:OUT:0:REG:3 VAR: const#-17 DATATYPE: ANYINT,
U0:IN:1 = B:13 VAR: const#-17 DATATYPE: ANYINT,
B:12 = RF:3:OUT:0:REG:2 VAR: const#-8 DATATYPE: ANYINT,
U0:IN:0 = B:12 VAR: const#-8 DATATYPE: ANYINT,
B:29 = U0:OUT:0 INSTR_LOG:1|const#-24#||0 VAR: const#-24 DATATYPE: ANYINT,
RF:9:IN:0:REG:3 = B:29 STAGE:-1 VAR: const#-24 DATATYPE: ANYINT,
B:44 = RF:18:OUT:7:REG:0 VAR: hw_const#0 DATATYPE: ANYINT,
U4:IN:2 = B:44 VAR: hw_const#0 DATATYPE: ANYINT,
B:21 = RF:13:OUT:0:REG:0 VAR: hw_const#1 DATATYPE: ANYINT,
U4:IN:1 = B:21 VAR: hw_const#1 DATATYPE: ANYINT,
B:35 = U4:OUT:1 INSTR_LOG:1|const#1#||1 VAR: const#1 DATATYPE: ANYINT,
RF:3:IN:0:REG:2 = B:35 STAGE:-1 VAR: const#1 DATATYPE: ANYINT,
B:9 = RF:15:OUT:0:REG:0 VAR: hw_const#8 DATATYPE: ANYINT,
U7:IN:1 = B:9 VAR: hw_const#8 DATATYPE: ANYINT,
B:8 = RF:2:OUT:0:REG:0 VAR: hw_const#0 DATATYPE: ANYINT,
U7:IN:0 = B:8 VAR: hw_const#0 DATATYPE: ANYINT,
B:27 = U7:OUT:0 INSTR_LOG:1|margin#||0 VAR: margin DATATYPE: INT,
RF:8:IN:0:REG:5 = B:27 STAGE:-1 VAR: margin DATATYPE: INT,
RF:4:IN:0:REG:6 = B:27 STAGE:-1 VAR: margin DATATYPE: INT,
RF:6:IN:0:REG:3 = B:27 STAGE:-1 VAR: margin DATATYPE: INT,
RF:5:IN:0:REG:2 = B:27 STAGE:-1 VAR: margin DATATYPE: INT,
// IN:ADDER_0: ( const#-24 ) = AND( const#-17 == UNITRF_1_1[3], const#-8 == UNITRF_0_2[2] )
// OUT:ADDER_0: AND => ( const#-24 == UNITRF_1_3[3] )
// IN:MULTIPLIER_1: ( const#1 ) = SELECT( hw_const#0 == CCRF_0[0], hw_const#1 == MULRF_1_1[0] )
// OUT:MULTIPLIER_1: SELECT => ( const#1 == UNITRF_0_2[2] )
// IN:COMM_SCHED_0: ( margin ) = COMMUCDATA( hw_const#8 == PERMRF_0[0], hw_const#0 == UNITRF_0_1[0], uc_margin == UCRF_0[1] )
// OUT:COMM_SCHED_0: COMMUCDATA => ( margin == UNITRF_1_2[5], margin == UNITRF_0_3[6], margin == UNITRF_1_0[3], margin == UNITRF_0_4[2] )
DEAD_REGS: { };
instr: 14
MC: OP: NONE LINE:-1 UCRF_RD:3,
U2: OP: SHIFT32 LINE:54 STAGE:-1, // D:\working\im_apps\h264\me_fast_jitter1_kc.i:54
U7: OP: COMMUCDATA LINE:46 STAGE:-1, // D:\working\im_apps\h264\me_fast_jitter1_kc.i:46
U0: OP: SHIFT32 LINE:-1 STAGE:-1, // D:\working\im_apps\h264\me_fast_jitter1_kc.i:-1
B:16 = RF:5:OUT:0:REG:2 VAR: margin DATATYPE: INT,
U2:IN:0 = B:16 VAR: margin DATATYPE: INT,
B:17 = RF:9:OUT:0:REG:3 VAR: const#-24 DATATYPE: ANYINT,
U2:IN:1 = B:17 VAR: const#-24 DATATYPE: ANYINT,
B:31 = U2:OUT:0 INSTR_LOG:1|tmp#124#||0 VAR: tmp#124 DATATYPE: INT,
RF:7:IN:0:REG:3 = B:31 STAGE:-1 VAR: tmp#124 DATATYPE: INT,
B:9 = RF:15:OUT:0:REG:0 VAR: hw_const#8 DATATYPE: ANYINT,
U7:IN:1 = B:9 VAR: hw_const#8 DATATYPE: ANYINT,
B:8 = RF:2:OUT:0:REG:0 VAR: hw_const#0 DATATYPE: ANYINT,
U7:IN:0 = B:8 VAR: hw_const#0 DATATYPE: ANYINT,
B:27 = U7:OUT:0 INSTR_LOG:1|mblks#||0 VAR: mblks DATATYPE: INT,
RF:4:IN:0:REG:9 = B:27 STAGE:-1 VAR: mblks DATATYPE: INT,
B:12 = RF:3:OUT:0:REG:2 VAR: const#1 DATATYPE: ANYINT,
U0:IN:0 = B:12 VAR: const#1 DATATYPE: ANYINT,
B:13 = RF:7:OUT:0:REG:6 VAR: const#2 DATATYPE: ANYINT,
U0:IN:1 = B:13 VAR: const#2 DATATYPE: ANYINT,
B:29 = U0:OUT:0 INSTR_LOG:1|const#4#||0 VAR: const#4 DATATYPE: ANYINT,
RF:9:IN:0:REG:7 = B:29 STAGE:-1 VAR: const#4 DATATYPE: ANYINT,
RF:3:IN:0:REG:2 = B:29 STAGE:-1 VAR: const#4 DATATYPE: ANYINT,
RF:5:IN:0:REG:2 = B:29 STAGE:-1 VAR: const#4 DATATYPE: ANYINT,
RF:8:IN:0:REG:4 = B:29 STAGE:-1 VAR: const#4 DATATYPE: ANYINT,
// IN:ADDER_2: ( tmp#124 ) = SHIFT32( margin == UNITRF_0_4[2], const#-24 == UNITRF_1_3[3] )
// OUT:ADDER_2: SHIFT32 => ( tmp#124 == UNITRF_1_1[3] )
// IN:COMM_SCHED_0: ( mblks ) = COMMUCDATA( hw_const#8 == PERMRF_0[0], hw_const#0 == UNITRF_0_1[0], uc_mblks == UCRF_0[3] )
// OUT:COMM_SCHED_0: COMMUCDATA => ( mblks == UNITRF_0_3[9] )
// IN:ADDER_0: ( const#4 ) = SHIFT32( const#1 == UNITRF_0_2[2], const#2 == UNITRF_1_1[6] )
// OUT:ADDER_0: SHIFT32 => ( const#4 == UNITRF_1_3[7], const#4 == UNITRF_0_2[2], const#4 == UNITRF_0_4[2], const#4 == UNITRF_1_2[4] )
DEAD_REGS: { };
instr: 15
MC: OP: NONE LINE:-1,
U0: OP: AND LINE:54 STAGE:-1, // D:\working\im_apps\h264\me_fast_jitter1_kc.i:54
U1: OP: SHIFT32 LINE:87 STAGE:-1, // D:\working\im_apps\h264\me_fast_jitter1_kc.i:87
U4: OP: NSELECT LINE:-1 STAGE:-1, // D:\working\im_apps\h264\me_fast_jitter1_kc.i:-1
U2: OP: NOT LINE:-1 STAGE:-1, // D:\working\im_apps\h264\me_fast_jitter1_kc.i:-1
B:13 = RF:7:OUT:0:REG:3 VAR: tmp#124 DATATYPE: INT,
U0:IN:1 = B:13 VAR: tmp#124 DATATYPE: INT,
B:12 = RF:3:OUT:0:REG:3 VAR: const#255 DATATYPE: ANYINT,
U0:IN:0 = B:12 VAR: const#255 DATATYPE: ANYINT,
B:29 = U0:OUT:0 INSTR_LOG:1|right_margin#||0 VAR: right_margin DATATYPE: INT,
RF:4:IN:0:REG:3 = B:29 STAGE:-1 VAR: right_margin DATATYPE: INT,
B:14 = RF:4:OUT:0:REG:9 VAR: mblks DATATYPE: INT,
U1:IN:0 = B:14 VAR: mblks DATATYPE: INT,
B:15 = RF:8:OUT:0:REG:4 VAR: const#4 DATATYPE: ANYINT,
U1:IN:1 = B:15 VAR: const#4 DATATYPE: ANYINT,
B:30 = U1:OUT:0 INSTR_LOG:1|tmp#135#||0 VAR: tmp#135 DATATYPE: INT,
RF:8:IN:0:REG:6 = B:30 STAGE:-1 VAR: tmp#135 DATATYPE: INT,
B:44 = RF:18:OUT:7:REG:0 VAR: hw_const#0 DATATYPE: ANYINT,
U4:IN:2 = B:44 VAR: hw_const#0 DATATYPE: ANYINT,
B:20 = RF:11:OUT:0:REG:3 VAR: const#-8 DATATYPE: ANYINT,
U4:IN:0 = B:20 VAR: const#-8 DATATYPE: ANYINT,
B:35 = U4:OUT:1 INSTR_LOG:1|const#-8#||1 VAR: const#-8 DATATYPE: ANYINT,
RF:9:IN:0:REG:3 = B:35 STAGE:-1 VAR: const#-8 DATATYPE: ANYINT,
B:16 = RF:5:OUT:0:REG:1 VAR: const#8 DATATYPE: ANYINT,
U2:IN:0 = B:16 VAR: const#8 DATATYPE: ANYINT,
B:31 = U2:OUT:0 INSTR_LOG:1|const#-9#||0 VAR: const#-9 DATATYPE: ANYINT,
RF:5:IN:0:REG:4 = B:31 STAGE:-1 VAR: const#-9 DATATYPE: ANYINT,
// IN:ADDER_0: ( right_margin ) = AND( tmp#124 == UNITRF_1_1[3], const#255 == UNITRF_0_2[3] )
// OUT:ADDER_0: AND => ( right_margin == UNITRF_0_3[3] )
// IN:ADDER_1: ( tmp#135 ) = SHIFT32( mblks == UNITRF_0_3[9], const#4 == UNITRF_1_2[4] )
// OUT:ADDER_1: SHIFT32 => ( tmp#135 == UNITRF_1_2[6] )
// IN:MULTIPLIER_1: ( const#-8 ) = NSELECT( hw_const#0 == CCRF_0[0], const#-8 == MULRF_0_1[3] )
// OUT:MULTIPLIER_1: NSELECT => ( const#-8 == UNITRF_1_3[3] )
// IN:ADDER_2: ( const#-9 ) = NOT( const#8 == UNITRF_0_4[1] )
// OUT:ADDER_2: NOT => ( const#-9 == UNITRF_0_4[4] )
DEAD_REGS: { };
instr: 16
MC: OP: NONE LINE:-1,
U1: OP: IADD32 LINE:87 STAGE:-1, // D:\working\im_apps\h264\me_fast_jitter1_kc.i:87
U5: OP: NSELECT LINE:-1 STAGE:-1, // D:\working\im_apps\h264\me_fast_jitter1_kc.i:-1
U2: OP: AND LINE:-1 STAGE:-1, // D:\working\im_apps\h264\me_fast_jitter1_kc.i:-1
B:15 = RF:8:OUT:0:REG:6 VAR: tmp#135 DATATYPE: INT,
U1:IN:1 = B:15 VAR: tmp#135 DATATYPE: INT,
B:14 = RF:4:OUT:0:REG:3 VAR: right_margin DATATYPE: INT,
U1:IN:0 = B:14 VAR: right_margin DATATYPE: INT,
B:39 = RF:18:OUT:2:REG:0 VAR: hw_const#0 DATATYPE: ANYINT,
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