📄 bl.html
字号:
<!doctype html public "-//W3C//DTD HTML 3.2//EN"><html><head><title>Branch instructions</title><meta http-equiv="content-type" content="text/html; charset=ISO-8859-1" /><meta http-equiv="content-language" content="en" /><meta name="resource-type" content="document"><meta name="copyright" content="This document copyright 2001 by Richard Murray. Use for non-profit and education purposes explicitly granted."><meta name="author" content="Richard Murray"><meta name="rating" content="general"></head><!-- /assembler/bl.html --><!-- --><!-- (C) Copyright 1999 Richard Murray --><!-- Designed by Richard Murray --><!-- rmurray@heyrick.co.uk --><!-- --><body bgcolor="#f0f0f0" text="#000000" link="#0022dd" vlink="#002288"><table border = "0" width="100%"> <tr> <td align=center width=100> <img src="arm3.gif" width=79 height=78 align = middle> </td> <td> <h1 align="center"><font color="#800080">Branch<br>instructions</font></h1> </td> <td align=center width=100> <img src="arm3.gif" width=79 height=78 align = middle> </td></table><p> <p><a name="b"></a><h2>B : Branch</h2><pre> B<suffix> <address></pre><code>B</code> is the simplest branch. Upon encountering a <code>B</code> instruction, the ARMprocessor will jump immediately to the address given, and resume execution from there.<br>Note that the actual value stored in the branch instruction is an offset from the current valueof R15; rather than an absolute address.<p>On other processors, you might often find code such as:<pre> OPT 1 LDA &70 CMP #0 BEQ Zero STA &72 .Zero RTS</pre>(from the Acorn Electron User Guide issue 1 page 213)<p>On the ARM processor, that would become something like:<pre> OPT 1 ADR R1, #&70 LDR R0, [R1] CMP #0 BEQ Zero STR R0, [R1, #2] .Zero MOV PC, R14</pre>It isn't a very good example, but you can imagine how it would be better to execute conditionallyinstead of branching. On the other hand, if you have large sections of code there or if yourcode uses the status flags, you can implement all sorts of branching using conditional execution:Thus the single simple branch instruction can replace all of those branch and jump instructionspresent in other processors.<pre> OPT 1 ADR R1, #&70 LDR R0, [R1] CMP R0, #0 STRNE R0, [R1, #2] MOV PC, R14</pre><p> <p> <p><a name="bl"></a><h2>BL : Branch with Link</h2><pre> BL<suffix> <address></pre><code>BL</code> is another branch instruction. This time, register 14 is loaded with the contentsof R15 just before the branch. You can reload R14 into R15 to return to the instruction after thebranch - a primitive but powerful implementation of a subroutine.<br>This effect is quite well shown up in the screen loader 2 (example 4)...<pre> .load_new_format BL switch_screen_mode BL get_screen_info BL load_palette .new_loop MOV R1, R5 BL read_byte CMP R0, #255 BLEQ read_loop STRB R0, [R2, #1]!</pre>...where we can see three subroutines are called before the loader loop. Then, the<i>read_byte</i> subroutine is called in the loop, once under conditional execution.<p><hr size = "3"><a href="index.html#02">Return to assembler index</a><hr size = "3"><address>Copyright © 1999 Richard Murray</address></body></html>⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -