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关于ARM汇编的非常好的教程

        <br>&nbsp;<br>

  <tr>
    <td><a href="fpops.html#mnf"><i>MNF</i></a><br>
    <td>Move negated<br>
    <td>Floating Point
        <br>&nbsp;<br>

  <tr>
    <td><a href="mov.html#mov"><b>MOV</b></a><br>
    <td>Move value/register into a register<br>
    <td>-
        <br>&nbsp;<br>

  <tr>
    <td>MRC<br>
    <td>Co-processor register transfer<br>
    <td>-
        <br>&nbsp;<br>

  <tr>
    <td><a href="psr.html#32bit"><b>MRS</b></a><br>
    <td>Move status flags to a register<br>
    <td>ARM 6
        <br>&nbsp;<br>

  <tr>
    <td><a href="psr.html#32bit"><b>MSR</b></a><br>
    <td>Move contents of a register to the status flags<br>
    <td>ARM 6
        <br>&nbsp;<br>

  <tr>
    <td><a href="fpops.html"><i>MUF</i></a><br>
    <td>Multiply<br>
    <td>Floating Point
        <br>&nbsp;<br>

  <tr>
    <td><a href="mul.html#binop"><b>MUL</b></a><br>
    <td>Multiply<br>
    <td>-
        <br>&nbsp;<br>

  <tr>
    <td><a href="fpops.html#mvf"><i>MVF</i></a><br>
    <td>Move value/float register into a float register<br>
    <td>Floating Point
        <br>&nbsp;<br>

  <tr>
    <td><a href="mov.html#mvn"><b>MVN</b></a><br>
    <td>Move negated<br>
    <td>-
        <br>&nbsp;<br>

  <tr>
    <td><a href="fpops.html#unop"><i>NRM</i></a><br>
    <td>Normalise<br>
    <td>Floating Point
        <br>&nbsp;<br>

  <tr>
    <td><a href="opt.html">OPT</a><br>
    <td>Select assembly options<br>
    <td>This is an assembler pseudo-instruction
        <br>&nbsp;<br>

  <tr>
    <td><a href="mov.html#orr"><b>ORR</b></a><br>
    <td>Logical OR<br>
    <td>-
        <br>&nbsp;<br>

  <tr>
    <td><a href="fpops.html#binop"><i>POL</i></a><br>
    <td>Polar Angle<br>
    <td>Floating Point
        <br>&nbsp;<br>

  <tr>
    <td><a href="fpops.html#binop"><i>POW</i></a><br>
    <td>Power<br>
    <td>Floating Point
        <br>&nbsp;<br>

  <tr>
    <td><a href="fpops.html#binop"><i>RDF</i></a><br>
    <td>Reverse Divide<br>
    <td>Floating Point
        <br>&nbsp;<br>

  <tr>
    <td><a href="fpops.html#rfc"><i>RFC</i></a><br>
    <td>Read FP control register<br>
    <td>Floating Point
        <br>&nbsp;<br>

  <tr>
    <td><a href="fpops.html#rfs"><i>RFS</i></a><br>
    <td>Read FP status register<br>
    <td>Floating Point
        <br>&nbsp;<br>

  <tr>
    <td><a href="fpops.html#rmf"><i>RMF</i></a><br>
    <td>Remainder<br>
    <td>Floating Point
        <br>&nbsp;<br>

  <tr>
    <td><a href="fpops.html#unop"><i>RND</i></a><br>
    <td>Round to integral value<br>
    <td>Floating Point
        <br>&nbsp;<br>

  <tr>
    <td><a href="shift.html#ror">ROR</a><br>
    <td>Rotate Right<br>
    <td>This is an option, not an instruction
        <br>&nbsp;<br>

  <tr>
    <td><a href="fpops.html#binop"><i>RPW</i></a><br>
    <td>Reverse Power<br>
    <td>Floating Point
        <br>&nbsp;<br>

  <tr>
    <td><a href="shift.html#rrx">RRX</a><br>
    <td>Rotate Right with extend<br>
    <td>This is an option, not an instruction
        <br>&nbsp;<br>

  <tr>
    <td><a href="mov.html#rsb"><b>RSB</b></a><br>
    <td>Reverse Subtract<br>
    <td>-
        <br>&nbsp;<br>

  <tr>
    <td><a href="mov.html#rsc"><b>RSC</b></a><br>
    <td>Reverse Subtract with Carry<br>
    <td>-
        <br>&nbsp;<br>

  <tr>
    <td><a href="fpops.html#rsf"><i>RSF</i></a><br>
    <td>Reverse Subtract<br>
    <td>Floating Point
        <br>&nbsp;<br>

  <tr>
    <td><a href="mov.html#sbc"><b>SBC</b></a><br>
    <td>Subtract with Carry<br>
    <td>-
        <br>&nbsp;<br>

  <tr>
    <td><a href="fpops.html#sfm"><i>SFM</i></a><br>
    <td>Store Muliple Floating point values<br>
    <td>Floating Point
        <br>&nbsp;<br>

  <tr>
    <td><a href="fpops.html#unop"><i>SIN</i></a><br>
    <td>Sine<br>
    <td>Floating Point
        <br>&nbsp;<br>

  <tr>
    <td><b>SMLAL</b><br>
    <td>Signed Long (64 bit) Multiply with Accumulate<br>
    <td>StrongARM
        <br>&nbsp;<br>

  <tr>
    <td><b>SMULL</b><br>
    <td>Signed Long (64 bit) Multiply<br>
    <td>StrongARM
        <br>&nbsp;<br>

  <tr>
    <td><a href="fpops.html#unop"><i>SQT</i></a><br>
    <td>Square Root<br>
    <td>Floating Point
        <br>&nbsp;<br>

  <tr>
    <td>STC<br>
    <td>Co-processor data transfer<br>
    <td>-
        <br>&nbsp;<br>

  <tr>
    <td><a href="fpops.html#stf"><i>STF</i></a><br>
    <td>Store floating point value<br>
    <td>Floating Point
        <br>&nbsp;<br>

  <tr>
    <td><a href="str.html#stm"><b>STM</b></a><br>
    <td>Store multiple registers<br>
    <td>-
        <br>&nbsp;<br>

  <tr>
    <td><a href="str.html#str"><b>STR</b></a><br>
    <td>Store a register<br>
    <td>-
        <br>&nbsp;<br>

  <tr>
    <td><a href="str.html#str"><b>STRB</b></a><br>
    <td>Store a byte (from a register)<br>
    <td>-
        <br>&nbsp;<br>

  <tr>
    <td><b>STRH</b><br>
    <td>Store a halfword (from a register)<br>
    <td>StrongARM
        <br>&nbsp;<br>

  <tr>
    <td><b>STRSB</b><br>
    <td>Store a signed byte (from a register)<br>
    <td>StrongARM
        <br>&nbsp;<br>

  <tr>
    <td><b>STRSH</b><br>
    <td>Store a signed half-word (from a register)<br>
    <td>StrongARM
        <br>&nbsp;<br>

  <tr>
    <td><a href="mov.html#sub"><b>SUB</b></a><br>
    <td>Subtract<br>
    <td>-
        <br>&nbsp;<br>

  <tr>
    <td><a href="fpops.html#binop"><i>SUF</i></a><br>
    <td>Subtract<br>
    <td>Floating Point
        <br>&nbsp;<br>

  <tr>
    <td><a href="swi.html#swi"><b>SWI</b></a><br>
    <td>Cause a SoftWare Interrupt<br>
    <td>-
        <br>&nbsp;<br>

  <tr>
    <td><a href="mov.html#swp"><b>SWP</b></a><br>
    <td>Swap register with memory<br>
    <td>ARM 3
        <br>&nbsp;<br>

  <tr>
    <td><a href="fpops.html#unop"><i>TAN</i></a><br>
    <td>Tangent<br>
    <td>Floating Point
        <br>&nbsp;<br>

  <tr>
    <td><a href="cmp.html#teq"><b>TEQ</b></a><br>
    <td>Test Equivalence (notional EOR)<br>
    <td>-
        <br>&nbsp;<br>

  <tr>
    <td><a href="cmp.html#tst"><b>TST</b></a><br>
    <td>Test and mask (notional AND)<br>
    <td>-
        <br>&nbsp;<br>

  <tr>
    <td><b>UMLAL</b><br>
    <td>Unsigned Long (64 bit) Multiply with Accumulate<br>
    <td>StrongARM
        <br>&nbsp;<br>

  <tr>
    <td><b>UMULL</b><br>
    <td>Unsigned Long (64 bit) Multiply<br>
    <td>StrongARM
        <br>&nbsp;<br>

  <tr>
    <td><a href="fpops.html#unop"><i>URD</i></a><br>
    <td>Unnormalised round<br>
    <td>Floating Point
        <br>&nbsp;<br>

  <tr>
    <td><a href="fpops.html#wfc">WFC</a><br>
    <td>Write FP control register<br>
    <td>Floating Point
        <br>&nbsp;<br>

  <tr>
    <td><a href="fpops.html#wfs"><i>WFS</i></a><br>
    <td>Write FP status register<br>
    <td>Floating Point
        <br>&nbsp;<br>
</table>
<p>&nbsp;<p>


Instructions in <b>bold</b> are the core ARM instructions.<br>
Instructions in <i>italics</i> are provided by the Floating Point Emulator. RFC and WFC are only
provided by hardware floating point systems.<br>
Everything else are bits and pieces that were worth including, shift options and common assembler
mnemonics...<br>
Co-processor instructions are listed. However the ARM processors used in RISC OS machines do not
support co-processors, and only the virtual co-processor functions present within the chip can
be accessed. These provide facilities for setting up the ARM, cache, MMU, etc...

<p>
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<address>Copyright &copy; 2001 Richard Murray</address>
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