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<!doctype html public "-//W3C//DTD HTML 3.2//EN"><html><head><title>Processor Types</title><meta http-equiv="content-type" content="text/html; charset=ISO-8859-1" /><meta http-equiv="content-language" content="en" /><meta name="resource-type" content="document"><meta name="copyright" content="This document copyright 2002 by Richard Murray. Use for non-profit and education purposes explicitly granted."><meta name="author" content="Richard Murray"><meta name="rating" content="general"></head><!--  /assembler/proctype.html           --><!--                                     --><!--  (C) Copyright 2002 Richard Murray  --><!--  Designed by Richard Murray         --><!--  rmurray@heyrick.co.uk              --><!--                                     --><body bgcolor="#f0f0f0" text="#000000" link="#0022dd" vlink="#002288"><table border = "0" width="100%">  <tr>    <td align=center width=100>      <img src="arm3.gif" width=79 height=78 align = middle>    </td>    <td>      <h1 align="center"><font color="#800080">Processor Types</font></h1>    </td>    <td align=center width=100>      <img src="arm3.gif" width=79 height=78 align = middle>    </td></table><p>&nbsp;<p><h2>ARM 1 (v1)</h2>This was the very first ARM processor. Actually, when it was first manufactured in April 1985,it was the very first commercial RISC processor. Ever.<br>As a testament to the design team, it was &quot;working silicon&quot; in it's first incarnation,it exceeded it's design goals, and it used less than 25,000 transistors.<p>The ARM 1 was used in a few evaluation systems on the BBC micro (Brazil - BBC interfaced ARM),and a PC machine (Springboard - PC interfaced ARM).<br>It is believed a large proportion of Arthur was developed on the Brazil hardware.<br>In essence, it is very similar to an ARM 2 - the differences being that R8 and R9 are not bankedin IRQ mode, there's no multiply instruction, no LDR/STR with register-specified shifts, and noco-processor gubbins.<br><center><img src = "../images/assembler/arm1.jpeg" width=226 height=345 alt="JPEG 22K" border=2><br><font size = "-1"><i>ARM evaluation system for BBC Master</i></font><font size = 1><i><br>(original picture source not known - downloaded from a website full ofBBC-related images<br>this version created by Rick Murray to include zoomed-up ARM down thebottom...)</i><br></font></center><p>&nbsp;<p><h2>ARM 2 (v2)</h2>Experience with the ARM 1 suggested improvements that could be made. Such additions as the MULand MLA instructions allowed for real-time digital signal processing. Back then, it was to aidin generating sounds. Who could have predicted exactly how suitable to DSP the ARM would be,some fifteen years later?<br>In 1985, Acorn hit hard times which led to it being taken over by Olivetti. It took two yearsfrom the arrival of the ARM to the launch of a computer based upon it...<p>...those were the days my friend, we thought they'd never end.<br>When the first ARM-based machines rolled out, Acorn could gladly announce to the world that theyoffered the fastest RISC processor around. Indeed, the ARM processor kicked ass across thecomputing league tables, and for a long time was right up there in the 'fastest processors'listings. But Acorn faced numerous challenges. The computer market was in disarray, with somepeople backing IBM's PC, some the Amiga, and all sorts of little itty-bitty things. Then Acorngo and launch a machine offering Arthur (which was about as nice as the first release of Windows)which had no user base, precious little software, and not much third party support. But theysucceeded.<p>The ARM 2 processor was the first to be used within the RISC OS platform, in the A305, A310, andA4x0 range. It is an 8MHz processor that was used on all of the early machines, including theA3000. The ARM 2 is clocked at 8MHz, which translates to approximately four and a half millioninstructions per second (0.56 MIPS/MHz).<br><center><font size = "-1"><i>No current image - can you help?</i></font><br></center><p>&nbsp;<p><h2>ARM 3 (v2as)</h2>Launched in 1989, this processor built on the ARM 2 by offering 4K of cache memory and the SWPinstruction. The desktop computers based upon it were launched in 1990.<br>Internally, via the decidated co-processor interface, CP15 was 'created' to provide processorcontrol and identification.<br>Several speeds of ARM 3 were produced. The A540 runs a 26MHz version, and the A4 laptop runs a24MHz version. By far the most common is the 25MHz version used in the A5000, though those withthe 'alpha variant' have a 33MHz version.<br>At 25MHz, with 12MHz memory (a la A5000), you can expect around 14 MIPS (0.56 MIPS/MHz).<br>It is interesting to notice that the ARM3 doesn't 'perform' faster - both the ARM2 and the ARM3average 0.56 MIPS/MHz. The speed boost comes from the higher clock speed, and the cache.<p>Oh, and just to correct a common misunderstanding, the A4 is not a squashed down version of theA5000. The A4 actually came first, and some of the design choices were reflected in the laterA5000 design.<center><img src = "../images/assembler/arm3fpu.jpeg" width=210 height=156 alt="JPEG 14K" border=2><br><font size = "-1"><i>ARM3 with FPU</i></font><font size = 1><i><br>(original picture downloaded from Arcade BBS, archive had no attribution)</i></font><br></center><p>&nbsp;<p><h2>ARM 250 (v2as)</h2>The 'Electron' of ARM processors, this is basically a second level revision of the ARM 3 designwhich removes the cache, and combines the primary chipset (VIDC, IOC, and MEMC) into the onepiece of silicon, making the creation of a cheap'n'cheerful RISC OS computer a simple thingindeed. This was clocked at 12MHz (the same as the main memory), and offers approximately 7 MIPS(0.58 MIPS/MHz).<br>This processor isn't as terrible as it might seem. That the A30x0 range was built with the ARM250was probably more a cost-cutting exercise than intention. The ARM250 was designed for low powerconsumption and low cost, both important factors in devices such as portables, PDAs, andorganisers - several of which were developed and, sadly, none of which actually made it to arelease.<center><font size = "-1"><i>No current image - can you help?</i></font><br></center><p>&nbsp;<p><h2>ARM 250 mezzanine</h2>This is not actually a processor. It is included here for historical interest. It seems themachines that would use the ARM250 were ready before the processor, so early releases of themachine contained a 'mezzanine' board which held the ARM 2, IOC, MEMC, and VIDC.<p>&nbsp;<p><h2>ARM 4 and ARM 5</h2><i>These processors do not exist.</i><p>More and more people began to be interested in the RISC concept, as at the same sort of timecommon Intel (and clone) processors showed a definite trend towards higher power consumption andgreater need for heat dissipation, neither of which are friendly to devices that are supposed tobe running off batteries.<br>The ARM design was seen by several important players as being the epitomy of sleek, powerful RISCdesign.<br>It was at this time a deal was struck between Acorn, VLSI (long-time manufacturers of the ARMchipset), and Apple. This lead to the death of the Acorn RISC Microprocessor, as Advanced RISCMachines Ltd was born. This new company was committed to design and support specifically for theprocessor, without the hassle and baggage of RISC OS (the main operating system for the processorand the desktop machines). Both of those would be left to Acorn.<p>In the change from being a part of Acorn to being ARM Ltd in it's own right, the whole numberingscheme for the processors was altered.<p>&nbsp;<p><h2>ARM 610 (v3)</h2>This processor brought with it two important 'firsts'. The first 'first' was full 32 bitaddressing, and the second 'first' was the opening for a new generation of ARM based hardware.<br>Acorn responded by making the RiscPC. In the past, critics were none-too-keen on the idea ofslot-in cards for things like processors and memory (as used in the A540), and by this time manypeople were getting extremely annoyed with the interent memory limitations in the older hardware,the MEMC can only address 4Mb of memory, and you can add more by daisy-chaining MEMCs - an ideathat not only sounds hairy, it <em>is</em> hairy!<br>The RiscPC brought back the slot-in processor with a vengence. Future 'better' processors werepromised, and a second slot was provided for alien processors such as the 80486 to be plugged in.As for memory, two SIMM slots were provided, and the memory was expandable to 256Mb. This doesnot sound much as modern PCs come with half that as standard. However you can get a lot of milagefrom a RiscPC fitted with a puny 16Mb of RAM.<p>But, always, we come back to the 32 bit. Because it has been with us and known about ever sincethe first RiscPC rolled out, but few people noticed, or cared. Now as the new generation of ARMprocessors drop the 26 bit 'emulation' modes, we RISC OS users are faced with the option ofgetting ourselves sorted, or dying.<br>Ironically, the other mainstream operating systems for the RiscPC hardware - namely ARMLinux andnetbsd/arm32 are already fully 32 bit.<p>Several speeds were produced; 20MHz, 30Mhz, and the 33MHz part used in the RiscPC.<br>The ARM610 processor features an on-board MMU to handle memory, a 4K cache, and it can even

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