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<!doctype html public "-//W3C//DTD HTML 3.2//EN"><html><head><title>Registers and Processor modes</title><meta http-equiv="content-type" content="text/html; charset=ISO-8859-1" /><meta http-equiv="content-language" content="en" /><meta name="resource-type" content="document"><meta name="copyright" content="This document copyright 2001 by Richard Murray. Use for non-profit and education purposes explicitly granted."><meta name="author" content="Richard Murray"><meta name="rating" content="general"></head><!-- /assembler/regs.html --><!-- --><!-- (C) Copyright 1999 Richard Murray --><!-- Designed by Richard Murray --><!-- rmurray@heyrick.co.uk --><!-- --><body bgcolor="#f0f0f0" text="#000000" link="#0022dd" vlink="#002288"><table border = "0" width="100%"> <tr> <td align=center width=100> <img src="arm3.gif" width=79 height=78 align = middle> </td> <td> <h1 align="center"><font color="#800080">Registers<br>and<br>Processor Modes</font></h1> </td> <td align=center width=100> <img src="arm3.gif" width=79 height=78 align = middle> </td></table><p> <p>The ARM processor has twenty seven registers, some of which have conditions applied, so you onlyget to use sixteen at any one time...<ul> <li> Register 0 to register 7 are general purpose registers and can be used for <i>ANY</i> purpose.<br> Unlike 80x86 processors which require certain registers to be used for stack access, or the 6502 which places the result of mathematical calculations in the Accumulator, the ARM processor is highly flexible in its register use.</ul><p><ul> <li> Register 8 to register 12 are general purpose registers, but they have shadow registers which come into use when you switch to FIQ mode.</ul><p><ul> <li> Register 13 is typically the OS stack pointer, but can be used as a general purpose register. This is an operating system issue, not a processor issue, so if you don't use the stack you can corrupt this freely within your own code as long as you restore it afterwards. Each of the processor modes shadow this register.</ul><p><ul> <li> Register 14 is dedicated to holding the address of the return point to make writing subroutines easier. When you branch with link (BL) the return address is stored in R14. <br> Likewise when the program is first run, the exit address is stored in R14. All instances of R14 must be preserved in other registers (not really efficient) or in a stack. This register is shadowed across all of the processor modes. This register can be used as a general purpose register once the link address has been preserved.</ul><p><ul> <li> Register 15 is the program counter. It holds the status of the processor as well as a twenty-six bit number which is the address of the program currently being used.</ul><p> <p> <p>To make this a little clearer... Another chart:<pre>User Mode SVC Mode IRQ Mode FIQ Mode APCSR0 ------- R0 ------- R0 ------- R0 a1R1 ------- R1 ------- R1 ------- R1 a2R2 ------- R2 ------- R2 ------- R2 a3R3 ------- R3 ------- R3 ------- R3 a4R4 ------- R4 ------- R4 ------- R4 v1R5 ------- R5 ------- R5 ------- R5 v2R6 ------- R6 ------- R6 ------- R6 v3R7 ------- R7 ------- R7 ------- R7 v4R8 ------- R8 ------- R8 R8_fiq v5R9 ------- R9 ------- R9 R9_fiq v6R10 ------ R10 ------ R10 R10_fiq slR11 ------ R11 ------ R11 R11_fiq fpR12 ------ R12 ------ R12 R12_fiq ipR13 R13_svc R13_irq R13_fiq spR14 R14_svc R14_irq R14_fiq lr------------- R15 / PC ------------- pc</pre>The rightmost column is a list of names used for APCS code, refer<a href="apcsintro.html">here</a> for details of APCS assembler.<p> <p> <p>The Program Counter is built up as follows:<pre> Bit 31 30 29 28 27 26 25------------2 1 0 N Z C V I F Program Counter S1 S0</pre>For further explanation of R15, refer to <a href="psr.html"><i>psr.html</i></a>.<p> <p> <p>By now you may be wondering about these "modes", such as "FIQ" mentionedabove.<ul> <li> User Mode, the usual mode for applications to run in. Your memory access is restricted and you cannot read directly from hardware devices.</ul><p><ul> <li> Supervisor Mode (SVC Mode), used mainly by SWIs and the OS. This mode has additional <i>privileges</i> which allow greater control of the computer. For example, you have to go to Supervisor Mode in order to read from a podule. It cannot be done in User Mode.</ul><p><ul> <li> Interrupt Mode (IRQ Mode), used to handle peripherals that issues interrupts. This mode is also privileged. Such devices causing IRQs are the keyboard, the VSync (when the screen refresh is occurring), IOC timers, serial, harddisc, floppy etc etc...</ul><p><ul> <li> Fast Interrupt Mode (FIQ Mode), used to handle peripherals that issue fast interrupts. This mode is also privileged. Such devices causing FIQs are the floppy disc handling data, the serial port (on 82C71x machines such as the A5000) and Econet.</ul>The difference between IRQ and FIQ is with FIQ you have to process your stuff as quickly aspossible and then get the .... out of there. An IRQ may be interrupted by an FIQ but an IRQcannot interrupt an FIQ. To make FIQs faster, they have more shadow registers. FIQs cannot callSWIs. FIQs must also disable interrupts. If it becomes necessary for an FIQ routine to re-enableinterrupts, it's too slow and should be IRQ not FIQ. Phew!<p>Refer to <a href="psr.html"><i>psr.html</i></a> for details of how to change processor modes.<p><hr size = "3"><a href="index.html#02">Return to assembler index</a><hr size = "3"><address>Copyright © 1999 Richard Murray</address></body></html>⌨️ 快捷键说明
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