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library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_signed.all;
entity auto is
port(
clk:in std_logic;
cp:in std_logic;--复位信号
t:out std_logic_vector(0 to 7);
y:out std_logic_vector(0 to 7));
end auto;
architecture a of auto is
signal b:std_logic_vector(21 downto 0):="0000000000000000000000";
signal a:std_logic_vector(2 downto 0);
signal e:std_logic_vector(2 downto 0);
signal n:std_logic_vector(2 downto 0);--显示字符计数
signal c:std_logic_vector(0 to 7);
signal d:std_logic_vector(0 to 7);
begin
process(clk,cp)
begin
if(clk'event and clk='1') then
if (cp ='1')then
b<="0000000000000000000000";
else
b<=b+1;
end if;
end if;
end process;
process(clk)
begin
a(0)<=b(11);
a(1)<=b(12);
a(2)<=b(13);
if(clk'event and clk='1') then
if a="000" then c<="10000000";
elsif a="001" then c<="01000000";
elsif a="010" then c<="00100000";
elsif a="011" then c<="00010000";
elsif a="100" then c<="00001000";
elsif a="101" then c<="00000100";
elsif a="110" then c<="00000010";
elsif a="111" then c<="00000001";
end if;
end if;
y<=c;
end process;
process (clk)
begin
e(0)<=b(11);
e(1)<=b(12);
e(2)<=b(13);
n(0)<=b(14);
n(1)<=b(15);
n(2)<=b(16);
n(3)<=b(17);
n(4)<=b(18);
n(5)<=b(19);
n(6)<=b(20);
n(7)<=b(21);
if(clk'event and clk='1')then
if(n<=1)then
if e="000" then d<="11111111";
elsif e="001" then d<="11000111";
elsif e="010" then d<="11011011";
elsif e="011" then d<="11011011";
elsif e="100" then d<="11000111";
elsif e="101" then d<="11011011";
elsif e="110" then d<="11011011";
elsif e="111" then d<="11000111";
end if;
elsif(n>=2 and n<=3)then
if e="000" then d<="11111111";
elsif e="001" then d<="10001111";
elsif e="010" then d<="10110111";
elsif e="011" then d<="10110111";
elsif e="100" then d<="10001111";
elsif e="101" then d<="10110111";
elsif e="110" then d<="10110111";
elsif e="111" then d<="10001111";
end if;
elsif(n>=4 and n<=5)then
if e="000" then d<="11111111";
elsif e="001" then d<="00011111";
elsif e="010" then d<="01101111";
elsif e="011" then d<="01101111";
elsif e="100" then d<="00111111";
elsif e="101" then d<="01101111";
elsif e="110" then d<="01101111";
elsif e="111" then d<="00011111";
end if;
elsif(n>=6 and n<=7)then
if e="000" then d<="11111111";
elsif e="001" then d<="00111111";
elsif e="010" then d<="11011111";
elsif e="011" then d<="11011111";
elsif e="100" then d<="01111111";
elsif e="101" then d<="11011111";
elsif e="110" then d<="11011111";
elsif e="111" then d<="00111111";
end if;
elsif(n>=8 and n<=9)then
if e="000" then d<="11111111";
elsif e="001" then d<="01111111";
elsif e="010" then d<="10111111";
elsif e="011" then d<="10111111";
elsif e="100" then d<="11111111";
elsif e="101" then d<="10111111";
elsif e="110" then d<="10111111";
elsif e="111" then d<="01111111";
end if;
elsif(n>=10 and n<=255)then
if e="000" then d<="11111111";
elsif e="001" then d<="11111111";
elsif e="010" then d<="01111111";
elsif e="011" then d<="01111111";
elsif e="100" then d<="11111111";
elsif e="101" then d<="01111111";
elsif e="110" then d<="01111111";
elsif e="111" then d<="11111111";
end if;
end if;
end if;
t<=d;
end process;
end a;
*****************************************************************
--auto display
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_signed.all;
entity auto is
port(
clk:in std_logic;
cp:in std_logic;--复位信号
t:out std_logic_vector(0 to 7);
y:out std_logic_vector(0 to 7));
end auto;
architecture a of auto is
signal b:std_logic_vector(21 downto 0):="0000000000000000000000";
signal a:std_logic_vector(2 downto 0);
signal e:std_logic_vector(2 downto 0);
signal n:std_logic_vector(2 downto 0);--显示字符计数
signal c:std_logic_vector(0 to 7);
signal d:std_logic_vector(0 to 7);
begin
process(clk,cp)
begin
if(clk'event and clk='1') then
if (cp ='1')then
b<="0000000000000000000000";
else
b<=b+1;
end if;
end if;
end process;
process(clk)
begin
a(0)<=b(11);
a(1)<=b(12);
a(2)<=b(13);
if(clk'event and clk='1') then
if a="000" then c<="10000000";
elsif a="001" then c<="01000000";
elsif a="010" then c<="00100000";
elsif a="011" then c<="00010000";
elsif a="100" then c<="00001000";
elsif a="101" then c<="00000100";
elsif a="110" then c<="00000010";
elsif a="111" then c<="00000001";
end if;
end if;
y<=c;
end process;
process (clk)
begin
e(0)<=b(11);
e(1)<=b(12);
e(2)<=b(13);
n(0)<=b(14);
n(1)<=b(15);
n(2)<=b(16);
if(clk'event and clk='1')then
if(n<=1)then
if e="000" then d<="11111111";
elsif e="001" then d<="11000111";
elsif e="010" then d<="11011011";
elsif e="011" then d<="11011011";
elsif e="100" then d<="11000111";
elsif e="101" then d<="11011011";
elsif e="110" then d<="11011011";
elsif e="111" then d<="11000111";
end if;
elsif(n>=2 and n<=3)then
if e="000" then d<="11111111";
elsif e="001" then d<="10001111";
elsif e="010" then d<="10110111";
elsif e="011" then d<="10110111";
elsif e="100" then d<="10001111";
elsif e="101" then d<="10110111";
elsif e="110" then d<="10110111";
elsif e="111" then d<="10001111";
end if;
elsif(n>=4 and n<=5)then
if e="000" then d<="11111111";
elsif e="001" then d<="00011111";
elsif e="010" then d<="01101111";
elsif e="011" then d<="01101111";
elsif e="100" then d<="00111111";
elsif e="101" then d<="01101111";
elsif e="110" then d<="01101111";
elsif e="111" then d<="00011111";
end if;
elsif(n>=6 and n<=7)then
if e="000" then d<="11111111";
elsif e="001" then d<="00111111";
elsif e="010" then d<="11011111";
elsif e="011" then d<="11011111";
elsif e="100" then d<="01111111";
elsif e="101" then d<="11011111";
elsif e="110" then d<="11011111";
elsif e="111" then d<="00111111";
end if;
end if;
end if;
t<=d;
end process;
end a;
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