i2cbus.a30

renasas m16c上实现iic通信的源代码.

;;; ./i2cbus.a30 start
IICIPL	.equ	4		; IPL
DEBUG	.equ	1		;
.if	DEBUG == 1		; 
dp	.equ	3f1h		;
ddp	.equ	3f3h		;
.endif				;
;;; *****************************************************************************
;;; PLEASE do not edit this file.  Make changes for Main Clock Speed, Clock Devisor, 
;;;	and Baudrate in I2C.H header file. 
;;;	System Name : IIC-BUS F/W Ver1.00 (Sample I2C device driver)
;;; Summary		: M16C/62 revise IIC-BUS F/W ( clock is set in I2C.H header file (NO WAIT).)
;;;				: Multi Master
;;;				: BaudRate: Set in I2C.H file. 
;;;				: Disable of Features address and 10Bit address.
;;;				: This program supports only C-language interface.
;;;				: This program can support only transmit/receive in a slave
;;;				  as a combination format.
;;;				: It cannot connect C-Bus and M3Low and etc.
;;;				: This program cannot generate Sr.
;;;				: This program doesn't do whole failure restoration.
;;; Date		: 08/JAN/'99 (FRI)
;;; Object File Name : i2cbus.a30
;;; MCU Type	: M3062xMx
;;; Author		: Copyright 1997-1999 	MITSUBISHI ELECTRIC CORPORATION
;;;				: 						MITSUBISHI ELECTRIC
;;;				:						And MITSUBISHI ELECTRONICS AMERICA, DEC-EAST.
;;;				: 						SEMICONDUCTOR SYSTEMS CORPORATION
;;; -----------------------------------------------------------------------------
;;; IPL SET
STSPIPL	.equ	IICIPL		;	IPL of stop condition.
S2RIPL	.equ	IICIPL-1	;	IPL of UART2 receive INT parity level.
;;; 
	.glb	_iic_ini		;	Initialization function.
	.glb	_iic_stop		;	I2C bus disable.
	.glb	_iic_mr_start	;	Master receive start.
	.glb	_iic_mw_start	;	Master write start.
	.glb	$iic_mw_end		;	Master write end.
	.glb	$iic_mr_end		;	Master read end.
	.glb	stsp_int		;	Stop start condition interrupt.
	.glb	u2rcv_int		;	Uart 2 received interrupt "ACK"
;;; ---------------------------------------------------------------------------
;;
;;
U2SMR2	.equ	376h		;	UART2 Special Mode Register 2.
U2SMR	.equ	377h		;	UART2 special mode register.
;;; UART2
U2MR	.equ	378h		;	UART2 transmit / receive mode register.
U2BRG	.equ	379h		;	UART2 bit rate generator.
U2TB	.equ	37ah		;	UART2 transmit buffer register.
U2C0	.equ	37ch		;	UART2 transmit / receive control register 0.
U2C1	.equ	37dh		;	UART2 transmit / receive control register 1.
U2RB	.equ	37eh		;	UART2 receive buffer register. 
;;
STSPIC	.equ	004ah		;	Bus collision detection interrupt control register
S2RIC	.equ	0050h		;	UART2 receive interrupt control register(ACK).
;;
P7	.equ	3edh			;	Port 7 register. 
PD7	.equ	3efh			;	M16C port 7 directional register. 
;;; -----------------------------------------------------------------------------
	.section iicbus,data,align
	.align
mw_data:	.blkw	1		;	Master transmit data start address. 
mr_data:	.blkw	1		;	Master receive data start address.
slave_ram:	.blkw	1		;	Transmission data start address for slave.
mw_lng:		.blkb	1		;	Master write data length.
mr_lng:		.blkb	1		;  	Master read data length.
md_cnt:		.blkb	1		;	Master transmit/receive data counter.
sd_p:		.blkb	1		;	Slave data counter. 
mw_target:	.blkb	1		;	Master transmit address. 
mr_target:	.blkb	1		;	Master receive address.
id_adr:		.blkb	1		;	ID address (CHIP DEVICE ID). 
;;-- Symbols declared in i2c.c ---------------------------------------------------
.glb	_del_2usec
.glb	_del_4usec
.glb	_del_5usec
.glb	_del_15usec
.glb	_del_20usec
.glb	_i2c_baudrate
;;; ---------------------------------------------------------------------------
m_iic:		.blkb	1		;  I2C bus mode condition.
							;  00:	Wait mode stop to start condition. 
							;  02:  Master transmission mode. 
							;  03:  Master receive mode
							;  04:	Slave transmit mode.
							;  05   Slave receive mode.
							;  bit0 0:Write,1:Read
							;  bit1 0:NM 1:Master
							;  bit2 0:NM 1:Slave
;;; ---------------------------------------------------------------------------
	.section	program,code,align
;;; ***************************************************************************
;;; ***************************************************************************
;;; void iic_ini(R0L,A0)
;;;						I2C Bus Initialization 
;;; --------------------------------------------------------------------------
	.align					;
_iic_ini:					;
.if	DEBUG == 1				; 	---DEBUG---
	bset	0,dp			; 	---DEBUG---
.endif						; 	---DEBUG---
	pushc	FLG				;	Push Flag register on to stack. 	
	fclr	I				;	Disable interrupts. 
;;; for C
	and.b	#7fh,R0H		;	 
	mov.b	R0H,id_adr		;	Set ID "Device" address for slave mode. 
	mov.w	A0,slave_ram	;	Set Slave transmit data start address. 
;;
	and.b	#0fch,PD7		;	Set PD7 to input mode SDA and SCL.
;;
	mov.b	#01h,U2SMR		;	Set U2SMR to I2C mode. 
	mov.b	#0d1h,U2SMR2	;	Set to I2C mode, Clock Synch. disable, SCL wait output disable, SDA output stop bit disable,
							;	UART2 init. bit enabled, SCL wait output bit 2 to UART2 clock, SDA output  disable to high
							;	impedance, and Start/stop condition control bit to 1. 
;;
	bset	0,P7			;	Set SDA output to high impedance.  
	mov.b	#0ah,U2MR		;	Set to external clock and I2C mode.  
	mov.b	_i2c_baudrate,U2BRG		; 	Set baudrate.  _i2c_baudrate is define in i2c.c and setup in i2c.h. 
	mov.b	#90h,U2C0		;	Set MSB format for I2C mode. 
	mov.b	#05h,U2C1		;	Transmit and Reception authorized.  
;;
	mov.b	#00h,STSPIC		;	Init. disable STSP interrupts.
	mov.b	#S2RIPL,S2RIC	;	UART2 receive interrupt enable.
;;
	mov.b	#00h,m_iic		;	Init. slave wait mode counter
	mov.b	#00h,md_cnt		;	Init. master data counter. 
	mov.b	#00h,sd_p		;	Init. slave data counter. 
	popc	FLG				;	Pop flag register. 
.if	DEBUG == 1				; 	---DEBUG---
	bclr	0,dp			; 	---DEBUG---
.endif						; 	---DEBUG---
	rts			;
;;; ***************************************************************************
;;; ***************************************************************************
;;; unsigned char iic_kill(void)
;;			Disable I2C Bus.   Return values are;
;;								0:	Stop I2C function completed.
;;								1:	Cannot stop I2C operation, bus is busy.
;;									M16C is currently performing Master Transmission
;;; --------------------------------------------------------------------------
	.align					;
_iic_stop:					;
.if	DEBUG == 1				; ---DEBUG---
	bset	0,dp			; ---DEBUG---
.endif						; ---DEBUG---
	pushc	FLG				;	Push Flag register on to stack.
	fclr	I				;	Disable interrupt.
	btst	1,m_iic			;	Bit test for master or slave operation. 
	jz	iic_stop_slave		;	If Slave mode jump to iic_stop_slave (line #161). 
iic_stop_master:			;
	mov.b	#01h,R0L		;	Disable I2C mode. 
	jmp	iic_stop_common		;	Jump to iic_stop_common (line #171).
iic_stop_slave:				;
	or.b	#03h,P7			; 	SDA/SCL Hi-Z.
	and.b	#0fch,PD7		;	Deacltivate I2C bus.   
	mov.b	#00h,U2C1		;		'
	mov.b	#00h,U2MR		;		'
	mov.b	#00h,U2SMR		;		'
	mov.b	#80h,U2SMR2		;		'
	mov.b	#00h,STSPIC		;		'
	mov.b	#00h,S2RIC		;		'
	mov.b	#00h,R0L		;		'
iic_stop_common:			;
	popc	FLG				;	Pop flag register. 
.if	DEBUG == 1				; 	---DEBUG---
	bclr	0,dp			; 	---DEBUG---
.endif						; 	---DEBUG---
	rts						;
;;; ***************************************************************************
;;; ***************************************************************************
;;; unsigned char iic_mw_start(R0H,A0,R0L)
;;			Start Master Write on I2C bus.
;;			Variables;
;;				ROH:	Transmission data length.
;;				A0:		Data sram start address
;;				ROL: 	Target (ID) address.
;;			Return Values;
;;				0:		Master transmission started correctly.	
;;				1:		Cannot start master transmission.
;;; --------------------------------------------------------------------------
	.align					;
_iic_mw_start:				;
.if	DEBUG == 1				; --- DEBUG ---
	bset	1,dp			; --- DEBUG ---
.endif						; --- DEBUG ---
	pushc	FLG				;	Push Flag register on to stack.
	fclr	I				;	Disable interrupt.  
;;
	mov.b	R0H,mw_lng		;	Set master transmit data length.
	mov.w	A0,mw_data		;	Set master transmit data address 
	fclr	C				;	Set Carry flag to ZERO "WRITE".
	rolc.b	R0L				;	Shift "ROL" left; Carry --> to LSBit of R0L. 
	mov.b	R0L,mw_target	;	Set target's  (ID) address.
;;
	btst	2,U2SMR			;	Bit test of Bus Busy flag. 
	jc	m_Ereturn			;	Jump to master error return.
	mov.b	#02h,m_iic		;	Else Set master transmit mode.
	jmp	m_start				;	Jump to Master Start Function. 
;;; ***************************************************************************
;;; ***************************************************************************
;;; unsigned char iic_mr_start(R0H,R2,R0L)
;;			Start Master Read on I2C bus. 
;;			Variables;
;;				ROH:	Receive data length.
;;				A0:		Receive data start address.
;;				ROL:	Receive target (ID) address
;;			Return Values;
;;				0:		Master Read started successfully. 
;;				1:		Cannot start master read. 
;;; --------------------------------------------------------------------------
	.align					;
_iic_mr_start:				;
.if	DEBUG == 1				; --- DEBUG ---
	bset	2,dp			; --- DEBUG ---
.endif						; --- DEBUG ---
	pushc	FLG				; Push Flag register on to stack.
	fclr	I				; Disable interrupts.
;;
	dec.b	R0H				;  Decrement receive data length.
	mov.b	R0H,mr_lng		;  Store receive data length. 
	mov.w	A0,mr_data		;  Store receive target address.
	fset	C				;  Set carry in flag register to ONE "READ".
	rolc.b	R0L				;  Shift "ROL" left: Carry --> to LSBit	of R0L.
	mov.b	R0L,mr_target	;  Store target's (ID) address. 
;;
	btst	2,U2SMR			;  Bit test of Bus Busy flag.
	jc	m_Ereturn			;  Jump to master error return.
	mov.b	#03h,m_iic		;  Else set master receive mode. 
;;; --------------------------------------------------------------------------
;;	Master start write/read function;  Make Start.
;;; --------------------------------------------------------------------------
	.align					;
m_start:					;
;;
	bclr	3,U2RB+1		; Reset Arbitration Lost detection flag. 	
	mov.b	#01h,R0H		; Set Ninth bit to one.
	bclr	4,U2SMR			; UART2 initialization denied.
	mov.b	#8dh,U2SMR2		; Enable I2C "See page 30 of app. note".
	mov.b	#00h,U2MR		; Initialize "Serial I/O mode not valid(port control).
	bclr	0,P7			; Set data output to low. 
	mov.b	#02h,U2MR		; Set Serial I/O mode to I2C mode. 
							;
	mov.w	R0,U2TB			; Copy data to U2 Transmit buffer.
	bset	1,U2SMR2		; Enable Clock synchronous mode. 
	jsr wait_4usec			; New delay counter July 1999 by Bruce Embry.	
	bset	5,U2SMR2		; Set SCL output to low.  
	jsr wait_15usec			; New delay counter July 1999 by Bruce Embry
	bclr	5,U2SMR2		; Bit Clear SCL output to high. 
;;; for C
	mov.b	#00h,R0L		; Return value to c-code, "0: Master started successfully."
	jmp	m_start_end			;
m_Ereturn:			;
	mov.b	#01h,R0L		; Stop Master transmit.
m_start_end:				;
	popc	FLG				;
.if	DEBUG == 1				; --- DEBUG ---
	mov.b	#00h,dp			; --- DEBUG ---
.endif						; --- DEBUG ---
	rts						; Return sub-routine.
;;; ***************************************************************************
;;; ***************************************************************************
;;	I2C Stop/Start function; Detect interrupt:  Bus Collision detection interrupt.
;;; ---------------------------------------------------------------------------
	.align					;
stsp_int:					;
.if	DEBUG == 1				; --- DEBUG ---
	bset	5,dp			; --- DEBUG ---