sfr62.h

renasas m16c上实现iic通信的源代码.

#define     dv0         idb0_addr.bit.b2    /* (62) */
#define     dvb0        idb0_addr.bit.b3    /* (62) */
#define     dw0         idb0_addr.bit.b4    /* (62) */
#define     dwb0        idb0_addr.bit.b5    /* (62) */

/*------------------------------------------------------
    Three-phase output buffer register 1 (62)
------------------------------------------------------*/
union byte_def idb1_addr;
#define     idb1        idb1_addr.byte

#define     du1         idb1_addr.bit.b0    /* (62) */
#define     dub1        idb1_addr.bit.b1    /* (62) */
#define     dv1         idb1_addr.bit.b2    /* (62) */
#define     dvb1        idb1_addr.bit.b3    /* (62) */
#define     dw1         idb1_addr.bit.b4    /* (62) */
#define     dwb1        idb1_addr.bit.b5    /* (62) */

/*------------------------------------------------------
     (62)
------------------------------------------------------*/
union byte_def dtt_addr;
#define     dtt         dtt_addr.byte

/*------------------------------------------------------
     (62)
------------------------------------------------------*/
union byte_def ictb2_addr;
#define     ictb2       ictb2_addr.byte

/*------------------------------------------------------
    One-shot start flag
------------------------------------------------------*/
union byte_def onsf_addr;
#define     onsf        onsf_addr.byte

#define     ta0os       onsf_addr.bit.b0    /* Timer A0 one-shot start flag */
#define     ta1os       onsf_addr.bit.b1    /* Timer A1 one-shot start flag */
#define     ta2os       onsf_addr.bit.b2    /* Timer A2 one-shot start flag */
#define     ta3os       onsf_addr.bit.b3    /* Timer A3 one-shot start flag */
#define     ta4os       onsf_addr.bit.b4    /* Timer A4 one-shot start flag */
#define     ta0tgl      onsf_addr.bit.b6    /* Timer A0 event/trigger select bit */
#define     ta0tgh      onsf_addr.bit.b7    /* Timer A0 event/trigger select bit */

/*------------------------------------------------------
    Clock prescaler reset flag
------------------------------------------------------*/
union byte_def cpsrf_addr;
#define     cpsrf       cpsrf_addr.byte

#define     cpsr        cpsrf_addr.bit.b7   /* Clock prescaler reset flag */

/*------------------------------------------------------
    Trigger select register
------------------------------------------------------*/
union byte_def trgsr_addr;
#define     trgsr       trgsr_addr.byte

#define     ta1tgl      trgsr_addr.bit.b0   /* Timer A1 event/trigger select bit */
#define     ta1tgh      trgsr_addr.bit.b1   /* Timer A1 event/trigger select bit */
#define     ta2tgl      trgsr_addr.bit.b2   /* Timer A2 event/trigger select bit */
#define     ta2tgh      trgsr_addr.bit.b3   /* Timer A2 event/trigger select bit */
#define     ta3tgl      trgsr_addr.bit.b4   /* Timer A3 event/trigger select bit */
#define     ta3tgh      trgsr_addr.bit.b5   /* Timer A3 event/trigger select bit */
#define     ta4tgl      trgsr_addr.bit.b6   /* Timer A4 event/trigger select bit */
#define     ta4tgh      trgsr_addr.bit.b7   /* Timer A4 event/trigger select bit */

/*------------------------------------------------------
    Up/down flag
------------------------------------------------------*/
union byte_def udf_addr;
#define     udf     udf_addr.byte

#define     ta0ud       udf_addr.bit.b0     /* Timer A0 up/down flag */
#define     ta1ud       udf_addr.bit.b1     /* Timer A1 up/down flag */
#define     ta2ud       udf_addr.bit.b2     /* Timer A2 up/down flag */
#define     ta3ud       udf_addr.bit.b3     /* Timer A3 up/down flag */
#define     ta4ud       udf_addr.bit.b4     /* Timer A4 up/down flag */
#define     ta2p        udf_addr.bit.b5     /* Timer A2 two-phase pulse signal processing select bit */
#define     ta3p        udf_addr.bit.b6     /* Timer A3 two-phase pulse signal processing select bit */
#define     ta4p        udf_addr.bit.b7     /* Timer A4 two-phase pulse signal processing select bit */

/*------------------------------------------------------
    UART transmit/receive control register 2
------------------------------------------------------*/
union byte_def ucon_addr;
#define     ucon        ucon_addr.byte

#define     u0irs       ucon_addr.bit.b0    /* UART0 transmit interrupt cause select bit */
#define     u1irs       ucon_addr.bit.b1    /* UART1 transmit interrupt cause select bit */
#define     u0rrm       ucon_addr.bit.b2    /* UART0 continuous receive mode enable bit */
#define     u1rrm       ucon_addr.bit.b3    /* UART1 continuous receive mode enable bit */
#define     clkmd0      ucon_addr.bit.b4    /* CLK/CLKS select bit 0 */
#define     clkmd1      ucon_addr.bit.b5    /* CLK/CLKS select bit 1 */
#define     rcsp        ucon_addr.bit.b6    /* Separate CTS/RTS bit */

/*------------------------------------------------------
    UART2 transmit/receive control register 1                       (61)
------------------------------------------------------*/
union byte_def u2c1_addr;
#define     u2c1        u2c1_addr.byte

#define     te_u2c1     u2c1_addr.bit.b0    /* Transmit enable bit */
#define     ti_u2c1     u2c1_addr.bit.b1    /* Transmit buffer empty flag */
#define     re_u2c1     u2c1_addr.bit.b2    /* Receive enable bit */
#define     ri_u2c1     u2c1_addr.bit.b3    /* Receive complete flag */
#define     u2irs       u2c1_addr.bit.b4    /* UART2 transmit interrupt cause select bit */
#define     u2rrm       u2c1_addr.bit.b5    /* UART2 continuous receive mode enable bit */
#define     u2lch       u2c1_addr.bit.b6    /* Data logic select bit */
#define     u2ere       u2c1_addr.bit.b7    /* Error signal output enable bit */

/*------------------------------------------------------
    UART2 special mode register3    (62A)
------------------------------------------------------*/
union byte_def u2smr3_addr;
#define     u2smr3          u2smr3_addr.byte

#define     dl0 u2smr3_addr.bit.b5      /* SDA digital delay setup bit */
#define     dl1 u2smr3_addr.bit.b6      /* SDA digital delay setup bit */
#define     dl2 u2smr3_addr.bit.b7      /* SDA digital delay setup bit */

/*------------------------------------------------------
    UART2 special mode register2    (62)
------------------------------------------------------*/
union byte_def u2smr2_addr;
#define     u2smr2          u2smr2_addr.byte

#define     iicm2   u2smr2_addr.bit.b0      /* IIC mode selection bit 2*/
#define     csc     u2smr2_addr.bit.b1      /* Clock-synchronous bit */
#define     swc     u2smr2_addr.bit.b2      /* SCL wait output bit */
#define     als     u2smr2_addr.bit.b3      /* SDA output stop bit */
#define     stac    u2smr2_addr.bit.b4      /* UART2 initialization bit */
#define     swc2    u2smr2_addr.bit.b5      /* SCL wait output bit 2 */
#define     sdhi    u2smr2_addr.bit.b6      /* SDA output disable bit */
#define     shtc    u2smr2_addr.bit.b7      /* Start/stop condition control bit */

/*------------------------------------------------------
    UART2 special mode register     (62)
------------------------------------------------------*/
union byte_def u2smr_addr;
#define     u2smr   u2smr_addr.byte

#define     iicm    u2smr_addr.bit.b0   /* IIC mode selection bit */
#define     abc     u2smr_addr.bit.b1   /* Arbitration lost detecting flag control bit */
#define     bbs     u2smr_addr.bit.b2   /* Bus busy flag */
#define     lsyn    u2smr_addr.bit.b3   /* SCLL sync output enable bit */
#define     abscs   u2smr_addr.bit.b4   /* Bus collision detect sampling clock select bit */
#define     acse    u2smr_addr.bit.b5   /* Auto clear function select bit of transmit enable bit */
#define     sss     u2smr_addr.bit.b6   /* Transmit start condition select bit */
#define     sdds    u2smr_addr.bit.b7   /* SDA digital delay select bit (62A) /*
/*------------------------------------------------------
    A-D control register 0
------------------------------------------------------*/
union byte_def adcon0_addr;
#define     adcon0      adcon0_addr.byte

#define     ch0     adcon0_addr.bit.b0  /* Analog input pin select bit */
#define     ch1     adcon0_addr.bit.b1  /* Analog input pin select bit */
#define     ch2     adcon0_addr.bit.b2  /* Analog input pin select bit */
#define     md0     adcon0_addr.bit.b3  /* A-D operation mode select bit 0 */
#define     md1     adcon0_addr.bit.b4  /* A-D operation mode select bit 0 */
#define     trg     adcon0_addr.bit.b5  /* Trigger select bit */
#define     adst    adcon0_addr.bit.b6  /* A-D conversion start flag*/
#define     cks0    adcon0_addr.bit.b7  /* Frequency select bit 0 */

/*------------------------------------------------------
    A-D control register 1
------------------------------------------------------*/
union byte_def adcon1_addr;
#define     adcon1      adcon1_addr.byte

#define     scan0       adcon1_addr.bit.b0  /* A-D sweep pin select bit */
#define     scan1       adcon1_addr.bit.b1  /* A-D sweep pin select bit */
#define     md2         adcon1_addr.bit.b2  /* A-D operation mode select bit 1 */
#define     bits        adcon1_addr.bit.b3  /* 8/10 bit mode select bit */
#define     cks1        adcon1_addr.bit.b4  /* Frequency select bit 1 */
#define     vcut        adcon1_addr.bit.b5  /* Vref connect bit */
#define     opa0        adcon1_addr.bit.b6  /* External op-amp connection mode bit */
#define     opa1        adcon1_addr.bit.b7  /* External op-amp connection mode bit */

/*------------------------------------------------------
    A-D control register 2  
------------------------------------------------------*/
union byte_def adcon2_addr;
#define     adcon2      adcon2_addr.byte

#define     smp         adcon2_addr.bit.b0  /* A-D conversion method select bit */

/*------------------------------------------------------
    D-A control register
------------------------------------------------------*/
union byte_def dacon_addr;
#define     dacon       dacon_addr.byte

#define     da0e        dacon_addr.bit.b0   /* D-A0 output enable bit */
#define     da1e        dacon_addr.bit.b1   /* D-A1 output enable bit */

/*------------------------------------------------------
    Port P0
------------------------------------------------------*/
union byte_def p0_addr;
#define     p0      p0_addr.byte

#define     p0_0        p0_addr.bit.b0      /* Port P0  bit0 */
#define     p0_1        p0_addr.bit.b1      /* Port P0  bit1 */
#define     p0_2        p0_addr.bit.b2      /* Port P0  bit2 */
#define     p0_3        p0_addr.bit.b3      /* Port P0  bit3 */
#define     p0_4        p0_addr.bit.b4      /* Port P0  bit4 */
#define     p0_5        p0_addr.bit.b5      /* Port P0  bit5 */
#define     p0_6        p0_addr.bit.b6      /* Port P0  bit6 */
#define     p0_7        p0_addr.bit.b7      /* Port P0  bit7 */

/*------------------------------------------------------
    Port P0 direction register
------------------------------------------------------*/
union byte_def pd0_addr;
#define     pd0     pd0_addr.byte

#define     pd0_0       pd0_addr.bit.b0     /* P0 direction register  bit0 */
#define     pd0_1       pd0_addr.bit.b1     /* P0 direction register  bit1 */
#define     pd0_2       pd0_addr.bit.b2     /* P0 direction register  bit2 */
#define     pd0_3       pd0_addr.bit.b3     /* P0 direction register  bit3 */
#define     pd0_4       pd0_addr.bit.b4     /* P0 direction register  bit4 */
#define     pd0_5       pd0_addr.bit.b5     /* P0 direction register  bit5 */
#define     pd0_6       pd0_addr.bit.b6     /* P0 direction register  bit6 */
#define     pd0_7       pd0_addr.bit.b7     /* P0 direction register  bit7 */

/*------------------------------------------------------
    Port P1
------------------------------------------------------*/
union byte_def p1_addr;
#define     p1      p1_addr.byte

#define     p1_0        p1_addr.bit.b0      /* Port P1  bit0 */
#define     p1_1        p1_addr.bit.b1      /* Port P1  bit1 */
#define     p1_2        p1_addr.bit.b2      /* Port P1  bit2 */
#define     p1_3        p1_addr.bit.b3      /* Port P1  bit3 */
#define     p1_4        p1_addr.bit.b4      /* Port P1  bit4 */
#define     p1_5        p1_addr.bit.b5      /* Port P1  bit5 */
#define     p1_6        p1_addr.bit.b6      /* Port P1  bit6 */
#define     p1_7        p1_addr.bit.b7      /* Port P1  bit7 */

/*------------------------------------------------------
    Port P1 direction register
------------------------------------------------------*/
union byte_def pd1_addr;
#define     pd1     pd1_addr.byte

#define     pd1_0       pd1_addr.bit.b0     /* P1 direction register  bit0 */
#define     pd1_1       pd1_addr.bit.b1     /* P1 direction register  bit1 */
#define     pd1_2       pd1_addr.bit.b2     /* P1 direction register  bit2 */
#define     pd1_3       pd1_addr.bit.b3     /* P1 direction register  bit3 */
#define     pd1_4       pd1_addr.bit.b4     /* P1 direction register  bit4 */
#define     pd1_5       pd1_addr.bit.b5     /* P1 direction register  bit5 */
#define     pd1_6       pd1_addr.bit.b6     /* P1 direction register  bit6 */
#define     pd1_7       pd1_addr.bit.b7     /* P1 direction register  bit7 */

/*------------------------------------------------------
    Port P2
------------------------------------------------------*/
union byte_def p2_addr;
#define     p2      p2_addr.byte

#define     p2_0        p2_addr.bit.b0      /* Port P2  bit0 */
#define     p2_1        p2_addr.bit.b1      /* Port P2  bit1 */
#define     p2_2        p2_addr.bit.b2      /* Port P2  bit2 */
#define     p2_3        p2_addr.bit.b3      /* Port P2  bit3 */
#define     p2_4        p2_addr.bit.b4      /* Port P2  bit4 */
#define     p2_5        p2_addr.bit.b5      /* Port P2  bit5 */
#define     p2_6        p2_addr.bit.b6      /* Port P2  bit6 */
#define     p2_7        p2_addr.bit.b7      /* Port P2  bit7 */

/*------------------------------------------------------
    Port P2 direction register
------------------------------------------------------*/
union byte_def pd2_addr;
#define     pd2     pd2_addr.byte

#define     pd2_0       pd2_addr.bit.b0     /* P2 direction register  bit0 */
#define     pd2_1       pd2_addr.bit.b1     /* P2 direction register  bit1 */
#define     pd2_2       pd2_addr.bit.b2     /* P2 direction register  bit2 */
#define     pd2_3       pd2_addr.bit.b3     /* P2 direction register  bit3 */
#define     pd2_4       pd2_addr.bit.b4     /* P2 direction register  bit4 */
#define     pd2_5       pd2_addr.bit.b5     /* P2 direction register  bit5 */
#define     pd2_6       pd2_addr.bit.b6     /* P2 direction register  bit6 */