board.h

一个mp3的解码程序

#ifndef __44B0X_H__
#define __44B0X_H__

#ifdef __cplusplus
extern "C" {
#endif

#define _ISR_STARTADDRESS 0x0c7fff00
#define _LCD_ADDRESS      0x0c400000


/* System */
#define rSYSCFG			0x1c00000

/* Cache */
#define rNCACHBE0		0x1c00004
#define rNCACHBE1		0x1c00008

/* Bus control */
#define rSBUSCON		0x1c40000
    
/* Memory control */
#define rBWSCON			0x1c80000
#define rBANKCON0		0x1c80004
#define rBANKCON1		0x1c80008
#define rBANKCON2		0x1c8000c
#define rBANKCON3		0x1c80010
#define rBANKCON4		0x1c80014
#define rBANKCON5		0x1c80018
#define rBANKCON6		0x1c8001c
#define rBANKCON7		0x1c80020
#define rREFRESH		0x1c80024
#define rBANKSIZE		0x1c80028
#define rMRSRB6			0x1c8002c
#define rMRSRB7			0x1c80030

/* UART */
#define rULCON0			0x1d00000
#define rULCON1			0x1d04000
#define rUCON0			0x1d00004
#define rUCON1			0x1d04004
#define rUFCON0			0x1d00008
#define rUFCON1			0x1d04008
#define rUMCON0			0x1d0000c
#define rUMCON1			0x1d0400c
#define rUTRSTAT0		0x1d00010
#define rUTRSTAT1		0x1d04010
#define rUERSTAT0		0x1d00014
#define rUERSTAT1		0x1d04014
#define rUFSTAT0		0x1d00018
#define rUFSTAT1		0x1d04018
#define rUMSTAT0		0x1d0001c
#define rUMSTAT1		0x1d0401c
#define rUBRDIV0		0x1d00028
#define rUBRDIV1		0x1d04028

#ifdef __BIG_ENDIAN
#define rUTXH0			0x1d00023
#define rUTXH1			0x1d04023
#define rURXH0			0x1d00027
#define rURXH1			0x1d04027
#define UTXH0			(0x1d00020+3)  //byte_access address by BDMA
#define UTXH1			(0x1d04020+3)
#define URXH0			(0x1d00024+3)  
#define URXH1			(0x1d04024+3)  

#else //Little Endian
#define rUTXH0			0x1d00020
#define rUTXH1			0x1d04020
#define rURXH0			0x1d00024
#define rURXH1			0x1d04024
#define UTXH0			(0x1d00020)    //byte_access address by BDMA
#define UTXH1			(0x1d04020)
#define URXH0			(0x1d00024)
#define URXH1			(0x1d04024)
#endif

/* SIO */
#define rSIOCON			0x1d14000
#define rSIODAT			0x1d14004
#define rSBRDR			0x1d14008
#define rIVTCNT			0x1d1400c
#define rDCNTZ			0x1d14010

/* IIS */
#define rIISCON			0x1d18000
#define rIISMOD			0x1d18004
#define rIISPSR			0x1d18008
#define rIISFCON		0x1d1800c

#ifdef __BIG_ENDIAN
#define IISFIF			0x1d18012

#else //Little Endian
#define IISFIF			0x1d18010
#endif

/* I/O PORT */
#define rPCONA			0x1d20000
#define rPDATA			0x1d20004

#define rPCONB			0x1d20008
#define rPDATB			0x1d2000c

#define rPCONC			0x1d20010
#define rPDATC			0x1d20014
#define rPUPC			0x1d20018

#define rPCOND			0x1d2001c
#define rPDATD			0x1d20020
#define rPUPD			0x1d20024

#define rPCONE			0x1d20028
#define rPDATE			0x1d2002c
#define rPUPE			0x1d20030

#define rPCONF			0x1d20034
#define rPDATF			0x1d20038
#define rPUPF			0x1d2003c

#define rPCONG			0x1d20040
#define rPDATG			0x1d20044
#define rPUPG			0x1d20048

#define rSPUCR			0x1d2004c
#define rEXTINT			0x1d20050
#define rEXTINTPND		0x1d20054

/* WATCHDOG */
#define rWTCON			0x1d30000
#define rWTDAT			0x1d30004
#define rWTCNT			0x1d30008

/* ADC */
#define rADCCON			0x1d40000
#define rADCPSR			0x1d40004
#define rADCDAT			0x1d40008

/* Timer */
#define rTCFG0			0x1d50000
#define rTCFG1			0x1d50004
#define rTCON			0x1d50008

#define rTCNTB0			0x1d5000c
#define rTCMPB0			0x1d50010
#define rTCNTO0			0x1d50014

#define rTCNTB1			0x1d50018
#define rTCMPB1			0x1d5001c
#define rTCNTO1			0x1d50020

#define rTCNTB2			0x1d50024
#define rTCMPB2			0x1d50028
#define rTCNTO2			0x1d5002c

#define rTCNTB3			0x1d50030
#define rTCMPB3			0x1d50034
#define rTCNTO3			0x1d50038

#define rTCNTB4			0x1d5003c
#define rTCMPB4			0x1d50040
#define rTCNTO4			0x1d50044

#define rTCNTB5			0x1d50048
#define rTCNTO5			0x1d5004c

/* IIC */
#define rIICCON         0x1d60000
#define rIICSTAT        0x1d60004
#define rIICADD         0x1d60008
#define rIICDS          0x1d6000c

/* RTC */
#ifdef __BIG_ENDIAN
#define rRTCCON			0x1d70043
#define rRTCALM         0x1d70053
#define rALMSEC         0x1d70057
#define rALMMIN         0x1d7005b
#define rALMHOUR        0x1d7005f
#define rALMDAY         0x1d70063
#define rALMMON         0x1d70067
#define rALMYEAR        0x1d7006b
#define rRTCRST         0x1d7006f
#define rBCDSEC         0x1d70073
#define rBCDMIN         0x1d70077
#define rBCDHOUR        0x1d7007b
#define rBCDDAY         0x1d7007f
#define rBCDDATE        0x1d70083
#define rBCDMON         0x1d70087
#define rBCDYEAR        0x1d7008b
#define rTICINT         0x1d7008e
#else
#define rRTCCON         0x1d70040
#define rRTCALM         0x1d70050
#define rALMSEC         0x1d70054
#define rALMMIN         0x1d70058
#define rALMHOUR        0x1d7005c
#define rALMDAY         0x1d70060
#define rALMMON         0x1d70064
#define rALMYEAR        0x1d70068
#define rRTCRST         0x1d7006c
#define rBCDSEC         0x1d70070
#define rBCDMIN         0x1d70074
#define rBCDHOUR        0x1d70078
#define rBCDDAY         0x1d7007c
#define rBCDDATE        0x1d70080
#define rBCDMON         0x1d70084
#define rBCDYEAR        0x1d70088
#define rTICINT         0x1d7008c 
#endif

/* Clock & Power management */
#define rPLLCON			0x1d80000
#define rCLKCON			0x1d80004
#define rCLKSLOW		0x1d80008
#define rLOCKTIME		0x1d8000c

/* INTERRUPT */
#define rINTCON			0x1e00000
#define rINTPND			0x1e00004
#define rINTMOD			0x1e00008
#define rINTMSK			0x1e0000c

#define rI_PSLV			0x1e00010
#define rI_PMST			0x1e00014
#define rI_CSLV			0x1e00018
#define rI_CMST			0x1e0001c
#define rI_ISPR			0x1e00020
#define rI_ISPC			0x1e00024

#define rF_ISPR			0x1e00038
#define rF_ISPC			0x1e0003c

/* LCD */
#define rLCDCON1		0x1f00000
#define rLCDCON2		0x1f00004
#define rLCDCON3		0x1f00040
#define rLCDSADDR1		0x1f00008
#define rLCDSADDR2		0x1f0000c
#define rLCDSADDR3		0x1f00010
#define rREDLUT			0x1f00014
#define rGREENLUT		0x1f00018
#define rBLUELUT		0x1f0001c
#define rDP1_2			0x1f00020
#define rDP4_7			0x1f00024
#define rDP3_5			0x1f00028
#define rDP2_3			0x1f0002c
#define rDP5_7			0x1f00030
#define rDP3_4			0x1f00034
#define rDP4_5			0x1f00038
#define rDP6_7			0x1f0003c
#define rDITHMODE		0x1f00044

/* ZDMA0 */
#define rZDCON0			0x1e80000
#define rZDISRC0		0x1e80004
#define rZDIDES0		0x1e80008
#define rZDICNT0		0x1e8000c
#define rZDCSRC0		0x1e80010
#define rZDCDES0		0x1e80014
#define rZDCCNT0		0x1e80018

/* ZDMA1 */
#define rZDCON1			0x1e80020
#define rZDISRC1		0x1e80024
#define rZDIDES1		0x1e80028
#define rZDICNT1		0x1e8002c
#define rZDCSRC1		0x1e80030
#define rZDCDES1		0x1e80034
#define rZDCCNT1		0x1e80038
	
/* BDMA0 */
#define rBDCON0			0x1f80000
#define rBDISRC0		0x1f80004
#define rBDIDES0		0x1f80008
#define rBDICNT0		0x1f8000c
#define rBDCSRC0		0x1f80010
#define rBDCDES0		0x1f80014
#define rBDCCNT0		0x1f80018

/* BDMA1 */
#define rBDCON1			0x1f80020
#define rBDISRC1		0x1f80024
#define rBDIDES1		0x1f80028
#define rBDICNT1		0x1f8002c
#define rBDCSRC1		0x1f80030
#define rBDCDES1		0x1f80034
#define rBDCCNT1		0x1f80038

/* ISR */
#define pISR_RESET		(_ISR_STARTADDRESS+0x0))
#define pISR_UNDEF		(_ISR_STARTADDRESS+0x4))
#define pISR_SWI		(_ISR_STARTADDRESS+0x8))
#define pISR_PABORT		(_ISR_STARTADDRESS+0xc))
#define pISR_DABORT		(_ISR_STARTADDRESS+0x10)
#define pISR_RESERVED	(_ISR_STARTADDRESS+0x14)
#define pISR_IRQ		(_ISR_STARTADDRESS+0x18)
#define pISR_FIQ		(_ISR_STARTADDRESS+0x1c)

#define pISR_ADC		(_ISR_STARTADDRESS+0x20)
#define pISR_RTC		(_ISR_STARTADDRESS+0x24)
#define pISR_UTXD1		(_ISR_STARTADDRESS+0x28)
#define pISR_UTXD0		(_ISR_STARTADDRESS+0x2c)
#define pISR_SIO		(_ISR_STARTADDRESS+0x30)
#define pISR_IIC		(_ISR_STARTADDRESS+0x34)
#define pISR_URXD1		(_ISR_STARTADDRESS+0x38)
#define pISR_URXD0		(_ISR_STARTADDRESS+0x3c)
#define pISR_TIMER5		(_ISR_STARTADDRESS+0x40)
#define pISR_TIMER4		(_ISR_STARTADDRESS+0x44)
#define pISR_TIMER3		(_ISR_STARTADDRESS+0x48)
#define pISR_TIMER2		(_ISR_STARTADDRESS+0x4c)
#define pISR_TIMER1		(_ISR_STARTADDRESS+0x50)
#define pISR_TIMER0		(_ISR_STARTADDRESS+0x54)
#define pISR_UERR01		(_ISR_STARTADDRESS+0x58)
#define pISR_WDT		(_ISR_STARTADDRESS+0x5c)
#define pISR_BDMA1		(_ISR_STARTADDRESS+0x60)
#define pISR_BDMA0		(_ISR_STARTADDRESS+0x64)
#define pISR_ZDMA1		(_ISR_STARTADDRESS+0x68)
#define pISR_ZDMA0		(_ISR_STARTADDRESS+0x6c)
#define pISR_TICK		(_ISR_STARTADDRESS+0x70)
#define pISR_EINT4567	(_ISR_STARTADDRESS+0x74)
#define pISR_EINT3		(_ISR_STARTADDRESS+0x78)
#define pISR_EINT2		(_ISR_STARTADDRESS+0x7c)
#define pISR_EINT1		(_ISR_STARTADDRESS+0x80)
#define pISR_EINT0		(_ISR_STARTADDRESS+0x84)

/* PENDING BIT */
//CAUTION:You must clear the pending bit as general special register.
//        it's different way with KS32C6x00 
#define BIT_ADC		(0x1)
#define BIT_RTC		(0x1<<1)
#define BIT_UTXD1	(0x1<<2)
#define BIT_UTXD0	(0x1<<3)
#define BIT_SIO		(0x1<<4)
#define BIT_IIC		(0x1<<5)
#define BIT_URXD1	(0x1<<6)
#define BIT_URXD0	(0x1<<7)
#define BIT_TIMER5	(0x1<<8)
#define BIT_TIMER4	(0x1<<9)
#define BIT_TIMER3	(0x1<<10)
#define BIT_TIMER2	(0x1<<11)
#define BIT_TIMER1	(0x1<<12)
#define BIT_TIMER0	(0x1<<13)
#define BIT_UERR01	(0x1<<14)
#define BIT_WDT		(0x1<<15)
#define BIT_BDMA1	(0x1<<16)
#define BIT_BDMA0	(0x1<<17)
#define BIT_ZDMA1	(0x1<<18)
#define BIT_ZDMA0	(0x1<<19)
#define BIT_TICK	(0x1<<20)
#define BIT_EINT4567	(0x1<<21)
#define BIT_EINT3	(0x1<<22)
#define BIT_EINT2	(0x1<<23)
#define BIT_EINT1	(0x1<<24)
#define BIT_EINT0	(0x1<<25)
#define BIT_GLOBAL	(0x1<<26)


#define BIT0	(0x1<<0)
#define BIT1	(0x1<<1)
#define BIT2	(0x1<<2)
#define BIT3	(0x1<<3)
#define BIT4	(0x1<<4)
#define BIT5	(0x1<<5)
#define BIT6	(0x1<<6)
#define BIT7	(0x1<<7)
#define BIT8	(0x1<<8)
#define BIT9	(0x1<<9)
#define BIT10	(0x1<<10)
#define BIT11	(0x1<<11)
#define BIT12	(0x1<<12)
#define BIT13	(0x1<<13)
#define BIT14	(0x1<<14)
#define BI115	(0x1<<15)
#define BIT16	(0x1<<16)
#define BIT17	(0x1<<17)
#define BIT18	(0x1<<18)
#define BIT19	(0x1<<19)
#define BIT20	(0x1<<20)
#define BIT21	(0x1<<21)
#define BIT22	(0x1<<22)
#define BIT23	(0x1<<23)
#define BIT24	(0x1<<24)
#define BIT25	(0x1<<25)
#define BIT26	(0x1<<26)
#define BIT27	(0x1<<27)
#define BIT28	(0x1<<28)
#define BIT29	(0x1<<29)
#define BIT30	(0x1<<30)
#define BIT31	(0x1<<31)

#define INT_EXTINT0	0
#define INT_EXTINT1	1
#define INT_EXTINT2	2
#define INT_EXTINT3	3
#define INT_EINT456 4
#define INT_TICK	5
#define INT_ZDMA0	6
#define INT_ZDMA1	7
#define INT_BDMA0	8
#define INT_BDMA1	9
#define INT_WDT		10
#define INT_UERR01	11
#define INT_TIMER0	12
#define INT_TIMER1	13
#define INT_TIMER2	14
#define INT_TIMER3	15
#define INT_TIMER4	16
#define INT_TIMER5	17
#define INT_URXD0	18
#define INT_URXD1	19
#define INT_IIC		20
#define INT_SIO		21
#define INT_UTXD0	22
#define INT_UTXD1	23
#define INT_RTC		24
#define INT_ADC		25

#define FLASH_SECTOR_SIZE	0x1000
#define FLASH_WORDS_MASK	(FLASH_SECTOR_SIZE-1)
#define FLASH_SECTOR_MASK	(~FLASH_WORDS_MASK)

#define LCDBASE (unsigned char *) _LCD_ADDRESS

#define MCLK 60000000

#define VPint		*(volatile unsigned int *)
#define VPshort		*(volatile unsigned short *)
#define VPchar		*(volatile unsigned char *)

#define inl(addr)        (VPint(addr))
#define outl(data, addr) (VPint(addr)= (data))

#define ins(addr)        (VPshort(addr))
#define outs(data, addr) (VPshort(addr)= (data))

#define inc(addr)        (VPchar(addr))
#define outc(data, addr) (VPchar(addr)= (data))

#define hook(funcp, funca)	 (*(unsigned *)(funca) = (unsigned)(funcp))

#ifdef __cplusplus
}
#endif
#endif /*__41000_H___*/