scan8_dig.vhd

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library IEEE;
   use IEEE.std_logic_1164.all;
   use IEEE.std_logic_arith.all;
   use IEEE.std_logic_unsigned.all;
 
library work;
   use work.my_package.all;

entity SCAN8_DIG is
      Port (RESET : In STD_LOGIC;
	    CLK_10M : In STD_LOGIC;	-- 10MHz Clock
	    TEST : In STD_LOGIC;  	--  '1' for test mode
  	    SCAN_COL : Out STD_LOGIC_VECTOR (7 downto 0);
	    SCAN_ROW : Out STD_LOGIC_VECTOR (7 downto 0);
	    SCAN_DIG : Out STD_LOGIC_VECTOR (2 downto 0);
	    SCAN_DIG_1 : Out STD_LOGIC_VECTOR (7 downto 0);
	    DISP_ID : Out UNSIGNED(7 downto 0));
end SCAN8_DIG;

architecture BEHAVIORAL of SCAN8_DIG is
signal CLK_1M, CLK_1Hz : STD_LOGIC;
signal div10 : STD_LOGIC_VECTOR(3 downto 0);
signal div_1M : STD_LOGIC_VECTOR(19 downto 0);
signal TEST_CLK_en : STD_LOGIC;
signal SCAN_COUNT : STD_LOGIC_VECTOR(5 downto 0);
signal iSCAN_LINE : STD_LOGIC_VECTOR(7 downto 0);
signal iSCAN_DIGIT : STD_LOGIC_VECTOR(2 downto 0);
signal iSCAN_ROW : UNSIGNED(2 downto 0);
signal iFONT_CODE : STD_LOGIC_VECTOR(7 downto 0);
signal iSCAN_ADDR : UNSIGNED(10 downto 0);
signal iDISP_CODE : RAM_TYPE(7 downto 0); 
signal iDISP_ID : UNSIGNED(7 downto 0);


component CHAR_FONT 
Port (   
		SCAN_ADDR : In	UNSIGNED (10 downto 0);
		FONT_CODE : Out	STD_LOGIC_VECTOR (7 downto 0)
		);
end component;


begin

----------- Clock generator module ------------------------
Clock_generator: block begin
  process(RESET,CLK_10M)
  begin
  	if RESET = '1' then
  		div10 <= "0000";
  		CLK_1M <= '0';	-- 1MHz clock for scan controller
  	elsif CLK_10M'event and CLK_10M = '1' then
  		if div10 = 9 then
  			div10 <= "0000";
  		else
  			div10 <= div10 + 1;
  		end if;
  		if div10 = 4 then
  			CLK_1M <= not CLK_1M;
  		end if;
  	end if;
  end process;

  process(RESET,CLK_1M)
  begin
  	if RESET = '1' then
  		div_1M <= X"00000";
  		CLK_1Hz <= '1';	-- ~1Hz clock
  	elsif CLK_1M'event and CLK_1M = '1' then
		if TEST = '0' then -- Normal use, 
	  		if div_1M(19) = '1' then
  				div_1M <= X"00000";
  				CLK_1Hz <= not CLK_1Hz;
	  		else
  				div_1M <= div_1M + 1;
	  		end if;
		else 
			CLK_1Hz <= TEST_CLK_en;
 		end if;
  	end if;
  end process;
end block;

----------- 4 bit Hexdecimal counter + 8 digits 4-bit shift register ------------
Hex_counter: block begin
  process(RESET,CLK_1Hz)
  variable temp : unsigned(7 downto 0);
  begin
  	if RESET = '1' then
  		iDISP_CODE(0) <= "00000000";
  		iDISP_CODE(1) <= "00000000";
  		iDISP_CODE(2) <= "00000000";
  		iDISP_CODE(3) <= "00000000";
  		iDISP_CODE(4) <= "00000000";
  		iDISP_CODE(5) <= "00000000";
  		iDISP_CODE(6) <= "00000000";
  		iDISP_CODE(7) <= "00000000";
  	elsif CLK_1Hz'event and CLK_1Hz = '1' then
		temp := iDISP_CODE(0);
  		if temp = 0 then 
  			iDISP_CODE(0) <= "00001111";
  		else 
			iDISP_CODE(0) <= temp - 1;
  		end if;
  		iDISP_CODE(1) <= iDISP_CODE(0);
  		iDISP_CODE(2) <= iDISP_CODE(1);
  		iDISP_CODE(3) <= iDISP_CODE(2);
  		iDISP_CODE(4) <= iDISP_CODE(3);
  		iDISP_CODE(5) <= iDISP_CODE(4);
  		iDISP_CODE(6) <= iDISP_CODE(5);
  		iDISP_CODE(7) <= iDISP_CODE(6);
  	end if;
  end process;
end block;


----------- 8 digit scan module ------------------------
scan_module: block begin


  process(RESET,CLK_1M)
  begin
  	if RESET = '1' then
		iSCAN_LINE <= "10000000";
		SCAN_COUNT <= "111111";  -- Digit Count & Line Count
  	elsif CLK_1M'event and CLK_1M = '1' then
		iSCAN_LINE <= iSCAN_LINE(6 downto 0) & iSCAN_LINE(7); -- rotate left 1 bit
		SCAN_COUNT <= SCAN_COUNT + 1;
  	end if;
  end process;

  TEST_CLK_en <= '1' when SCAN_COUNT = "111111" else
		     '0';

  iSCAN_ROW <= CONV_UNSIGNED(CONV_INTEGER(SCAN_COUNT(2 downto 0)),3);
  iSCAN_DIGIT <= not SCAN_COUNT(5 downto 3);
  SCAN_DIG<=iSCAN_DIGIT;
  SCAN_DIG_1 <= "01111111" when iSCAN_DIGIT = "111" else
		"10111111" when iSCAN_DIGIT = "110" else
		"11011111" when iSCAN_DIGIT = "101" else
		"11101111" when iSCAN_DIGIT = "100" else
		"11110111" when iSCAN_DIGIT = "011" else
		"11111011" when iSCAN_DIGIT = "010" else
		"11111101" when iSCAN_DIGIT = "001" else
		"11111110";

  iDISP_ID <= iDISP_CODE(7) when iSCAN_DIGIT = "111" else
		iDISP_CODE(6) when iSCAN_DIGIT = "110" else
		iDISP_CODE(5) when iSCAN_DIGIT = "101" else
		iDISP_CODE(4) when iSCAN_DIGIT = "100" else
		iDISP_CODE(3) when iSCAN_DIGIT = "011" else
		iDISP_CODE(2) when iSCAN_DIGIT = "010" else
		iDISP_CODE(1) when iSCAN_DIGIT = "001" else
		iDISP_CODE(0);
 
  iSCAN_ADDR <= iDISP_ID & iSCAN_ROW;

  SCAN_COL <= iFONT_CODE;
  SCAN_ROW <= iSCAN_LINE;
  DISP_ID <= iDISP_ID;

  FONT_ROM: CHAR_FONT 
  	Port Map (   
		SCAN_ADDR => iSCAN_ADDR,
		FONT_CODE => iFONT_CODE );

end block;

end BEHAVIORAL;