debounce.vhd

VHDL源代码下载

--debounce.vhd keypress debounce
library ieee ;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity debounce is
port(
  key_pressed : in std_logic;--key_pressed?
  clk : in std_logic;--clock for synchrony
  scan_f : in std_logic;--1khz clock
  key_valid : out std_logic);--key_valid?
end debounce;
architecture behavior of debounce is
begin
  debounce:process(clk,scan_f,key_pressed)
    variable dbnq : std_logic_vector(5 downto 0);
  begin
    if (key_pressed='1') then
      dbnq:="111111";--unkey_pressed,counter reset at 63
    elsif (clk'event and clk='1') then
      if scan_f='1' then
        if dbnq/=1 then
          dbnq:=dbnq-1;--key_pressed not enough long time 
        end if;        --counter still subtract one
      end if;
    end if;
    if dbnq=2 then
      key_valid<='1';--key_valid after key_pressed 1/63k second
     else
      key_valid<='0';--key_invalid
    end if;
  end process;
end behavior;