count_down.vhd

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library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.std_logic_arith.all;
use IEEE.std_logic_unsigned.all;
entity count_down is
    port(reset: in std_logic;
         clk:in std_logic;
         ena_1Hz:in std_logic;
         recount:in std_logic;
         load: in std_logic_vector(7 downto 0);
         seg7:out std_logic_vector(15 downto 0);
         next_state: out std_logic);
end;   
architecture BEHAVIOR of count_down is     
signal cnt_ff:std_logic_vector(7 downto 0); 
begin
   count:process(clk,reset)
   begin
       if (reset='1') then
          cnt_ff<="00000000";
          seg7<="0000000000000000";
       elsif (clk'event and clk='1') then
          if ena_1Hz='1' then
             if (recount='1') then
                cnt_ff<=load-1;
             else
                cnt_ff<=cnt_ff-1;  
             end if;
          end if;          
          case conv_integer(cnt_ff) is
               when 0=>seg7(15 downto 0)<="0011111100111111";
               when 1=>seg7(15 downto 0)<="0011111100000110";
               when 2=>seg7(15 downto 0)<="0011111101011011";
               when 3=>seg7(15 downto 0)<="0011111101001111";
               when 4=>seg7(15 downto 0)<="0011111101100110";
               when 5=>seg7(15 downto 0)<="0011111101101101";
               when 6=>seg7(15 downto 0)<="0011111101111101";
               when 7=>seg7(15 downto 0)<="0011111100000111";
               when 8=>seg7(15 downto 0)<="0011111101111111";
               when 9=>seg7(15 downto 0)<="0011111101111011";
               when 10=>seg7(15 downto 0)<="0000011000111111";
               when 11=>seg7(15 downto 0)<="0000011000000110";
               when 12=>seg7(15 downto 0)<="0000011001011011";
               when 13=>seg7(15 downto 0)<="0000011001001111";
               when 14=>seg7(15 downto 0)<="0000011001100110";
               when 15=>seg7(15 downto 0)<="0000011001101101";
               when 16=>seg7(15 downto 0)<="0000011001111101";
               when 17=>seg7(15 downto 0)<="0000011000000111";
               when 18=>seg7(15 downto 0)<="0000011001111111";
               when 19=>seg7(15 downto 0)<="0000011001111011";
               when 20=>seg7(15 downto 0)<="0101101100111111";
               when 21=>seg7(15 downto 0)<="0101101100000110";
               when 22=>seg7(15 downto 0)<="0101101101011011";
               when 23=>seg7(15 downto 0)<="0101101101001111";
               when 24=>seg7(15 downto 0)<="0101101101100110";
               when 25=>seg7(15 downto 0)<="0101101101101101";
               when 26=>seg7(15 downto 0)<="0101101101111101";
               when 27=>seg7(15 downto 0)<="0101101100000111";
               when 28=>seg7(15 downto 0)<="0101101101111111";
               when 29=>seg7(15 downto 0)<="0101101101111011";               
               when others=>seg7(15 downto 0)<="0011111100111111";
          end case;
       end if;
   end process; 

   next_state <= '1' when cnt_ff=1 else
                 '0';

end BEHAVIOR;