📄 flash.lst
字号:
0000001E 4800 LDR R1,=A2h ; A2h
00000020 1889 ADD R1,R2 ; A2h
00000022 7008 STRB R0,[R1,#0x0]
59: }
00000024 A800 ADD R0,R13,#0x0
00000026 6801 LDR R1,[R0,#0x0] ; i
00000028 3101 ADD R1,#0x1
0000002A 6001 STR R1,[R0,#0x0] ; i
0000002C L_14:
0000002C A800 ADD R0,R13,#0x0
0000002E 6800 LDR R0,[R0,#0x0] ; i
00000030 4940 LDR R1,=0x100
00000032 4288 CMP R0,R1
00000034 DBEA BLT L_15 ; T=0x0000000C
62: for(i=0; i<256; i++){
00000036 2100 MOV R1,#0x0
00000038 A800 ADD R0,R13,#0x0
0000003A 6001 STR R1,[R0,#0x0] ; i
0000003C E00F B L_19 ; T=0x0000005E
0000003E L_20:
63: A0h[i] = (flash_read(0xF400+(i*4)));
0000003E A800 ADD R0,R13,#0x0
00000040 6800 LDR R0,[R0,#0x0] ; i
00000042 0080 LSL R0,R0,#0x2
00000044 4800 LDR R1,=0xF400
00000046 1840 ADD R0,R1
00000048 F7FF BL flash_read?T ; T=0x0001 (1)
0000004A FFDA BL flash_read?T ; T=0x0001 (2)
0000004C A900 ADD R1,R13,#0x0
0000004E 680A LDR R2,[R1,#0x0] ; i
00000050 4800 LDR R1,=A0h ; A0h
00000052 1889 ADD R1,R2 ; A0h
00000054 7008 STRB R0,[R1,#0x0]
64: }
00000056 A800 ADD R0,R13,#0x0
00000058 6801 LDR R1,[R0,#0x0] ; i
0000005A 3101 ADD R1,#0x1
0000005C 6001 STR R1,[R0,#0x0] ; i
0000005E L_19:
0000005E A800 ADD R0,R13,#0x0
00000060 6800 LDR R0,[R0,#0x0] ; i
00000062 4940 LDR R1,=0x100
00000064 4288 CMP R0,R1
00000066 DBEA BLT L_20 ; T=0x0000003E
00000068 ; SCOPE-END
65: }
00000068 B001 ADD R13,#0x4
0000006A BC08 POP {R3}
0000006C 4718 BX R3
0000006E ENDP ; 'InitSFF8472?T'
*** CODE SEGMENT '?PR?FlashUpdate?T?flash':
73: void FlashUpdate(BYTE i2c_addr){
00000000 B501 PUSH {R0,LR}
00000002 B081 SUB R13,#0x4
00000004 ; SCOPE-START
80: if(i2c_addr == 0xA0){
00000004 A801 ADD R0,R13,#0x4
00000006 7800 LDRB R0,[R0,#0x0] ; i2c_addr
00000008 28A0 CMP R0,#0xA0
ARM COMPILER V2.32a, flash 08/08/05 09:50:22 PAGE 7
0000000A D11E BNE L_22 ; T=0x0000004A
82: flash_erase(0xF400); // erase page, F400 thru F5FF
0000000C 4800 LDR R0,=0xF400
0000000E F7FF BL flash_erase?T ; T=0x0001 (1)
00000010 FFF7 BL flash_erase?T ; T=0x0001 (2)
83: flash_erase(0xF600); // erase page, F600 thru F7FF
00000012 4800 LDR R0,=0xF600
00000014 F7FF BL flash_erase?T ; T=0x0001 (1)
00000016 FFF4 BL flash_erase?T ; T=0x0001 (2)
84: for(i=0; i<256; i++){
00000018 2100 MOV R1,#0x0
0000001A A800 ADD R0,R13,#0x0
0000001C 6001 STR R1,[R0,#0x0] ; i
0000001E E00F B L_25 ; T=0x00000040
00000020 L_26:
85: flash_write(0xF400+(i*4), A0h[i]);
00000020 A800 ADD R0,R13,#0x0
00000022 6800 LDR R0,[R0,#0x0] ; i
00000024 0080 LSL R0,R0,#0x2
00000026 4800 LDR R1,=0xF400
00000028 1840 ADD R0,R1
0000002A A900 ADD R1,R13,#0x0
0000002C 680A LDR R2,[R1,#0x0] ; i
0000002E 4800 LDR R1,=A0h ; A0h
00000030 1889 ADD R1,R2 ; A0h
00000032 7809 LDRB R1,[R1,#0x0]
00000034 F7FF BL flash_write?T ; T=0x0001 (1)
00000036 FFE4 BL flash_write?T ; T=0x0001 (2)
86: }
00000038 A800 ADD R0,R13,#0x0
0000003A 6801 LDR R1,[R0,#0x0] ; i
0000003C 3101 ADD R1,#0x1
0000003E 6001 STR R1,[R0,#0x0] ; i
00000040 L_25:
00000040 A800 ADD R0,R13,#0x0
00000042 6800 LDR R0,[R0,#0x0] ; i
00000044 4940 LDR R1,=0x100
00000046 4288 CMP R0,R1
00000048 DBEA BLT L_26 ; T=0x00000020
87: }
0000004A L_22:
89: if(i2c_addr == 0xA2){
0000004A A801 ADD R0,R13,#0x4
0000004C 7800 LDRB R0,[R0,#0x0] ; i2c_addr
0000004E 28A2 CMP R0,#0xA2
00000050 D11E BNE L_28 ; T=0x00000090
91: flash_erase(0xF000); // erase page, F000 thru F1FF
00000052 4800 LDR R0,=0xF000
00000054 F7FF BL flash_erase?T ; T=0x0001 (1)
00000056 FFD4 BL flash_erase?T ; T=0x0001 (2)
92: flash_erase(0xF200); // erase page, F200 thru F2FF
00000058 4800 LDR R0,=0xF200
0000005A F7FF BL flash_erase?T ; T=0x0001 (1)
0000005C FFD1 BL flash_erase?T ; T=0x0001 (2)
93: for(i=0; i<256; i++){
0000005E 2100 MOV R1,#0x0
00000060 A800 ADD R0,R13,#0x0
00000062 6001 STR R1,[R0,#0x0] ; i
00000064 E00F B L_31 ; T=0x00000086
00000066 L_32:
94: flash_write(0xF000+(i*4), A2h[i]);
00000066 A800 ADD R0,R13,#0x0
00000068 6800 LDR R0,[R0,#0x0] ; i
0000006A 0080 LSL R0,R0,#0x2
0000006C 4800 LDR R1,=0xF000
0000006E 1840 ADD R0,R1
ARM COMPILER V2.32a, flash 08/08/05 09:50:22 PAGE 8
00000070 A900 ADD R1,R13,#0x0
00000072 680A LDR R2,[R1,#0x0] ; i
00000074 4800 LDR R1,=A2h ; A2h
00000076 1889 ADD R1,R2 ; A2h
00000078 7809 LDRB R1,[R1,#0x0]
0000007A F7FF BL flash_write?T ; T=0x0001 (1)
0000007C FFC1 BL flash_write?T ; T=0x0001 (2)
95: }
0000007E A800 ADD R0,R13,#0x0
00000080 6801 LDR R1,[R0,#0x0] ; i
00000082 3101 ADD R1,#0x1
00000084 6001 STR R1,[R0,#0x0] ; i
00000086 L_31:
00000086 A800 ADD R0,R13,#0x0
00000088 6800 LDR R0,[R0,#0x0] ; i
0000008A 4940 LDR R1,=0x100
0000008C 4288 CMP R0,R1
0000008E DBEA BLT L_32 ; T=0x00000066
96: }
00000090 L_28:
00000090 ; SCOPE-END
100: }
00000090 B001 ADD R13,#0x4
00000092 B001 ADD R13,#0x4
00000094 BC08 POP {R3}
00000096 4718 BX R3
00000098 ENDP ; 'FlashUpdate?T'
*** CODE SEGMENT '?PR?flash_read?T?flash':
108: unsigned char flash_read(unsigned short int addr){
00000000 B401 PUSH {R0}
00000002 B081 SUB R13,#0x4
00000004 ; SCOPE-START
110: WORD cnt = 3000;
00000004 4800 LDR R1,=0xBB8
00000006 A800 ADD R0,R13,#0x0
00000008 6001 STR R1,[R0,#0x0] ; cnt
112: FEEADR = addr; // set address
0000000A A801 ADD R0,R13,#0x4
0000000C 8800 LDRH R0,[R0,#0x0] ; addr
0000000E 1C01 MOV R1,R0
00000010 4800 LDR R0,=0xFFFFF810
00000012 6001 STR R1,[R0,#0x0]
113: FEECON = 0x01; // single read command
00000014 2101 MOV R1,#0x1
00000016 4800 LDR R0,=0xFFFFF808
00000018 6001 STR R1,[R0,#0x0]
116: while((cnt>1) && (!(FEESTA & 0x01))) {cnt--;}
0000001A E003 B L_34 ; T=0x00000024
0000001C L_36:
0000001C A800 ADD R0,R13,#0x0
0000001E 6801 LDR R1,[R0,#0x0] ; cnt
00000020 3901 SUB R1,#0x1
00000022 6001 STR R1,[R0,#0x0] ; cnt
00000024 L_34:
00000024 A800 ADD R0,R13,#0x0
00000026 6800 LDR R0,[R0,#0x0] ; cnt
00000028 2801 CMP R0,#0x1
0000002A D904 BLS L_35 ; T=0x00000036
0000002C 4800 LDR R0,=0xFFFFF800
0000002E 6800 LDR R0,[R0,#0x0]
00000030 2101 MOV R1,#0x1
00000032 4208 TST R0,R1
00000034 D0F2 BEQ L_36 ; T=0x0000001C
00000036 L_35:
118: return (FEEDAT & 0xFF); // return one byte data
00000036 4800 LDR R0,=0xFFFFF80C
ARM COMPILER V2.32a, flash 08/08/05 09:50:22 PAGE 9
00000038 6800 LDR R0,[R0,#0x0]
0000003A 21FF MOV R1,#0xFF
0000003C 4008 AND R0,R1
0000003E ; SCOPE-END
119: }
0000003E B001 ADD R13,#0x4
00000040 B001 ADD R13,#0x4
00000042 4770 BX R14
00000044 ENDP ; 'flash_read?T'
*** CODE SEGMENT '?PR?flash_write?T?flash':
127: void flash_write(unsigned short int addr, unsigned char data){
00000000 B403 PUSH {R0-R1}
00000002 B081 SUB R13,#0x4
00000004 ; SCOPE-START
129: WORD cnt = 3000;
00000004 4800 LDR R1,=0xBB8
00000006 A800 ADD R0,R13,#0x0
00000008 6001 STR R1,[R0,#0x0] ; cnt
131: FEEADR = addr; // set address
0000000A A801 ADD R0,R13,#0x4
0000000C 8800 LDRH R0,[R0,#0x0] ; addr
0000000E 1C01 MOV R1,R0
00000010 4800 LDR R0,=0xFFFFF810
00000012 6001 STR R1,[R0,#0x0]
132: FEEDAT = data; // set data value
00000014 A802 ADD R0,R13,#0x8
00000016 7800 LDRB R0,[R0,#0x0] ; data
00000018 1C01 MOV R1,R0
0000001A 4800 LDR R0,=0xFFFFF80C
0000001C 6001 STR R1,[R0,#0x0]
133: FEECON = 0x02; // write command
0000001E 2102 MOV R1,#0x2
00000020 4800 LDR R0,=0xFFFFF808
00000022 6001 STR R1,[R0,#0x0]
136: while((cnt>1) && (!(FEESTA & 0x01))) {cnt--;}
00000024 E003 B L_40 ; T=0x0000002E
00000026 L_42:
00000026 A800 ADD R0,R13,#0x0
00000028 6801 LDR R1,[R0,#0x0] ; cnt
0000002A 3901 SUB R1,#0x1
0000002C 6001 STR R1,[R0,#0x0] ; cnt
0000002E L_40:
0000002E A800 ADD R0,R13,#0x0
00000030 6800 LDR R0,[R0,#0x0] ; cnt
00000032 2801 CMP R0,#0x1
00000034 D904 BLS L_41 ; T=0x00000040
00000036 4800 LDR R0,=0xFFFFF800
00000038 6800 LDR R0,[R0,#0x0]
0000003A 2101 MOV R1,#0x1
0000003C 4208 TST R0,R1
0000003E D0F2 BEQ L_42 ; T=0x00000026
00000040 L_41:
00000040 ; SCOPE-END
138: }
00000040 B001 ADD R13,#0x4
00000042 B002 ADD R13,#0x8
00000044 4770 BX R14
00000046 ENDP ; 'flash_write?T'
*** CODE SEGMENT '?PR?flash_erase?T?flash':
146: void flash_erase(unsigned short int addr){
00000000 B401 PUSH {R0}
00000002 B081 SUB R13,#0x4
00000004 ; SCOPE-START
148: WORD cnt = 3000;
00000004 4800 LDR R1,=0xBB8
00000006 A800 ADD R0,R13,#0x0
ARM COMPILER V2.32a, flash 08/08/05 09:50:22 PAGE 10
00000008 6001 STR R1,[R0,#0x0] ; cnt
150: FEEADR = addr; // set address
0000000A A801 ADD R0,R13,#0x4
0000000C 8800 LDRH R0,[R0,#0x0] ; addr
0000000E 1C01 MOV R1,R0
00000010 4800 LDR R0,=0xFFFFF810
00000012 6001 STR R1,[R0,#0x0]
151: FEECON = 0x05; // page erase command
00000014 2105 MOV R1,#0x5
00000016 4800 LDR R0,=0xFFFFF808
00000018 6001 STR R1,[R0,#0x0]
154: while((cnt>1) && (!(FEESTA & 0x01))) {cnt--;}
0000001A E003 B L_45 ; T=0x00000024
0000001C L_47:
0000001C A800 ADD R0,R13,#0x0
0000001E 6801 LDR R1,[R0,#0x0] ; cnt
00000020 3901 SUB R1,#0x1
00000022 6001 STR R1,[R0,#0x0] ; cnt
00000024 L_45:
00000024 A800 ADD R0,R13,#0x0
00000026 6800 LDR R0,[R0,#0x0] ; cnt
00000028 2801 CMP R0,#0x1
0000002A D904 BLS L_46 ; T=0x00000036
0000002C 4800 LDR R0,=0xFFFFF800
0000002E 6800 LDR R0,[R0,#0x0]
00000030 2101 MOV R1,#0x1
00000032 4208 TST R0,R1
00000034 D0F2 BEQ L_47 ; T=0x0000001C
00000036 L_46:
00000036 ; SCOPE-END
156: }
00000036 B001 ADD R13,#0x4
00000038 B001 ADD R13,#0x4
0000003A 4770 BX R14
0000003C ENDP ; 'flash_erase?T'
Module Information Static
----------------------------------
code size = ------
data size = ------
const size = ------
End of Module Information.
ARM COMPILATION COMPLETE. 0 WARNING(S), 0 ERROR(S)
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