📄 diag.lst
字号:
0000015E 20EF MOV R0,#0xEF
00000160 4001 AND R1,R0
00000162 4800 LDR R0,=A2h + 0x74 ; A2h+116
00000164 7001 STRB R1,[R0,#0x0] ; A2h+116
102: A2h[112] &= 0xEF; // clear low alarm flag bit4
00000166 4800 LDR R0,=A2h + 0x70 ; A2h+112
00000168 7801 LDRB R1,[R0,#0x0] ; A2h+112
0000016A 20EF MOV R0,#0xEF
0000016C 4001 AND R1,R0
0000016E 4800 LDR R0,=A2h + 0x70 ; A2h+112
00000170 7001 STRB R1,[R0,#0x0] ; A2h+112
103: break;
00000172 E061 B L_23 ; T=0x00000238
104: case 4:
00000174 L_27:
105: A2h[112] &= 0xDF; // clear high alarm flag bit5
00000174 4800 LDR R0,=A2h + 0x70 ; A2h+112
00000176 7801 LDRB R1,[R0,#0x0] ; A2h+112
00000178 20DF MOV R0,#0xDF
0000017A 4001 AND R1,R0
0000017C 4800 LDR R0,=A2h + 0x70 ; A2h+112
0000017E 7001 STRB R1,[R0,#0x0] ; A2h+112
106: A2h[116] |= 0x20; // set high warning flag bit5
00000180 4800 LDR R0,=A2h + 0x74 ; A2h+116
00000182 7801 LDRB R1,[R0,#0x0] ; A2h+116
00000184 2020 MOV R0,#0x20
00000186 4301 ORR R1,R0
00000188 4800 LDR R0,=A2h + 0x74 ; A2h+116
0000018A 7001 STRB R1,[R0,#0x0] ; A2h+116
107: A2h[116] &= 0xEF; // clear low warning flag bit4
0000018C 4800 LDR R0,=A2h + 0x74 ; A2h+116
0000018E 7801 LDRB R1,[R0,#0x0] ; A2h+116
00000190 20EF MOV R0,#0xEF
00000192 4001 AND R1,R0
00000194 4800 LDR R0,=A2h + 0x74 ; A2h+116
00000196 7001 STRB R1,[R0,#0x0] ; A2h+116
108: A2h[112] &= 0xEF; // clear low alarm flag bit4
00000198 4800 LDR R0,=A2h + 0x70 ; A2h+112
0000019A 7801 LDRB R1,[R0,#0x0] ; A2h+112
0000019C 20EF MOV R0,#0xEF
0000019E 4001 AND R1,R0
000001A0 4800 LDR R0,=A2h + 0x70 ; A2h+112
000001A2 7001 STRB R1,[R0,#0x0] ; A2h+112
109: break;
000001A4 E048 B L_23 ; T=0x00000238
110: case 3:
000001A6 L_26:
111: A2h[112] &= 0xDF; // clear high alarm flag bit5
000001A6 4800 LDR R0,=A2h + 0x70 ; A2h+112
000001A8 7801 LDRB R1,[R0,#0x0] ; A2h+112
000001AA 20DF MOV R0,#0xDF
ARM COMPILER V2.32a, diag 08/08/05 09:50:22 PAGE 17
000001AC 4001 AND R1,R0
000001AE 4800 LDR R0,=A2h + 0x70 ; A2h+112
000001B0 7001 STRB R1,[R0,#0x0] ; A2h+112
112: A2h[116] &= 0xDF; // clear high warning flag bit5
000001B2 4800 LDR R0,=A2h + 0x74 ; A2h+116
000001B4 7801 LDRB R1,[R0,#0x0] ; A2h+116
000001B6 20DF MOV R0,#0xDF
000001B8 4001 AND R1,R0
000001BA 4800 LDR R0,=A2h + 0x74 ; A2h+116
000001BC 7001 STRB R1,[R0,#0x0] ; A2h+116
113: A2h[116] &= 0xEF; // clear low warning flag bit4
000001BE 4800 LDR R0,=A2h + 0x74 ; A2h+116
000001C0 7801 LDRB R1,[R0,#0x0] ; A2h+116
000001C2 20EF MOV R0,#0xEF
000001C4 4001 AND R1,R0
000001C6 4800 LDR R0,=A2h + 0x74 ; A2h+116
000001C8 7001 STRB R1,[R0,#0x0] ; A2h+116
114: A2h[112] &= 0xEF; // clear low alarm flag bit4
000001CA 4800 LDR R0,=A2h + 0x70 ; A2h+112
000001CC 7801 LDRB R1,[R0,#0x0] ; A2h+112
000001CE 20EF MOV R0,#0xEF
000001D0 4001 AND R1,R0
000001D2 4800 LDR R0,=A2h + 0x70 ; A2h+112
000001D4 7001 STRB R1,[R0,#0x0] ; A2h+112
115: break;
000001D6 E02F B L_23 ; T=0x00000238
116: case 2:
000001D8 L_25:
117: A2h[112] &= 0xDF; // clear high alarm flag bit5
000001D8 4800 LDR R0,=A2h + 0x70 ; A2h+112
000001DA 7801 LDRB R1,[R0,#0x0] ; A2h+112
000001DC 20DF MOV R0,#0xDF
000001DE 4001 AND R1,R0
000001E0 4800 LDR R0,=A2h + 0x70 ; A2h+112
000001E2 7001 STRB R1,[R0,#0x0] ; A2h+112
118: A2h[116] &= 0xDF; // clear high warning flag bit5
000001E4 4800 LDR R0,=A2h + 0x74 ; A2h+116
000001E6 7801 LDRB R1,[R0,#0x0] ; A2h+116
000001E8 20DF MOV R0,#0xDF
000001EA 4001 AND R1,R0
000001EC 4800 LDR R0,=A2h + 0x74 ; A2h+116
000001EE 7001 STRB R1,[R0,#0x0] ; A2h+116
119: A2h[116] |= 0x10; // set low warning flag bit4
000001F0 4800 LDR R0,=A2h + 0x74 ; A2h+116
000001F2 7801 LDRB R1,[R0,#0x0] ; A2h+116
000001F4 2010 MOV R0,#0x10
000001F6 4301 ORR R1,R0
000001F8 4800 LDR R0,=A2h + 0x74 ; A2h+116
000001FA 7001 STRB R1,[R0,#0x0] ; A2h+116
120: A2h[112] &= 0xEF; // clear low alarm flag bit4
000001FC 4800 LDR R0,=A2h + 0x70 ; A2h+112
000001FE 7801 LDRB R1,[R0,#0x0] ; A2h+112
00000200 20EF MOV R0,#0xEF
00000202 4001 AND R1,R0
00000204 4800 LDR R0,=A2h + 0x70 ; A2h+112
00000206 7001 STRB R1,[R0,#0x0] ; A2h+112
121: break;
00000208 E016 B L_23 ; T=0x00000238
122: case 1:
0000020A L_24:
123: A2h[112] &= 0xDF; // clear high alarm flag bit5
0000020A 4800 LDR R0,=A2h + 0x70 ; A2h+112
0000020C 7801 LDRB R1,[R0,#0x0] ; A2h+112
0000020E 20DF MOV R0,#0xDF
00000210 4001 AND R1,R0
00000212 4800 LDR R0,=A2h + 0x70 ; A2h+112
ARM COMPILER V2.32a, diag 08/08/05 09:50:22 PAGE 18
00000214 7001 STRB R1,[R0,#0x0] ; A2h+112
124: A2h[116] &= 0xDF; // clear high warning flag bit5
00000216 4800 LDR R0,=A2h + 0x74 ; A2h+116
00000218 7801 LDRB R1,[R0,#0x0] ; A2h+116
0000021A 20DF MOV R0,#0xDF
0000021C 4001 AND R1,R0
0000021E 4800 LDR R0,=A2h + 0x74 ; A2h+116
00000220 7001 STRB R1,[R0,#0x0] ; A2h+116
125: A2h[116] |= 0x10; // set low warning flag bit4
00000222 4800 LDR R0,=A2h + 0x74 ; A2h+116
00000224 7801 LDRB R1,[R0,#0x0] ; A2h+116
00000226 2010 MOV R0,#0x10
00000228 4301 ORR R1,R0
0000022A 4800 LDR R0,=A2h + 0x74 ; A2h+116
0000022C 7001 STRB R1,[R0,#0x0] ; A2h+116
126: A2h[112] |= 0x10; // set low alarm flag bit4
0000022E 4800 LDR R0,=A2h + 0x70 ; A2h+112
00000230 7801 LDRB R1,[R0,#0x0] ; A2h+112
00000232 2010 MOV R0,#0x10
00000234 4301 ORR R1,R0
00000236 4800 LDR R0,=A2h + 0x70 ; A2h+112
00000238 7001 STRB R1,[R0,#0x0] ; A2h+112
128: }
0000023A L_23:
0000023A ; SCOPE-END
129: }
0000023A B006 ADD R13,#0x18
0000023C B003 ADD R13,#0xC
0000023E 4770 BX R14
00000240 ENDP ; 'voltage_diag?T'
*** CODE SEGMENT '?PR?tx_bias_diag?T?diag':
136: void tx_bias_diag(BYTE msb, BYTE lsb, BYTE addr){
00000000 B407 PUSH {R0-R2}
00000002 B086 SUB R13,#0x18
00000004 ; SCOPE-START
139: HALFWORD monitor = (msb<<8) + lsb;
00000004 A806 ADD R0,R13,#0x18
00000006 7800 LDRB R0,[R0,#0x0] ; msb
00000008 1C01 MOV R1,R0
0000000A 0209 LSL R1,R1,#0x8
0000000C A807 ADD R0,R13,#0x1C
0000000E 7800 LDRB R0,[R0,#0x0] ; lsb
00000010 1809 ADD R1,R0
00000012 A801 ADD R0,R13,#0x4
00000014 8001 STRH R1,[R0,#0x0] ; monitor
140: HALFWORD high_alarm = (A2h[addr ]<<8) + A2h[addr+1];
00000016 A808 ADD R0,R13,#0x20
00000018 7800 LDRB R0,[R0,#0x0] ; addr
0000001A 1C01 MOV R1,R0
0000001C 4800 LDR R0,=A2h ; A2h
0000001E 1840 ADD R0,R1 ; A2h
00000020 7800 LDRB R0,[R0,#0x0]
00000022 1C01 MOV R1,R0
00000024 0209 LSL R1,R1,#0x8
00000026 A808 ADD R0,R13,#0x20
00000028 7800 LDRB R0,[R0,#0x0] ; addr
0000002A 1C02 MOV R2,R0
0000002C 4800 LDR R0,=A2h + 0x1 ; A2h+1
0000002E 1880 ADD R0,R2 ; A2h+1
00000030 7800 LDRB R0,[R0,#0x0]
00000032 1809 ADD R1,R0
00000034 A802 ADD R0,R13,#0x8
00000036 8001 STRH R1,[R0,#0x0] ; high_alarm
141: HALFWORD low_alarm = (A2h[addr+2]<<8) + A2h[addr+3];
00000038 A808 ADD R0,R13,#0x20
0000003A 7800 LDRB R0,[R0,#0x0] ; addr
ARM COMPILER V2.32a, diag 08/08/05 09:50:22 PAGE 19
0000003C 1C01 MOV R1,R0
0000003E 4800 LDR R0,=A2h + 0x2 ; A2h+2
00000040 1840 ADD R0,R1 ; A2h+2
00000042 7800 LDRB R0,[R0,#0x0]
00000044 1C01 MOV R1,R0
00000046 0209 LSL R1,R1,#0x8
00000048 A808 ADD R0,R13,#0x20
0000004A 7800 LDRB R0,[R0,#0x0] ; addr
0000004C 1C02 MOV R2,R0
0000004E 4800 LDR R0,=A2h + 0x3 ; A2h+3
00000050 1880 ADD R0,R2 ; A2h+3
00000052 7800 LDRB R0,[R0,#0x0]
00000054 1809 ADD R1,R0
00000056 A803 ADD R0,R13,#0xC
00000058 8001 STRH R1,[R0,#0x0] ; low_alarm
142: HALFWORD high_warning = (A2h[addr+4]<<8) + A2h[addr+5];
0000005A A808 ADD R0,R13,#0x20
0000005C 7800 LDRB R0,[R0,#0x0] ; addr
0000005E 1C01 MOV R1,R0
00000060 4800 LDR R0,=A2h + 0x4 ; A2h+4
00000062 1840 ADD R0,R1 ; A2h+4
00000064 7800 LDRB R0,[R0,#0x0]
00000066 1C01 MOV R1,R0
00000068 0209 LSL R1,R1,#0x8
0000006A A808 ADD R0,R13,#0x20
0000006C 7800 LDRB R0,[R0,#0x0] ; addr
0000006E 1C02 MOV R2,R0
00000070 4800 LDR R0,=A2h + 0x5 ; A2h+5
00000072 1880 ADD R0,R2 ; A2h+5
00000074 7800 LDRB R0,[R0,#0x0]
00000076 1809 ADD R1,R0
00000078 A804 ADD R0,R13,#0x10
0000007A 8001 STRH R1,[R0,#0x0] ; high_warning
143: HALFWORD low_warning = (A2h[addr+6]<<8) + A2h[addr+7];
0000007C A808 ADD R0,R13,#0x20
0000007E 7800 LDRB R0,[R0,#0x0] ; addr
00000080 1C01 MOV R1,R0
00000082 4800 LDR R0,=A2h + 0x6 ; A2h+6
00000084 1840 ADD R0,R1 ; A2h+6
00000086 7800 LDRB R0,[R0,#0x0]
00000088 1C01 MOV R1,R0
0000008A 0209 LSL R1,R1,#0x8
0000008C A808 ADD R0,R13,#0x20
0000008E 7800 LDRB R0,[R0,#0x0] ; addr
00000090 1C02 MOV R2,R0
00000092 4800 LDR R0,=A2h + 0x7 ; A2h+7
00000094 1880 ADD R0,R2 ; A2h+7
00000096 7800 LDRB R0,[R0,#0x0]
00000098 1809 ADD R1,R0
0000009A A805 ADD R0,R13,#0x14
0000009C 8001 STRH R1,[R0,#0x0] ; low_warning
145: if (monitor>high_alarm) result=5;
0000009E A802 ADD R0,R13,#0x8
000000A0 8800 LDRH R0,[R0,#0x0] ; high_alarm
000000A2 1C01 MOV R1,R0
000000A4 A801 ADD R0,R13,#0x4
000000A6 8800 LDRH R0,[R0,#⌨️ 快捷键说明
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