📄 config.bak
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// cpu_config.c
/********************************************************************/
/* */
/* CPU Configurations */
/* */
/********************************************************************/
#include <ADuC7020.h>
#include "common.h"
void InitCPU()
{
// GPIO Port0 configuration
#if DEBUG == 0 // target is sfp board
GP0CON = 0x00000000; // P0.4(ExtIRQ0 - Tx FAIL)
// P0.5(ExtIRQ1 - Tx ALS)
// P0.6(LOS_INV)
#endif
#if DEBUG == 1 // target is aduc eval board
GP0CON = 0x10000000; // configure P0.7 as clock outputECLK)
#endif
GP0DAT = 0x40000000; // configure P0.6 as an output, set data LOW
// GPIO Port1 configuration
GP1CON = 0x00000022; // P1.0(SCL)
// P1.1(SDA)
// P1.2(GPIO - free)
// P1.3(GPIO - free)
// P1.4(GPIO - Rx LOS)
// P1.5(GPIO - RateSel)
// P1.6(GPIO - free)
// P1.7(GPIO - free)
#if DEBUG == 1
GP1DAT = 0x80000000; // configure P1.7 as an output
#endif
// GPIO Port2 configuration
GP2CON = 0x00000000; // P2.0(GPIO for SQUELCH)
GP2DAT = 0x01010000; // outputs high to enable SQUELCH(P2.0)
GP2CLR = 0x00010000; // outputs low to disable SQUELCH(P2.0)
// GPIO Port4 configuration (for test porpose)
#if DEBUG == 1
GP4DAT = 0x04000000; // configure P4.2 as an output
#endif
// I2C configuration
I2C0ID0 = 0xA0; // primary I2C address A0h
I2C0ID1 = 0xA2; // secondary I2C address A2h
I2C0CFG = 0x4201; // enable I2C slave, Stop IRQ, disable TX FIFO requst IRQ
// IRQ output configuration PLAIRQ = 0x1700; // for stop detect using p1.0/p1.1
// Bandgap Reference configuration
REFCON = 0x01; // use internal 2.5V reference
// ADC configuration
ADCCON = 0x20; // powerup ADC
// DAC configuration
DAC0CON = 0x12; // 0 to VREF DAC0 output range
DAC0DAT = 0x00000000; // DAC0 to 0V
DAC1CON = 0x12; // 0 to VREF DAC1 output range
DAC1DAT = 0x00000000; // DAC1 to 0V
// IRQ, FIQ setup (for GNU-GCC)
//IRQ = IRQ_Function; // specify Interrupt Service Rountine
//FIQ = FIQ_Function; // specify Interrupt Service Rountine
/* Use Timer2 when final silicon available
//Timer2 configuration
T2LD = 0x2000; // 1 / 32.768kHz * 8191 = 250ms
T2CON = 0xC0; // count down
// periodic mode
// binary format
// prescale:1, source clock/1
// source clock: internal 32.768KHz Oscillator
*/
// Timer1 configuration
T1LD = 0x40; // 42000000/32768/20 (for overflow every 20Hz)
T1CON = 0xCF; // count down
// periodic mode
// binary format
// prescale:32768
// source clock: core clock
}
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