📄 monitor.lst
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ARM COMPILER V2.32a, monitor 08/08/05 09:50:21 PAGE 18
0000011C 4800 LDR R0,=A2h + 0x96 ; A2h+150
0000011E 7001 STRB R1,[R0,#0x0] ; A2h+150
226: TXMOD_RAWDAT_LSB = (dat & 0x00FF);
00000120 A805 ADD R0,R13,#0x14
00000122 8800 LDRH R0,[R0,#0x0] ; dat
00000124 1C01 MOV R1,R0
00000126 20FF MOV R0,#0xFF
00000128 4001 AND R1,R0
0000012A 4800 LDR R0,=A2h + 0x97 ; A2h+151
0000012C 7001 STRB R1,[R0,#0x0] ; A2h+151
0000012E ; SCOPE-END
228: }
0000012E B006 ADD R13,#0x18
00000130 BC08 POP {R3}
00000132 4718 BX R3
00000134 ENDP ; 'tx_mod_monitor?T'
*** CODE SEGMENT '?PR?tx_pow_monitor?T?monitor':
235: void tx_pow_monitor(void)
00000000 B500 PUSH {LR}
00000002 B086 SUB R13,#0x18
236: {
00000004 ; SCOPE-START
243: HALFWORD dat=0;
00000004 2100 MOV R1,#0x0
00000006 A805 ADD R0,R13,#0x14
00000008 8001 STRH R1,[R0,#0x0] ; dat
246: ADCCP = 0x0F; // ADC15 bufferred input
0000000A 210F MOV R1,#0xF
0000000C 4800 LDR R0,=0xFFFF0504
0000000E 6001 STR R1,[R0,#0x0]
251: for(cnt=0; cnt<4; cnt++){
00000010 2100 MOV R1,#0x0
00000012 A804 ADD R0,R13,#0x10
00000014 7001 STRB R1,[R0,#0x0] ; cnt
00000016 E014 B L_58 ; T=0x00000042
00000018 L_59:
252: ADCCON=0xA3; // software start, single-end input
00000018 21A3 MOV R1,#0xA3
0000001A 4800 LDR R0,=0xFFFF0500
0000001C 6001 STR R1,[R0,#0x0]
253: while(!ADCSTA){} // wait for end of conversion
0000001E L_61:
0000001E 4800 LDR R0,=0xFFFF050C
00000020 6800 LDR R0,[R0,#0x0]
00000022 2800 CMP R0,#0x0
00000024 D0FB BEQ L_61 ; T=0x0000001E
254: i[cnt]=(ADCDAT>>16);
00000026 4800 LDR R0,=0xFFFF0510
00000028 6801 LDR R1,[R0,#0x0]
0000002A 0C09 LSR R1,R1,#0x10
0000002C A804 ADD R0,R13,#0x10
0000002E 7800 LDRB R0,[R0,#0x0] ; cnt
00000030 1C02 MOV R2,R0
00000032 0052 LSL R2,R2,#0x1
00000034 A802 ADD R0,R13,#0x8
00000036 1880 ADD R0,R2 ; i
00000038 8001 STRH R1,[R0,#0x0]
255: }
0000003A A804 ADD R0,R13,#0x10
0000003C 7801 LDRB R1,[R0,#0x0] ; cnt
0000003E 3101 ADD R1,#0x1
00000040 7001 STRB R1,[R0,#0x0] ; cnt
00000042 L_58:
00000042 A804 ADD R0,R13,#0x10
00000044 7800 LDRB R0,[R0,#0x0] ; cnt
00000046 2804 CMP R0,#0x4
ARM COMPILER V2.32a, monitor 08/08/05 09:50:21 PAGE 19
00000048 DBE6 BLT L_59 ; T=0x00000018
258: buf[p_buf] = i[3];
0000004A 200E MOV R0,#0xE
0000004C 4468 ADD R0,R13
0000004E 8801 LDRH R1,[R0,#0x0] ; i+6
00000050 4800 LDR R0,=p_buf ; p_buf
00000052 7800 LDRB R0,[R0,#0x0] ; p_buf
00000054 1C02 MOV R2,R0
00000056 0052 LSL R2,R2,#0x1
00000058 4800 LDR R0,=buf ; buf
0000005A 1880 ADD R0,R2 ; buf
0000005C 8001 STRH R1,[R0,#0x0]
259: p_buf++;
0000005E 4800 LDR R0,=p_buf ; p_buf
00000060 7801 LDRB R1,[R0,#0x0] ; p_buf
00000062 3101 ADD R1,#0x1
00000064 7001 STRB R1,[R0,#0x0] ; p_buf
260: p_buf &= 0x07; // reset ring-buffer pointer
00000066 4800 LDR R0,=p_buf ; p_buf
00000068 7801 LDRB R1,[R0,#0x0] ; p_buf
0000006A 2007 MOV R0,#0x7
0000006C 4001 AND R1,R0
0000006E 4800 LDR R0,=p_buf ; p_buf
00000070 7001 STRB R1,[R0,#0x0] ; p_buf
261: for(cnt=0; cnt<8; cnt++){
00000072 2100 MOV R1,#0x0
00000074 A804 ADD R0,R13,#0x10
00000076 7001 STRB R1,[R0,#0x0] ; cnt
00000078 E00F B L_67 ; T=0x0000009A
0000007A L_68:
262: dat += buf[cnt];
0000007A A804 ADD R0,R13,#0x10
0000007C 7800 LDRB R0,[R0,#0x0] ; cnt
0000007E 1C01 MOV R1,R0
00000080 0049 LSL R1,R1,#0x1
00000082 4800 LDR R0,=buf ; buf
00000084 1840 ADD R0,R1 ; buf
00000086 8800 LDRH R0,[R0,#0x0]
00000088 A905 ADD R1,R13,#0x14
0000008A 8809 LDRH R1,[R1,#0x0] ; dat
0000008C 1809 ADD R1,R0
0000008E A805 ADD R0,R13,#0x14
00000090 8001 STRH R1,[R0,#0x0] ; dat
263: }
00000092 A804 ADD R0,R13,#0x10
00000094 7801 LDRB R1,[R0,#0x0] ; cnt
00000096 3101 ADD R1,#0x1
00000098 7001 STRB R1,[R0,#0x0] ; cnt
0000009A L_67:
0000009A A804 ADD R0,R13,#0x10
0000009C 7800 LDRB R0,[R0,#0x0] ; cnt
0000009E 2808 CMP R0,#0x8
000000A0 DBEB BLT L_68 ; T=0x0000007A
264: dat = dat>>3; // delta/8;
000000A2 A805 ADD R0,R13,#0x14
000000A4 8800 LDRH R0,[R0,#0x0] ; dat
000000A6 1C01 MOV R1,R0
000000A8 08C9 LSR R1,R1,#0x3
000000AA A805 ADD R0,R13,#0x14
000000AC 8001 STRH R1,[R0,#0x0] ; dat
270: pow = (((A2h[122]<<8) + A2h[123]) * 0.1e-6 ) * (dat * 610e-6 / 1000) / (((A2h[124]<<8) + A2h[125]) * 0.1e-6);
000000AE A805 ADD R0,R13,#0x14
000000B0 8800 LDRH R0,[R0,#0x0] ; dat
000000B2 F7FF BL ?C?FCASTU?T ; T=0x0001 (1) ; ?C?FCASTU?T
000000B4 FFA5 BL ?C?FCASTU?T ; T=0x0001 (2) ; ?C?FCASTU?T
000000B6 4800 LDR R1,=0x3A1FE868
ARM COMPILER V2.32a, monitor 08/08/05 09:50:21 PAGE 20
000000B8 F7FF BL ?C?FPMUL?T ; T=0x0001 (1) ; ?C?FPMUL?T
000000BA FFA2 BL ?C?FPMUL?T ; T=0x0001 (2) ; ?C?FPMUL?T
000000BC 4800 LDR R1,=0x447A0000
000000BE F7FF BL ?C?FPDIV?T ; T=0x0001 (1) ; ?C?FPDIV?T
000000C0 FF9F BL ?C?FPDIV?T ; T=0x0001 (2) ; ?C?FPDIV?T
000000C2 1C02 MOV R2,R0
000000C4 4800 LDR R0,=A2h + 0x7A ; A2h+122
000000C6 7800 LDRB R0,[R0,#0x0] ; A2h+122
000000C8 0200 LSL R0,R0,#0x8
000000CA 4800 LDR R1,=A2h + 0x7B ; A2h+123
000000CC 7809 LDRB R1,[R1,#0x0] ; A2h+123
000000CE 1840 ADD R0,R1
000000D0 F7FF BL ?C?FCASTU?T ; T=0x0001 (1) ; ?C?FCASTU?T
000000D2 FF96 BL ?C?FCASTU?T ; T=0x0001 (2) ; ?C?FCASTU?T
000000D4 4800 LDR R1,=0x33D6BF95
000000D6 F7FF BL ?C?FPMUL?T ; T=0x0001 (1) ; ?C?FPMUL?T
000000D8 FF93 BL ?C?FPMUL?T ; T=0x0001 (2) ; ?C?FPMUL?T
000000DA 1C11 MOV R1,R2
000000DC F7FF BL ?C?FPMUL?T ; T=0x0001 (1) ; ?C?FPMUL?T
000000DE FF90 BL ?C?FPMUL?T ; T=0x0001 (2) ; ?C?FPMUL?T
000000E0 1C02 MOV R2,R0
000000E2 4800 LDR R0,=A2h + 0x7C ; A2h+124
000000E4 7800 LDRB R0,[R0,#0x0] ; A2h+124
000000E6 0200 LSL R0,R0,#0x8
000000E8 4800 LDR R1,=A2h + 0x7D ; A2h+125
000000EA 7809 LDRB R1,[R1,#0x0] ; A2h+125
000000EC 1840 ADD R0,R1
000000EE F7FF BL ?C?FCASTU?T ; T=0x0001 (1) ; ?C?FCASTU?T
000000F0 FF87 BL ?C?FCASTU?T ; T=0x0001 (2) ; ?C?FCASTU?T
000000F2 4800 LDR R1,=0x33D6BF95
000000F4 F7FF BL ?C?FPMUL?T ; T=0x0001 (1) ; ?C?FPMUL?T
000000F6 FF84 BL ?C?FPMUL?T ; T=0x0001 (2) ; ?C?FPMUL?T
000000F8 1C01 MOV R1,R0
000000FA 1C10 MOV R0,R2
000000FC F7FF BL ?C?FPDIV?T ; T=0x0001 (1) ; ?C?FPDIV?T
000000FE FF80 BL ?C?FPDIV?T ; T=0x0001 (2) ; ?C?FPDIV?T
00000100 A900 ADD R1,R13,#0x0
00000102 6008 STR R0,[R1,#0x0] ; pow
273: pow /= 0.1e-6;
00000104 A800 ADD R0,R13,#0x0
00000106 6800 LDR R0,[R0,#0x0] ; pow
00000108 4800 LDR R1,=0x33D6BF95
0000010A F7FF BL ?C?FPDIV?T ; T=0x0001 (1) ; ?C?FPDIV?T
0000010C FF79 BL ?C?FPDIV?T ; T=0x0001 (2) ; ?C?FPDIV?T
0000010E A900 ADD R1,R13,#0x0
00000110 6008 STR R0,[R1,#0x0] ; pow
274: pow_res = (HALFWORD)pow;
00000112 A800 ADD R0,R13,#0x0
00000114 6800 LDR R0,[R0,#0x0] ; pow
00000116 F7FF BL ?C?CASTF?T ; T=0x0001 (1) ; ?C?CASTF?T
00000118 FF73 BL ?C?CASTF?T ; T=0x0001 (2) ; ?C?CASTF?T
0000011A A901 ADD R1,R13,#0x4
0000011C 8008 STRH R0,[R1,#0x0] ; pow_res
277: A2h[102] = (BYTE)(pow_res>>8); // write high-byte
0000011E A801 ADD R0,R13,#0x4
00000120 8800 LDRH R0,[R0,#0x0] ; pow_res
00000122 1C01 MOV R1,R0
00000124 0A09 LSR R1,R1,#0x8
00000126 4800 LDR R0,=A2h + 0x66 ; A2h+102
00000128 7001 STRB R1,[R0,#0x0] ; A2h+102
278: A2h[103] = (BYTE)(pow_res & 0x00F0); // write low-byte, fix low-order 4-bit at zero
0000012A A801 ADD R0,R13,#0x4
0000012C 8800 LDRH R0,[R0,#0x0] ; pow_res
0000012E 1C01 MOV R1,R0
00000130 20F0 MOV R0,#0xF0
00000132 4001 AND R1,R0
ARM COMPILER V2.32a, monitor 08/08/05 09:50:21 PAGE 21
00000134 4800 LDR R0,=A2h + 0x67 ; A2h+103
00000136 7001 STRB R1,[R0,#0x0] ; A2h+103
00000138 ; SCOPE-END
279: }
00000138 B006 ADD R13,#0x18
0000013A BC08 POP {R3}
0000013C 4718 BX R3
0000013E ENDP ; 'tx_pow_monitor?T'
*** CODE SEGMENT '?PR?rx_pow_monitor?T?monitor':
286: void rx_pow_monitor(void)
00000000 B500 PUSH {LR}
00000002 B086 SUB R13,#0x18
287: {
00000004 ; SCOPE-START
294: HALFWORD dat=0;
00000004 2100 MOV R1,#0x0
00000006 A805 ADD R0,R13,#0x14
00000008 8001 STRH R1,[R0,#0x0] ; dat
297: ADCCP = 0x04; // select ADC4 input channel
0000000A 2104 MOV R1,#0x4
0000000C 4800 LDR R0,=0xFFFF0504
0000000E 6001 STR R1,[R0,#0x0]
300: for(cnt=0; cnt<4; cnt++){
00000010 2100 MOV R1,#0x0
00000012 A804 ADD R0,R13,#0x10
00000014 7001 STRB R1,[R0,#0x0] ; cnt
00000016 E014 B L_72 ; T=0x00000042
00000018 L_73:
301: ADCCON=0xA3; // software start, single-end input
00000018 21A3 MOV R1,#0xA3
0000001A 4800 LDR R0,=0xFFFF0500
0000001C 6001 STR R1,[R0,#0x0]
302: while(!ADCSTA){} // wait for end of conversion
0000001E L_75:
0000001E 4800 LDR R0,=0xFFFF050C
00000020 6800 LDR R0,[R0,#0x0]
00000022 2800 CMP R0,#0x0
00000024 D0FB BEQ L_75 ; T=0x0000001E
303: i[cnt]=(ADCDAT>>16);
00000026 4800 LDR R0,=0xFFFF0510
00000028 6801 LDR R1,[R0,#0x0]
0000002A 0C09 LSR R1,R1,#0x10
0000002C A804 ADD R0,R13,#0x10
0000002E 7800 LDRB R0,[R0,#0x0] ; cnt
00000030 1C02 MOV R2,R0
00000032 0052 LSL R2,R2,#0x1
00000034 A802 ADD R0,R13,#0x8
00000036 1880 ADD R0,R2 ; i
00000038 8001 STRH R1,[R0,#0x0]
304: }
0000003A A804 ADD R0,R13,#0x10
0000003C 7801 LDRB R1,[R0,#0x0] ; cnt
0000003E 3101 ADD R1,#0x1
00000040 7001 STRB R1,[R0,#0x0] ; cnt
00000042 L_72:
00000042 A804 ADD R0,R13,#0x10
00000044 7800 LDRB R0,[R0,#0x0] ; cnt
00000046 2804 CMP R0,#0x4
00000048 DBE6 BLT L_73 ; T=0x00000018
307: if(i[3] > ADC_HIGH_MAX) i[3] = 0; // limits a highest
0000004A 200E MOV R0,#0xE
0000004C 4468 ADD R0,R13
0000004E 8800 LDRH R0,[R0,#0x0] ; i+6
00000050 4800 LDR R1,=0xFF5
00000052 4288 CMP R0,R1
00000054 D903 BLS L_79 ; T=0x0000005E
ARM COMPILER V2.32a, monitor 08/08/05 09:50:21 PAGE 22
00000056 2100 MOV ⌨️ 快捷键说明
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