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📄 monitor.lst

📁 ADI公司的关于光通讯模块的监控程序,在KEIL FOR ARM 的编译环境编译.程序大小约12K,芯片是ADu7020.
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 00000078  7001      STRB        R1,[R0,#0x0] ; p_buf
  157:     p_buf &= 0x07;                      // reset ring-buffer pointer
 0000007A  4800      LDR         R0,=p_buf ; p_buf
 0000007C  7801      LDRB        R1,[R0,#0x0] ; p_buf
 0000007E  2007      MOV         R0,#0x7
ARM COMPILER V2.32a,  monitor                                                              08/08/05  09:50:21  PAGE 14  

 00000080  4001      AND         R1,R0
 00000082  4800      LDR         R0,=p_buf ; p_buf
 00000084  7001      STRB        R1,[R0,#0x0] ; p_buf
  158:     for(cnt=0; cnt<8; cnt++){
 00000086  2100      MOV         R1,#0x0
 00000088  A804      ADD         R0,R13,#0x10
 0000008A  7001      STRB        R1,[R0,#0x0] ; cnt
 0000008C  E00F      B           L_38  ; T=0x000000AE
 0000008E          L_39:
  159:         dat += buf[cnt];
 0000008E  A804      ADD         R0,R13,#0x10
 00000090  7800      LDRB        R0,[R0,#0x0] ; cnt
 00000092  1C01      MOV         R1,R0
 00000094  0049      LSL         R1,R1,#0x1
 00000096  4800      LDR         R0,=buf ; buf
 00000098  1840      ADD         R0,R1 ; buf
 0000009A  8800      LDRH        R0,[R0,#0x0]
 0000009C  A905      ADD         R1,R13,#0x14
 0000009E  8809      LDRH        R1,[R1,#0x0] ; dat
 000000A0  1809      ADD         R1,R0
 000000A2  A805      ADD         R0,R13,#0x14
 000000A4  8001      STRH        R1,[R0,#0x0] ; dat
  160:     }
 000000A6  A804      ADD         R0,R13,#0x10
 000000A8  7801      LDRB        R1,[R0,#0x0] ; cnt
 000000AA  3101      ADD         R1,#0x1
 000000AC  7001      STRB        R1,[R0,#0x0] ; cnt
 000000AE          L_38:
 000000AE  A804      ADD         R0,R13,#0x10
 000000B0  7800      LDRB        R0,[R0,#0x0] ; cnt
 000000B2  2808      CMP         R0,#0x8
 000000B4  DBEB      BLT         L_39  ; T=0x0000008E
  161:     dat = dat>>3;                       // delta/8;
 000000B6  A805      ADD         R0,R13,#0x14
 000000B8  8800      LDRH        R0,[R0,#0x0] ; dat
 000000BA  1C01      MOV         R1,R0
 000000BC  08C9      LSR         R1,R1,#0x3
 000000BE  A805      ADD         R0,R13,#0x14
 000000C0  8001      STRH        R1,[R0,#0x0] ; dat
  165:     bias = (dat * 610e-6 / 1e3) * 100;
 000000C2  A805      ADD         R0,R13,#0x14
 000000C4  8800      LDRH        R0,[R0,#0x0] ; dat
 000000C6  F7FF      BL          ?C?FCASTU?T  ; T=0x0001  (1) ; ?C?FCASTU?T
 000000C8  FF9B      BL          ?C?FCASTU?T  ; T=0x0001  (2) ; ?C?FCASTU?T
 000000CA  4800      LDR         R1,=0x3A1FE868
 000000CC  F7FF      BL          ?C?FPMUL?T  ; T=0x0001  (1) ; ?C?FPMUL?T
 000000CE  FF98      BL          ?C?FPMUL?T  ; T=0x0001  (2) ; ?C?FPMUL?T
 000000D0  4800      LDR         R1,=0x447A0000
 000000D2  F7FF      BL          ?C?FPDIV?T  ; T=0x0001  (1) ; ?C?FPDIV?T
 000000D4  FF95      BL          ?C?FPDIV?T  ; T=0x0001  (2) ; ?C?FPDIV?T
 000000D6  4800      LDR         R1,=0x42C80000
 000000D8  F7FF      BL          ?C?FPMUL?T  ; T=0x0001  (1) ; ?C?FPMUL?T
 000000DA  FF92      BL          ?C?FPMUL?T  ; T=0x0001  (2) ; ?C?FPMUL?T
 000000DC  A900      ADD         R1,R13,#0x0
 000000DE  6008      STR         R0,[R1,#0x0] ; bias
  168:     bias /= 2e-6;
 000000E0  A800      ADD         R0,R13,#0x0
 000000E2  6800      LDR         R0,[R0,#0x0] ; bias
 000000E4  4800      LDR         R1,=0x360637BD
 000000E6  F7FF      BL          ?C?FPDIV?T  ; T=0x0001  (1) ; ?C?FPDIV?T
 000000E8  FF8B      BL          ?C?FPDIV?T  ; T=0x0001  (2) ; ?C?FPDIV?T
 000000EA  A900      ADD         R1,R13,#0x0
 000000EC  6008      STR         R0,[R1,#0x0] ; bias
  169:     bias_res = (HALFWORD)bias;
 000000EE  A800      ADD         R0,R13,#0x0
 000000F0  6800      LDR         R0,[R0,#0x0] ; bias
ARM COMPILER V2.32a,  monitor                                                              08/08/05  09:50:21  PAGE 15  

 000000F2  F7FF      BL          ?C?CASTF?T  ; T=0x0001  (1) ; ?C?CASTF?T
 000000F4  FF85      BL          ?C?CASTF?T  ; T=0x0001  (2) ; ?C?CASTF?T
 000000F6  A901      ADD         R1,R13,#0x4
 000000F8  8008      STRH        R0,[R1,#0x0] ; bias_res
  172:     A2h[100] = (BYTE)(bias_res>>8);         // write high-byte
 000000FA  A801      ADD         R0,R13,#0x4
 000000FC  8800      LDRH        R0,[R0,#0x0] ; bias_res
 000000FE  1C01      MOV         R1,R0
 00000100  0A09      LSR         R1,R1,#0x8
 00000102  4800      LDR         R0,=A2h + 0x64 ; A2h+100
 00000104  7001      STRB        R1,[R0,#0x0] ; A2h+100
  173:     A2h[101] = (BYTE)(bias_res & 0x00F0);   // write low-byte, fix low-order 4-bit at zero
 00000106  A801      ADD         R0,R13,#0x4
 00000108  8800      LDRH        R0,[R0,#0x0] ; bias_res
 0000010A  1C01      MOV         R1,R0
 0000010C  20F0      MOV         R0,#0xF0
 0000010E  4001      AND         R1,R0
 00000110  4800      LDR         R0,=A2h + 0x65 ; A2h+101
 00000112  7001      STRB        R1,[R0,#0x0] ; A2h+101
 00000114            ; SCOPE-END
  174: }
 00000114  B006      ADD         R13,#0x18
 00000116  BC08      POP         {R3}
 00000118  4718      BX          R3
 0000011A          ENDP ; 'tx_bias_monitor?T'


*** CODE SEGMENT '?PR?tx_mod_monitor?T?monitor':
  181: void tx_mod_monitor(void)
 00000000  B500      PUSH        {LR}
 00000002  B086      SUB         R13,#0x18
  182: {
 00000004            ; SCOPE-START
  189:     HALFWORD dat=0;
 00000004  2100      MOV         R1,#0x0
 00000006  A805      ADD         R0,R13,#0x14
 00000008  8001      STRH        R1,[R0,#0x0] ; dat
  192:     ADCCP = 0x02;                   // select ADC2 input channel
 0000000A  2102      MOV         R1,#0x2
 0000000C  4800      LDR         R0,=0xFFFF0504
 0000000E  6001      STR         R1,[R0,#0x0]
  195:     for(cnt=0; cnt<4; cnt++){
 00000010  2100      MOV         R1,#0x0
 00000012  A804      ADD         R0,R13,#0x10
 00000014  7001      STRB        R1,[R0,#0x0] ; cnt
 00000016  E014      B           L_43  ; T=0x00000042
 00000018          L_44:
  196:         ADCCON=0xA3;                // software start, single-end input
 00000018  21A3      MOV         R1,#0xA3
 0000001A  4800      LDR         R0,=0xFFFF0500
 0000001C  6001      STR         R1,[R0,#0x0]
  197:         while(!ADCSTA){}            // wait for end of conversion
 0000001E          L_46:
 0000001E  4800      LDR         R0,=0xFFFF050C
 00000020  6800      LDR         R0,[R0,#0x0]
 00000022  2800      CMP         R0,#0x0
 00000024  D0FB      BEQ         L_46  ; T=0x0000001E
  198:         i[cnt]=(ADCDAT>>16);
 00000026  4800      LDR         R0,=0xFFFF0510
 00000028  6801      LDR         R1,[R0,#0x0]
 0000002A  0C09      LSR         R1,R1,#0x10
 0000002C  A804      ADD         R0,R13,#0x10
 0000002E  7800      LDRB        R0,[R0,#0x0] ; cnt
 00000030  1C02      MOV         R2,R0
 00000032  0052      LSL         R2,R2,#0x1
 00000034  A802      ADD         R0,R13,#0x8
 00000036  1880      ADD         R0,R2 ; i
 00000038  8001      STRH        R1,[R0,#0x0]
ARM COMPILER V2.32a,  monitor                                                              08/08/05  09:50:21  PAGE 16  

  199:     }
 0000003A  A804      ADD         R0,R13,#0x10
 0000003C  7801      LDRB        R1,[R0,#0x0] ; cnt
 0000003E  3101      ADD         R1,#0x1
 00000040  7001      STRB        R1,[R0,#0x0] ; cnt
 00000042          L_43:
 00000042  A804      ADD         R0,R13,#0x10
 00000044  7800      LDRB        R0,[R0,#0x0] ; cnt
 00000046  2804      CMP         R0,#0x4
 00000048  DBE6      BLT         L_44  ; T=0x00000018
  202:     if(i[3] > ADC_HIGH_MAX) i[3] = 0;    // limits a highest
 0000004A  200E      MOV         R0,#0xE
 0000004C  4468      ADD         R0,R13
 0000004E  8800      LDRH        R0,[R0,#0x0] ; i+6
 00000050  4800      LDR         R1,=0xFF5
 00000052  4288      CMP         R0,R1
 00000054  D903      BLS         L_50  ; T=0x0000005E
 00000056  2100      MOV         R1,#0x0
 00000058  200E      MOV         R0,#0xE
 0000005A  4468      ADD         R0,R13
 0000005C  8001      STRH        R1,[R0,#0x0] ; i+6
 0000005E          L_50:
  205:     buf[p_buf] = i[3];
 0000005E  200E      MOV         R0,#0xE
 00000060  4468      ADD         R0,R13
 00000062  8801      LDRH        R1,[R0,#0x0] ; i+6
 00000064  4800      LDR         R0,=p_buf ; p_buf
 00000066  7800      LDRB        R0,[R0,#0x0] ; p_buf
 00000068  1C02      MOV         R2,R0
 0000006A  0052      LSL         R2,R2,#0x1
 0000006C  4800      LDR         R0,=buf ; buf
 0000006E  1880      ADD         R0,R2 ; buf
 00000070  8001      STRH        R1,[R0,#0x0]
  206:     p_buf++;
 00000072  4800      LDR         R0,=p_buf ; p_buf
 00000074  7801      LDRB        R1,[R0,#0x0] ; p_buf
 00000076  3101      ADD         R1,#0x1
 00000078  7001      STRB        R1,[R0,#0x0] ; p_buf
  207:     p_buf &= 0x07;                  // reset ring-buffer pointer
 0000007A  4800      LDR         R0,=p_buf ; p_buf
 0000007C  7801      LDRB        R1,[R0,#0x0] ; p_buf
 0000007E  2007      MOV         R0,#0x7
 00000080  4001      AND         R1,R0
 00000082  4800      LDR         R0,=p_buf ; p_buf
 00000084  7001      STRB        R1,[R0,#0x0] ; p_buf
  208:     for(cnt=0; cnt<8; cnt++){
 00000086  2100      MOV         R1,#0x0
 00000088  A804      ADD         R0,R13,#0x10
 0000008A  7001      STRB        R1,[R0,#0x0] ; cnt
 0000008C  E00F      B           L_53  ; T=0x000000AE
 0000008E          L_54:
  209:         dat += buf[cnt];
 0000008E  A804      ADD         R0,R13,#0x10
 00000090  7800      LDRB        R0,[R0,#0x0] ; cnt
 00000092  1C01      MOV         R1,R0
 00000094  0049      LSL         R1,R1,#0x1
 00000096  4800      LDR         R0,=buf ; buf
 00000098  1840      ADD         R0,R1 ; buf
 0000009A  8800      LDRH        R0,[R0,#0x0]
 0000009C  A905      ADD         R1,R13,#0x14
 0000009E  8809      LDRH        R1,[R1,#0x0] ; dat
 000000A0  1809      ADD         R1,R0
 000000A2  A805      ADD         R0,R13,#0x14
 000000A4  8001      STRH        R1,[R0,#0x0] ; dat
  210:     }
 000000A6  A804      ADD         R0,R13,#0x10
ARM COMPILER V2.32a,  monitor                                                              08/08/05  09:50:21  PAGE 17  

 000000A8  7801      LDRB        R1,[R0,#0x0] ; cnt
 000000AA  3101      ADD         R1,#0x1
 000000AC  7001      STRB        R1,[R0,#0x0] ; cnt
 000000AE          L_53:
 000000AE  A804      ADD         R0,R13,#0x10
 000000B0  7800      LDRB        R0,[R0,#0x0] ; cnt
 000000B2  2808      CMP         R0,#0x8
 000000B4  DBEB      BLT         L_54  ; T=0x0000008E
  211:     dat = dat>>3;                   // delta/8;
 000000B6  A805      ADD         R0,R13,#0x14
 000000B8  8800      LDRH        R0,[R0,#0x0] ; dat
 000000BA  1C01      MOV         R1,R0
 000000BC  08C9      LSR         R1,R1,#0x3
 000000BE  A805      ADD         R0,R13,#0x14
 000000C0  8001      STRH        R1,[R0,#0x0] ; dat
  215:      mod = (dat * 610e-6 / 470) * 50;
 000000C2  A805      ADD         R0,R13,#0x14
 000000C4  8800      LDRH        R0,[R0,#0x0] ; dat
 000000C6  F7FF      BL          ?C?FCASTU?T  ; T=0x0001  (1) ; ?C?FCASTU?T
 000000C8  FF9B      BL          ?C?FCASTU?T  ; T=0x0001  (2) ; ?C?FCASTU?T
 000000CA  4800      LDR         R1,=0x3A1FE868
 000000CC  F7FF      BL          ?C?FPMUL?T  ; T=0x0001  (1) ; ?C?FPMUL?T
 000000CE  FF98      BL          ?C?FPMUL?T  ; T=0x0001  (2) ; ?C?FPMUL?T
 000000D0  4800      LDR         R1,=0x43EB0000
 000000D2  F7FF      BL          ?C?FPDIV?T  ; T=0x0001  (1) ; ?C?FPDIV?T
 000000D4  FF95      BL          ?C?FPDIV?T  ; T=0x0001  (2) ; ?C?FPDIV?T
 000000D6  4800      LDR         R1,=0x42480000
 000000D8  F7FF      BL          ?C?FPMUL?T  ; T=0x0001  (1) ; ?C?FPMUL?T
 000000DA  FF92      BL          ?C?FPMUL?T  ; T=0x0001  (2) ; ?C?FPMUL?T
 000000DC  A900      ADD         R1,R13,#0x0
 000000DE  6008      STR         R0,[R1,#0x0] ; mod
  218:     mod /= 2e-6;
 000000E0  A800      ADD         R0,R13,#0x0
 000000E2  6800      LDR         R0,[R0,#0x0] ; mod
 000000E4  4800      LDR         R1,=0x360637BD
 000000E6  F7FF      BL          ?C?FPDIV?T  ; T=0x0001  (1) ; ?C?FPDIV?T
 000000E8  FF8B      BL          ?C?FPDIV?T  ; T=0x0001  (2) ; ?C?FPDIV?T
 000000EA  A900      ADD         R1,R13,#0x0
 000000EC  6008      STR         R0,[R1,#0x0] ; mod
  219:     mod_res = (HALFWORD)mod;
 000000EE  A800      ADD         R0,R13,#0x0
 000000F0  6800      LDR         R0,[R0,#0x0] ; mod
 000000F2  F7FF      BL          ?C?CASTF?T  ; T=0x0001  (1) ; ?C?CASTF?T
 000000F4  FF85      BL          ?C?CASTF?T  ; T=0x0001  (2) ; ?C?CASTF?T
 000000F6  A901      ADD         R1,R13,#0x4
 000000F8  8008      STRH        R0,[R1,#0x0] ; mod_res
  222:     TXMOD_MSB = (BYTE)(mod_res>>8);          // write high-byte
 000000FA  A801      ADD         R0,R13,#0x4
 000000FC  8800      LDRH        R0,[R0,#0x0] ; mod_res
 000000FE  1C01      MOV         R1,R0
 00000100  0A09      LSR         R1,R1,#0x8
 00000102  4800      LDR         R0,=A2h + 0x78 ; A2h+120
 00000104  7001      STRB        R1,[R0,#0x0] ; A2h+120
  223:     TXMOD_LSB = (BYTE)(mod_res & 0x00F0);    // write low-byte, fix low-order 4-bit at zero
 00000106  A801      ADD         R0,R13,#0x4
 00000108  8800      LDRH        R0,[R0,#0x0] ; mod_res
 0000010A  1C01      MOV         R1,R0
 0000010C  20F0      MOV         R0,#0xF0
 0000010E  4001      AND         R1,R0
 00000110  4800      LDR         R0,=A2h + 0x79 ; A2h+121
 00000112  7001      STRB        R1,[R0,#0x0] ; A2h+121
  225:     TXMOD_RAWDAT_MSB = dat>>8;               // write high-byte
 00000114  A805      ADD         R0,R13,#0x14
 00000116  8800      LDRH        R0,[R0,#0x0] ; dat
 00000118  1C01      MOV         R1,R0
 0000011A  0A09      LSR         R1,R1,#0x8

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