📄 monitor.lst
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00000032 7001 STRB R1,[R0,#0x0] ; p_buf
76: p_buf &= 0x07; // reset ring-buffer pointer
00000034 4800 LDR R0,=p_buf ; p_buf
00000036 7801 LDRB R1,[R0,#0x0] ; p_buf
00000038 2007 MOV R0,#0x7
0000003A 4001 AND R1,R0
0000003C 4800 LDR R0,=p_buf ; p_buf
0000003E 7001 STRB R1,[R0,#0x0] ; p_buf
ARM COMPILER V2.32a, monitor 08/08/05 09:50:21 PAGE 10
77: for(cnt=0; cnt<8; cnt++){
00000040 2100 MOV R1,#0x0
00000042 A805 ADD R0,R13,#0x14
00000044 7001 STRB R1,[R0,#0x0] ; cnt
00000046 E00F B L_14 ; T=0x00000068
00000048 L_15:
78: sum += buf[cnt];
00000048 A805 ADD R0,R13,#0x14
0000004A 7800 LDRB R0,[R0,#0x0] ; cnt
0000004C 1C01 MOV R1,R0
0000004E 0049 LSL R1,R1,#0x1
00000050 4800 LDR R0,=buf ; buf
00000052 1840 ADD R0,R1 ; buf
00000054 8800 LDRH R0,[R0,#0x0]
00000056 A901 ADD R1,R13,#0x4
00000058 8809 LDRH R1,[R1,#0x0] ; sum
0000005A 1809 ADD R1,R0
0000005C A801 ADD R0,R13,#0x4
0000005E 8001 STRH R1,[R0,#0x0] ; sum
79: }
00000060 A805 ADD R0,R13,#0x14
00000062 7801 LDRB R1,[R0,#0x0] ; cnt
00000064 3101 ADD R1,#0x1
00000066 7001 STRB R1,[R0,#0x0] ; cnt
00000068 L_14:
00000068 A805 ADD R0,R13,#0x14
0000006A 7800 LDRB R0,[R0,#0x0] ; cnt
0000006C 2808 CMP R0,#0x8
0000006E DBEB BLT L_15 ; T=0x00000048
80: adcread_avr = sum>>3;
00000070 A801 ADD R0,R13,#0x4
00000072 8800 LDRH R0,[R0,#0x0] ; sum
00000074 1C01 MOV R1,R0
00000076 08C9 LSR R1,R1,#0x3
00000078 A802 ADD R0,R13,#0x8
0000007A 8001 STRH R1,[R0,#0x0] ; adcread_avr
83: delta = (((REF_ADCDAT_MSB<<8) + REF_ADCDAT_LSB) - adcread_avr);
0000007C 4800 LDR R0,=A2h + 0xFE ; A2h+254
0000007E 7800 LDRB R0,[R0,#0x0] ; A2h+254
00000080 1C01 MOV R1,R0
00000082 0209 LSL R1,R1,#0x8
00000084 4800 LDR R0,=A2h + 0xFF ; A2h+255
00000086 7800 LDRB R0,[R0,#0x0] ; A2h+255
00000088 1809 ADD R1,R0
0000008A A802 ADD R0,R13,#0x8
0000008C 8800 LDRH R0,[R0,#0x0] ; adcread_avr
0000008E 1A09 SUB R1,R0
00000090 A803 ADD R0,R13,#0xC
00000092 8001 STRH R1,[R0,#0x0] ; delta
86: temp = ((REF_TEMP_MSB<<8) + REF_TEMP_LSB) + delta * T_SLOPE;
00000094 4800 LDR R0,=A2h + 0xFC ; A2h+252
00000096 7800 LDRB R0,[R0,#0x0] ; A2h+252
00000098 1C01 MOV R1,R0
0000009A 0209 LSL R1,R1,#0x8
0000009C 4800 LDR R0,=A2h + 0xFD ; A2h+253
0000009E 7800 LDRB R0,[R0,#0x0] ; A2h+253
000000A0 1809 ADD R1,R0
000000A2 A803 ADD R0,R13,#0xC
000000A4 8800 LDRH R0,[R0,#0x0] ; delta
000000A6 0400 LSL R0,R0,#0x10
000000A8 1400 ASR R0,R0,#0x10
000000AA 2278 MOV R2,#0x78
000000AC 4350 MUL R0,R2
000000AE 1809 ADD R1,R0
000000B0 A804 ADD R0,R13,#0x10
000000B2 8001 STRH R1,[R0,#0x0] ; temp
ARM COMPILER V2.32a, monitor 08/08/05 09:50:21 PAGE 11
89: A2h[96] = (BYTE)(temp>>8); // write high-byte
000000B4 A804 ADD R0,R13,#0x10
000000B6 8800 LDRH R0,[R0,#0x0] ; temp
000000B8 0400 LSL R0,R0,#0x10
000000BA 1400 ASR R0,R0,#0x10
000000BC 1C01 MOV R1,R0
000000BE 1209 ASR R1,R1,#0x8
000000C0 4800 LDR R0,=A2h + 0x60 ; A2h+96
000000C2 7001 STRB R1,[R0,#0x0] ; A2h+96
90: A2h[97] = (BYTE)(temp & 0x00F0); // write low-byte, fix low-order data at zero
000000C4 A804 ADD R0,R13,#0x10
000000C6 8800 LDRH R0,[R0,#0x0] ; temp
000000C8 0400 LSL R0,R0,#0x10
000000CA 1400 ASR R0,R0,#0x10
000000CC 1C01 MOV R1,R0
000000CE 20F0 MOV R0,#0xF0
000000D0 4001 AND R1,R0
000000D2 4800 LDR R0,=A2h + 0x61 ; A2h+97
000000D4 7001 STRB R1,[R0,#0x0] ; A2h+97
000000D6 ; SCOPE-END
91: }
000000D6 B006 ADD R13,#0x18
000000D8 BC08 POP {R3}
000000DA 4718 BX R3
000000DC ENDP ; 'temp_monitor?T'
*** CODE SEGMENT '?PR?voltage_monitor?T?monitor':
98: void voltage_monitor(void)
00000000 B500 PUSH {LR}
00000002 B084 SUB R13,#0x10
99: {
00000004 ; SCOPE-START
106: ADCCP = 0x00; // select ADC0 input channel
00000004 2100 MOV R1,#0x0
00000006 4800 LDR R0,=0xFFFF0504
00000008 6001 STR R1,[R0,#0x0]
109: for(cnt=0; cnt<2; cnt++){
0000000A 2100 MOV R1,#0x0
0000000C A803 ADD R0,R13,#0xC
0000000E 7001 STRB R1,[R0,#0x0] ; cnt
00000010 E014 B L_19 ; T=0x0000003C
00000012 L_20:
110: ADCCON = 0xA3; // software start, single-end input
00000012 21A3 MOV R1,#0xA3
00000014 4800 LDR R0,=0xFFFF0500
00000016 6001 STR R1,[R0,#0x0]
111: while (!ADCSTA){} // wait for end of conversion
00000018 L_22:
00000018 4800 LDR R0,=0xFFFF050C
0000001A 6800 LDR R0,[R0,#0x0]
0000001C 2800 CMP R0,#0x0
0000001E D0FB BEQ L_22 ; T=0x00000018
112: i[cnt] = (ADCDAT >> 16);
00000020 4800 LDR R0,=0xFFFF0510
00000022 6801 LDR R1,[R0,#0x0]
00000024 0C09 LSR R1,R1,#0x10
00000026 A803 ADD R0,R13,#0xC
00000028 7800 LDRB R0,[R0,#0x0] ; cnt
0000002A 1C02 MOV R2,R0
0000002C 0052 LSL R2,R2,#0x1
0000002E A802 ADD R0,R13,#0x8
00000030 1880 ADD R0,R2 ; i
00000032 8001 STRH R1,[R0,#0x0]
113: }
00000034 A803 ADD R0,R13,#0xC
00000036 7801 LDRB R1,[R0,#0x0] ; cnt
00000038 3101 ADD R1,#0x1
ARM COMPILER V2.32a, monitor 08/08/05 09:50:21 PAGE 12
0000003A 7001 STRB R1,[R0,#0x0] ; cnt
0000003C L_19:
0000003C A803 ADD R0,R13,#0xC
0000003E 7800 LDRB R0,[R0,#0x0] ; cnt
00000040 2802 CMP R0,#0x2
00000042 DBE6 BLT L_20 ; T=0x00000012
116: volt = 2 * i[1] * 610e-6 / 100e-6;
00000044 200A MOV R0,#0xA
00000046 4468 ADD R0,R13
00000048 8800 LDRH R0,[R0,#0x0] ; i+2
0000004A 0040 LSL R0,R0,#0x1
0000004C F7FF BL ?C?FCASTU?T ; T=0x0001 (1) ; ?C?FCASTU?T
0000004E FFD8 BL ?C?FCASTU?T ; T=0x0001 (2) ; ?C?FCASTU?T
00000050 4800 LDR R1,=0x3A1FE868
00000052 F7FF BL ?C?FPMUL?T ; T=0x0001 (1) ; ?C?FPMUL?T
00000054 FFD5 BL ?C?FPMUL?T ; T=0x0001 (2) ; ?C?FPMUL?T
00000056 4800 LDR R1,=0x38D1B717
00000058 F7FF BL ?C?FPDIV?T ; T=0x0001 (1) ; ?C?FPDIV?T
0000005A FFD2 BL ?C?FPDIV?T ; T=0x0001 (2) ; ?C?FPDIV?T
0000005C A900 ADD R1,R13,#0x0
0000005E 6008 STR R0,[R1,#0x0] ; volt
119: volt_res = (HALFWORD)volt;
00000060 A800 ADD R0,R13,#0x0
00000062 6800 LDR R0,[R0,#0x0] ; volt
00000064 F7FF BL ?C?CASTF?T ; T=0x0001 (1) ; ?C?CASTF?T
00000066 FFCC BL ?C?CASTF?T ; T=0x0001 (2) ; ?C?CASTF?T
00000068 A901 ADD R1,R13,#0x4
0000006A 8008 STRH R0,[R1,#0x0] ; volt_res
122: A2h[98] = (BYTE)(volt_res>>8); // write high-byte
0000006C A801 ADD R0,R13,#0x4
0000006E 8800 LDRH R0,[R0,#0x0] ; volt_res
00000070 1C01 MOV R1,R0
00000072 0A09 LSR R1,R1,#0x8
00000074 4800 LDR R0,=A2h + 0x62 ; A2h+98
00000076 7001 STRB R1,[R0,#0x0] ; A2h+98
123: A2h[99] = (BYTE)(volt_res & 0x00F0); // write low-byte, fix low-order data at zero
00000078 A801 ADD R0,R13,#0x4
0000007A 8800 LDRH R0,[R0,#0x0] ; volt_res
0000007C 1C01 MOV R1,R0
0000007E 20F0 MOV R0,#0xF0
00000080 4001 AND R1,R0
00000082 4800 LDR R0,=A2h + 0x63 ; A2h+99
00000084 7001 STRB R1,[R0,#0x0] ; A2h+99
00000086 ; SCOPE-END
124: }
00000086 B004 ADD R13,#0x10
00000088 BC08 POP {R3}
0000008A 4718 BX R3
0000008C ENDP ; 'voltage_monitor?T'
*** CODE SEGMENT '?PR?tx_bias_monitor?T?monitor':
131: void tx_bias_monitor(void)
00000000 B500 PUSH {LR}
00000002 B086 SUB R13,#0x18
132: {
00000004 ; SCOPE-START
139: HALFWORD dat=0;
00000004 2100 MOV R1,#0x0
00000006 A805 ADD R0,R13,#0x14
00000008 8001 STRH R1,[R0,#0x0] ; dat
142: ADCCP = 0x01; // select ADC1 input channel
0000000A 2101 MOV R1,#0x1
0000000C 4800 LDR R0,=0xFFFF0504
0000000E 6001 STR R1,[R0,#0x0]
145: for(cnt=0; cnt<4; cnt++){
00000010 2100 MOV R1,#0x0
00000012 A804 ADD R0,R13,#0x10
ARM COMPILER V2.32a, monitor 08/08/05 09:50:21 PAGE 13
00000014 7001 STRB R1,[R0,#0x0] ; cnt
00000016 E014 B L_28 ; T=0x00000042
00000018 L_29:
146: ADCCON=0xA3; // software start, single-end input
00000018 21A3 MOV R1,#0xA3
0000001A 4800 LDR R0,=0xFFFF0500
0000001C 6001 STR R1,[R0,#0x0]
147: while(!ADCSTA){} // wait for end of conversion
0000001E L_31:
0000001E 4800 LDR R0,=0xFFFF050C
00000020 6800 LDR R0,[R0,#0x0]
00000022 2800 CMP R0,#0x0
00000024 D0FB BEQ L_31 ; T=0x0000001E
148: i[cnt]=(ADCDAT>>16);
00000026 4800 LDR R0,=0xFFFF0510
00000028 6801 LDR R1,[R0,#0x0]
0000002A 0C09 LSR R1,R1,#0x10
0000002C A804 ADD R0,R13,#0x10
0000002E 7800 LDRB R0,[R0,#0x0] ; cnt
00000030 1C02 MOV R2,R0
00000032 0052 LSL R2,R2,#0x1
00000034 A802 ADD R0,R13,#0x8
00000036 1880 ADD R0,R2 ; i
00000038 8001 STRH R1,[R0,#0x0]
149: }
0000003A A804 ADD R0,R13,#0x10
0000003C 7801 LDRB R1,[R0,#0x0] ; cnt
0000003E 3101 ADD R1,#0x1
00000040 7001 STRB R1,[R0,#0x0] ; cnt
00000042 L_28:
00000042 A804 ADD R0,R13,#0x10
00000044 7800 LDRB R0,[R0,#0x0] ; cnt
00000046 2804 CMP R0,#0x4
00000048 DBE6 BLT L_29 ; T=0x00000018
152: if(i[3] > ADC_HIGH_MAX) i[3] = 0; // limits a highest
0000004A 200E MOV R0,#0xE
0000004C 4468 ADD R0,R13
0000004E 8800 LDRH R0,[R0,#0x0] ; i+6
00000050 4800 LDR R1,=0xFF5
00000052 4288 CMP R0,R1
00000054 D903 BLS L_35 ; T=0x0000005E
00000056 2100 MOV R1,#0x0
00000058 200E MOV R0,#0xE
0000005A 4468 ADD R0,R13
0000005C 8001 STRH R1,[R0,#0x0] ; i+6
0000005E L_35:
155: buf[p_buf] = i[3];
0000005E 200E MOV R0,#0xE
00000060 4468 ADD R0,R13
00000062 8801 LDRH R1,[R0,#0x0] ; i+6
00000064 4800 LDR R0,=p_buf ; p_buf
00000066 7800 LDRB R0,[R0,#0x0] ; p_buf
00000068 1C02 MOV R2,R0
0000006A 0052 LSL R2,R2,#0x1
0000006C 4800 LDR R0,=buf ; buf
0000006E 1880 ADD R0,R2 ; buf
00000070 8001 STRH R1,[R0,#0x0]
156: p_buf++;
00000072 4800 LDR R0,=p_buf ; p_buf
00000074 7801 LDRB R1,[R0,#0x0] ; p_buf
00000076 3101 ADD R1,#0x1
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