📄 irq.c
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// irq.c
/********************************************************************/
/* */
/* IRQ Interrupt Service Rountine */
/* */
/********************************************************************/
#include <ADuC7020.h>
#include "common.h"
void IRQ_Handler(void) __irq {
static HALFWORD er_count=0;
/********************************************************************/
/* */
/* Monitor and Diagnostic routine */
/* triggered by Timer1 underflow */
/********************************************************************/
if((IRQSTA & GP_TIMER_BIT)) // Timer1 IRQ?
{
T1CON = 0x00;
if((i2c_receive != 0x00) && (i2c_first == TRUE)) {
FlashUpdate(i2c_receive);
i2c_receive = 0x00;
}
// update DACs
if(dac_update == 0x01) SetDac(0);
if(dac_update == 0x02) SetDac(1);
monitor(); // run monitor routines
diag(); // run diagnostic routnies
fault_recovery_check(); // check recovery status
if(ER_CON)ErCalibration(ER_CON); // run ER caliburation
if((er_count>=ER_COMP_TIME) && ER_COMP_ENABLE){
ErCompensation(); // run ER compensation
er_count=0; // reset counter
}
A2h[110] &= 0xFE; // clear bit0, DATA_READY_BAR in Status/Control Bits
er_count++;
T1CLRI = 0; // clear Timer1 interrupt
T1CON = 0xCF;
}
/********************************************************************/
/* */
/* Tx Laser Fault detection */
/* triggered by External IRQ0 */
/********************************************************************/
if ((IRQSTA & XIRQ0_BIT) == 0x00008000) // XIRQ0, bit15
{
// set bit in status/control bits resister
A2h[110] |= 0x04; // bit2(Tx Fault state) is set high
IRQCLR = 0x00008000; // disable XIRQ0 interrupt
}
/********************************************************************/
/* */
/* Tx Disable detection */
/* triggered by External IRQ1 */
/********************************************************************/
if ((IRQSTA & XIRQ1_BIT) == 0x00040000) // XIRQ1, bit14
{
// set bit in status/control bits resister
A2h[110] |= 0x80; // bit7(Tx Disable state) is set high
IRQCLR = 0x00040000; // disable XIRQ1 interrupt
}
/********************************************************************/
/* */
/* Rx LOS detection */
/* triggered by PLA IRQ0 */
/********************************************************************/
/*
if ((IRQSTA & PLA_IRQ0_BIT) == 0x00080000) // PLAIRQ0, bit19
{
// set bit in status/control bits resister
A2h[110] |= 0x02; // bit1(LOS) is set high
IRQCLR = 0x00080000; // disable PLAIRQ0 interrupt
}
*/
/********************************************************************/
/* */
/* Rx Rate Select detection */
/* triggered by PLA IRQ1 */
/********************************************************************/
/*
if ((IRQSTA & PLA_IRQ1_BIT) == 0x00100000) // PLAIRQ1
{
// set bit in status/control bits resister
A2h[110] |= 0x10; // bit4(RateSel) is set high
IRQCLR = 0x00100000; // disable PLAIRQ0 interrupt
}
*/
}
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