📄 i2c.lst
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ARM COMPILER V2.32a, i2c 28/07/05 15:10:10 PAGE 1
ARM COMPILER V2.32a, COMPILATION OF MODULE i2c
OBJECT MODULE PLACED IN i2c.OBJ
COMPILER INVOKED BY: C:\Keil\ARM\BIN\CA.exe i2c.c THUMB OPTIMIZE(0,SPEED) BROWSE DEBUG TABS(4)
stmt level source
1 // i2c.c
2
3 /********************************************************************/
4 /* */
5 /* I2C Interrupt */
6 /* */
7 /********************************************************************/
8 #include <ADuC7020.h>
9 #include "common.h"
10
11 void InitI2c(void){
12 1
13 1 i2c_first = TRUE;
14 1 i2c_receive = 0x00;
15 1 I2CSTX = A0h[0]; // for first I2C operation assuming we will get the address A0
16 1 }
17
18
19 /*
20 void i2c(void){
21
22 static BYTE i2c_addr=0, byte_addr=0, byte_data=0;
23 int status = I2CSSTA;
24
25 if((status & 0x08) == 0x08){ // slave-receiver INT?
26 GP4DAT ^= 0x00040000;
27
28 /////////STATE2/////////////
29 if(i2c_first == TRUE){ // first slave-receiver INT
30 if(I2C0SIDD==0) i2c_addr = 0xA0; // get i2c device address
31 else i2c_addr = 0xA2;
32 byte_addr = I2CSRX; // get byte address
33 I2C0SSTA |= 0x80; // flush TX FIFO
34 if(i2c_addr==0xA0)I2CSTX = A0h[byte_addr]; // set tx data for next read access
35 if(i2c_addr==0xA2)I2CSTX = A2h[byte_addr];
36 i2c_first = FALSE; // clear i2c_first flag
37 }
38 /////////STATE3/////////////
39 else{ // slave-receiver INT
40 byte_data = I2CSRX; // get byte data
41 i2c_write(i2c_addr, byte_addr, byte_data); // save received byte data
42 I2C0SSTA |= 0x80; // flush TX FIFO
43 byte_addr++; // inclement byte address
44 if(i2c_addr==0xA0)I2CSTX = A0h[byte_addr];// set tx data for next read access
45 if(i2c_addr==0xA2)I2CSTX = A2h[byte_addr];
46 }
47 }
48 /////////STATE4/////////////
49 if((status & 0x04) == 0x04){ // slave-transmitter INT?
50 GP4DAT ^= 0x00040000;
51
52 if(I2C0SIDD==0)i2c_addr = 0xA0; // get i2c device address
53 else i2c_addr = 0xA2;
54
55 if(i2c_addr==0xA0){
56 I2CSTX = A0h[byte_addr]; // set tx data (current address)
57 byte_addr++; // increment byte address
58 I2CSTX = A0h[byte_addr]; // set tx data (next address)
59 }
ARM COMPILER V2.32a, i2c 28/07/05 15:10:10 PAGE 2
60 if(i2c_addr==0xA2){
61 I2CSTX = A2h[byte_addr]; // set tx data (current address)
62 byte_addr++; // increment byte address
63 I2CSTX = A2h[byte_addr]; // set tx data for next read access
64 }
65 }
66
67 return;
68 }
69 */
70
71 /********************************************************************/
72 /* */
73 /* I2C-write / Slave-receiver */
74 /* */
75 /********************************************************************/
76 void i2c_write(BYTE i2c_addr, BYTE byte_addr, BYTE byte_data){
77 1
78 1 if(i2c_addr==0xA0) A0h[byte_addr] = byte_data;
79 1 if(i2c_addr==0xA2) A2h[byte_addr] = byte_data;
80 1
81 1 i2c_receive = i2c_addr; // set i2c device address for FlashUpdate function
82 1
83 1 // update DACs
84 1 if((i2c_addr==0xA2)&&((byte_addr==248)||(byte_addr==249))) SetDac(0);
85 1 if((i2c_addr==0xA2)&&((byte_addr==250)||(byte_addr==251))) SetDac(1);
86 1
87 1 // run Force-Flash-Update
88 1 //if(FORCE_FLASH_UPDATE) FlashUpdate();
89 1
90 1 // run checksum
91 1 if((i2c_addr==0xA0)&&(byte_addr<63)) Checksum(1);
92 1 if((i2c_addr==0xA0)&&(63<byte_addr)&&(byte_addr<95)) Checksum(2);
93 1 if((i2c_addr==0xA2)&&(byte_addr<95)) Checksum(3);
94 1
95 1 return;
96 1 }
97
ARM COMPILER V2.32a, i2c 28/07/05 15:10:10 PAGE 3
ASSEMBLY LISTING OF GENERATED OBJECT CODE
*** EXTERNALS:
EXTERN DATA (A0h)
EXTERN DATA (A2h)
EXTERN DATA (i2c_first)
EXTERN DATA (i2c_receive)
EXTERN CODE16 (SetDac?T)
EXTERN CODE16 (Checksum?T)
*** PUBLICS:
PUBLIC i2c_write?T
PUBLIC InitI2c?T
*** CODE SEGMENT '?PR?InitI2c?T?i2c':
13: i2c_first = TRUE;
00000000 2101 MOV R1,#0x1
00000002 4800 LDR R0,=i2c_first ; i2c_first
00000004 7001 STRB R1,[R0,#0x0] ; i2c_first
14: i2c_receive = 0x00;
00000006 2100 MOV R1,#0x0
00000008 4800 LDR R0,=i2c_receive ; i2c_receive
0000000A 7001 STRB R1,[R0,#0x0] ; i2c_receive
15: I2CSTX = A0h[0]; // for first I2C operation assuming we will get the address A0
0000000C 4800 LDR R0,=A0h ; A0h
0000000E 7800 LDRB R0,[R0,#0x0] ; A0h
00000010 1C01 MOV R1,R0
00000012 4800 LDR R0,=0xFFFF080C
00000014 6001 STR R1,[R0,#0x0]
16: }
00000016 4770 BX R14
00000018 ENDP ; 'InitI2c?T'
*** CODE SEGMENT '?PR?i2c_write?T?i2c':
76: void i2c_write(BYTE i2c_addr, BYTE byte_addr, BYTE byte_data){
00000000 B507 PUSH {R0-R2,LR}
78: if(i2c_addr==0xA0) A0h[byte_addr] = byte_data;
00000002 A800 ADD R0,R13,#0x0
00000004 7800 LDRB R0,[R0,#0x0] ; i2c_addr
00000006 28A0 CMP R0,#0xA0
00000008 D107 BNE L_1 ; T=0x0000001A
0000000A A802 ADD R0,R13,#0x8
0000000C 7801 LDRB R1,[R0,#0x0] ; byte_data
0000000E A801 ADD R0,R13,#0x4
00000010 7800 LDRB R0,[R0,#0x0] ; byte_addr
00000012 1C02 MOV R2,R0
00000014 4800 LDR R0,=A0h ; A0h
00000016 1880 ADD R0,R2 ; A0h
00000018 7001 STRB R1,[R0,#0x0]
0000001A L_1:
79: if(i2c_addr==0xA2) A2h[byte_addr] = byte_data;
0000001A A800 ADD R0,R13,#0x0
0000001C 7800 LDRB R0,[R0,#0x0] ; i2c_addr
0000001E 28A2 CMP R0,#0xA2
00000020 D107 BNE L_2 ; T=0x00000032
00000022 A802 ADD R0,R13,#0x8
00000024 7801 LDRB R1,[R0,#0x0] ; byte_data
00000026 A801 ADD R0,R13,#0x4
00000028 7800 LDRB R0,[R0,#0x0] ; byte_addr
0000002A 1C02 MOV R2,R0
0000002C 4800 LDR R0,=A2h ; A2h
0000002E 1880 ADD R0,R2 ; A2h
00000030 7001 STRB R1,[R0,#0x0]
00000032 L_2:
81: i2c_receive = i2c_addr; // set i2c device address for FlashUpdate function
00000032 A800 ADD R0,R13,#0x0
ARM COMPILER V2.32a, i2c 28/07/05 15:10:10 PAGE 4
00000034 7801 LDRB R1,[R0,#0x0] ; i2c_addr
00000036 4800 LDR R0,=i2c_receive ; i2c_receive
00000038 7001 STRB R1,[R0,#0x0] ; i2c_receive
84: if((i2c_addr==0xA2)&&((byte_addr==248)||(byte_addr==249))) SetDac(0);
0000003A A800 ADD R0,R13,#0x0
0000003C 7800 LDRB R0,[R0,#0x0] ; i2c_addr
0000003E 28A2 CMP R0,#0xA2
00000040 D10A BNE L_3 ; T=0x00000058
00000042 A801 ADD R0,R13,#0x4
00000044 7800 LDRB R0,[R0,#0x0] ; byte_addr
00000046 28F8 CMP R0,#0xF8
00000048 D003 BEQ L_4 ; T=0x00000052
0000004A A801 ADD R0,R13,#0x4
0000004C 7800 LDRB R0,[R0,#0x0] ; byte_addr
0000004E 28F9 CMP R0,#0xF9
00000050 D102 BNE L_3 ; T=0x00000058
00000052 L_4:
00000052 2000 MOV R0,#0x0
00000054 F7FF BL SetDac?T ; T=0x0001 (1)
00000056 FFD4 BL SetDac?T ; T=0x0001 (2)
00000058 L_3:
85: if((i2c_addr==0xA2)&&((byte_addr==250)||(byte_addr==251))) SetDac(1);
00000058 A800 ADD R0,R13,#0x0
0000005A 7800 LDRB R0,[R0,#0x0] ; i2c_addr
0000005C 28A2 CMP R0,#0xA2
0000005E D10A BNE L_5 ; T=0x00000076
00000060 A801 ADD R0,R13,#0x4
00000062 7800 LDRB R0,[R0,#0x0] ; byte_addr
00000064 28FA CMP R0,#0xFA
00000066 D003 BEQ L_6 ; T=0x00000070
00000068 A801 ADD R0,R13,#0x4
0000006A 7800 LDRB R0,[R0,#0x0] ; byte_addr
0000006C 28FB CMP R0,#0xFB
0000006E D102 BNE L_5 ; T=0x00000076
00000070 L_6:
00000070 2001 MOV R0,#0x1
00000072 F7FF BL SetDac?T ; T=0x0001 (1)
00000074 FFC5 BL SetDac?T ; T=0x0001 (2)
00000076 L_5:
91: if((i2c_addr==0xA0)&&(byte_addr<63)) Checksum(1);
00000076 A800 ADD R0,R13,#0x0
00000078 7800 LDRB R0,[R0,#0x0] ; i2c_addr
0000007A 28A0 CMP R0,#0xA0
0000007C D106 BNE L_7 ; T=0x0000008C
0000007E A801 ADD R0,R13,#0x4
00000080 7800 LDRB R0,[R0,#0x0] ; byte_addr
00000082 283F CMP R0,#0x3F
00000084 DA02 BGE L_7 ; T=0x0000008C
00000086 2001 MOV R0,#0x1
00000088 F7FF BL Checksum?T ; T=0x0001 (1)
0000008A FFBA BL Checksum?T ; T=0x0001 (2)
0000008C L_7:
92: if((i2c_addr==0xA0)&&(63<byte_addr)&&(byte_addr<95)) Checksum(2);
0000008C A800 ADD R0,R13,#0x0
0000008E 7800 LDRB R0,[R0,#0x0] ; i2c_addr
00000090 28A0 CMP R0,#0xA0
00000092 D10A BNE L_8 ; T=0x000000AA
00000094 A801 ADD R0,R13,#0x4
00000096 7800 LDRB R0,[R0,#0x0] ; byte_addr
00000098 283F CMP R0,#0x3F
0000009A DD06 BLE L_8 ; T=0x000000AA
0000009C A801 ADD R0,R13,#0x4
0000009E 7800 LDRB R0,[R0,#0x0] ; byte_addr
000000A0 285F CMP R0,#0x5F
000000A2 DA02 BGE L_8 ; T=0x000000AA
000000A4 2002 MOV R0,#0x2
ARM COMPILER V2.32a, i2c 28/07/05 15:10:10 PAGE 5
000000A6 F7FF BL Checksum?T ; T=0x0001 (1)
000000A8 FFAB BL Checksum?T ; T=0x0001 (2)
000000AA L_8:
93: if((i2c_addr==0xA2)&&(byte_addr<95)) Checksum(3);
000000AA A800 ADD R0,R13,#0x0
000000AC 7800 LDRB R0,[R0,#0x0] ; i2c_addr
000000AE 28A2 CMP R0,#0xA2
000000B0 D106 BNE L_9 ; T=0x000000C0
000000B2 A801 ADD R0,R13,#0x4
000000B4 7800 LDRB R0,[R0,#0x0] ; byte_addr
000000B6 285F CMP R0,#0x5F
000000B8 DA02 BGE L_9 ; T=0x000000C0
000000BA 2003 MOV R0,#0x3
000000BC F7FF BL Checksum?T ; T=0x0001 (1)
000000BE FFA0 BL Checksum?T ; T=0x0001 (2)
000000C0 L_9:
96: }
000000C0 B003 ADD R13,#0xC
000000C2 BC08 POP {R3}
000000C4 4718 BX R3
000000C6 ENDP ; 'i2c_write?T'
Module Information Static
----------------------------------
code size = ------
data size = ------
const size = ------
End of Module Information.
ARM COMPILATION COMPLETE. 0 WARNING(S), 0 ERROR(S)
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