📄 adc.lst
字号:
__start:
__text_start:
0013 E5CF LDI R28,0x5F
0014 E0D4 LDI R29,4
0015 BFCD OUT P3D,R28
0016 BFDE OUT P3E,R29
0017 51C0 SUBI R28,0x10
0018 40D0 SBCI R29,0
0019 EA0A LDI R16,0xAA
001A 8308 STD R16,0+Y
001B 2400 CLR R0
001C E6E0 LDI R30,0x60
001D E0F0 LDI R31,0
001E E010 LDI R17,0
001F 36E8 CPI R30,0x68
0020 07F1 CPC R31,R17
0021 F011 BEQ 0x0024
0022 9201 ST R0,Z+
0023 CFFB RJMP 0x001F
0024 8300 STD R16,0+Z
0025 E2E6 LDI R30,0x26
0026 E0F0 LDI R31,0
0027 E6A0 LDI R26,0x60
0028 E0B0 LDI R27,0
0029 E010 LDI R17,0
002A 32E6 CPI R30,0x26
002B 07F1 CPC R31,R17
002C F021 BEQ 0x0031
002D 95C8 LPM
002E 9631 ADIW R30,1
002F 920D ST R0,X+
0030 CFF9 RJMP 0x002A
0031 D0E2 RCALL _main
_exit:
0032 CFFF RJMP _exit
_write164:
ch --> R20
i --> R22
x --> R16
0033 D118 RCALL push_gset2
FILE: .\74164.h
(0001)
(0002) void write164(unsigned char x){
(0003) unsigned char i,ch;
(0004)
(0005) ch = x;
0034 2F40 MOV R20,R16
(0006) PORTB &= ~0x01; // 消隐
0035 98C0 CBI P18,0
(0007) PORTD &= ~0x40; // CLK
0036 9896 CBI P12,6
(0008) for(i=0; i<8; i++){
0037 2766 CLR R22
0038 C00A RJMP 0x0043
(0009) if(ch & 0x80)
0039 FF47 SBRS R20,7
003A C002 RJMP 0x003D
(0010) PORTD |= 0x80;
003B 9A97 SBI P12,7
003C C001 RJMP 0x003E
(0011) else
(0012) PORTD &= ~0x80;
003D 9897 CBI P12,7
(0013) ch <<= 1;
003E 0F44 LSL R20
(0014) PORTD |= 0x40;
003F 9A96 SBI P12,6
(0015) asm("nop");
0040 0000 NOP
(0016) PORTD &= ~0x40;
0041 9896 CBI P12,6
0042 9563 INC R22
0043 3068 CPI R22,0x8
0044 F3A0 BCS 0x0039
(0017) }
(0018) PORTB |= 0x01; // 显示
0045 9AC0 SBI P18,0
(0019) }
0046 D0EC RCALL pop_gset2
0047 9508 RET
FILE: D:\job\avrtest\web\example\ad\adc.c
(0001) //ICC-AVR application builder : 2005-3-1 22:02:29
(0002) // Target : M8
(0003) // Crystal: 8.0000Mhz
(0004)
(0005) #include <iom8v.h>
(0006) #include <macros.h>
(0007) #include <74164.h>
(0008)
(0009) unsigned char display[4]; // 显示缓冲区
(0010) unsigned char dis; // 当前显示
(0011) unsigned int adc; // 保存AD转换的值
(0012) unsigned char time; // AD转换的时间间隔
(0013)
(0014)
(0015) //TIMER0 initialisation - prescale:256
(0016) // WGM: Normal
(0017) // desired value: 5mSec
(0018) // actual value: 4.992mSec (0.2%)
(0019) void timer0_init(void)
(0020) {
(0021) TCCR0 = 0x00; //stop
_timer0_init:
0048 2422 CLR R2
0049 BE23 OUT P33,R2
(0022) TCNT0 = 0x64; //set count
004A E684 LDI R24,0x64
004B BF82 OUT P32,R24
(0023) TCCR0 = 0x04; //start timer
004C E084 LDI R24,4
004D BF83 OUT P33,R24
(0024) }
004E 9508 RET
_timer0_ovf_isr:
004F D0FF RCALL push_lset
0050 D0E4 RCALL push_gset1
(0025)
(0026) #pragma interrupt_handler timer0_ovf_isr:10
(0027) void timer0_ovf_isr(void)
(0028) {
(0029) TCNT0 = 0x64; //reload counter value
0051 E684 LDI R24,0x64
0052 BF82 OUT P32,R24
(0030) // ad
(0031) if(++time == 40){
0053 91800060 LDS R24,_time
0055 5F8F SUBI R24,0xFF
0056 2E28 MOV R2,R24
0057 92200060 STS _time,R2
0059 3288 CPI R24,0x28
005A F009 BEQ 0x005C
005B C053 RJMP 0x00AF
(0032) time = 0;
005C 2422 CLR R2
005D 92200060 STS _time,R2
(0033) ADCSR = 0xC6; // 开始转换
005F EC86 LDI R24,0xC6
0060 B986 OUT P06,R24
(0034) while(!(ADCSR & 0x10)); // 等待转换完成
0061 9B34 SBIS P06,4
0062 CFFE RJMP 0x0061
(0035) adc = ADCL;
0063 B024 IN R2,P04
0064 2433 CLR R3
0065 92300062 STS _adc+1,R3
0067 92200061 STS _adc,R2
(0036) adc |= (int)(ADCH << 8); // 注意顺序
0069 B025 IN R2,P05
006A 2433 CLR R3
006B 2C32 MOV R3,R2
006C 2422 CLR R2
006D 90400061 LDS R4,_adc
006F 90500062 LDS R5,_adc+1
0071 2842 OR R4,R2
0072 2853 OR R5,R3
0073 92500062 STS _adc+1,R5
0075 92400061 STS _adc,R4
(0037) ADCSR = 0x10; // 停止
0077 E180 LDI R24,0x10
0078 B986 OUT P06,R24
(0038) display[0] = adc%10;
0079 E02A LDI R18,0xA
007A E030 LDI R19,0
007B 0182 MOVW R16,R4
007C D09A RCALL mod16u
007D 93000064 STS _display,R16
(0039) adc = adc / 10;
007F E02A LDI R18,0xA
0080 E030 LDI R19,0
0081 91000061 LDS R16,_adc
0083 91100062 LDS R17,_adc+1
0085 D093 RCALL div16u
0086 93100062 STS _adc+1,R17
0088 93000061 STS _adc,R16
(0040) display[1] = adc%10;
008A E02A LDI R18,0xA
008B E030 LDI R19,0
008C D08A RCALL mod16u
008D 93000065 STS _display+1,R16
(0041) adc = adc / 10;
008F E02A LDI R18,0xA
0090 E030 LDI R19,0
0091 91000061 LDS R16,_adc
0093 91100062 LDS R17,_adc+1
0095 D083 RCALL div16u
0096 93100062 STS _adc+1,R17
0098 93000061 STS _adc,R16
(0042) display[2] = adc%10;
009A E02A LDI R18,0xA
009B E030 LDI R19,0
009C D07A RCALL mod16u
009D 93000066 STS _display+2,R16
(0043) adc = adc / 10;
009F E02A LDI R18,0xA
00A0 E030 LDI R19,0
00A1 91000061 LDS R16,_adc
00A3 91100062 LDS R17,_adc+1
00A5 D073 RCALL div16u
00A6 93100062 STS _adc+1,R17
00A8 93000061 STS _adc,R16
(0044) display[3] = adc%10;
00AA E02A LDI R18,0xA
00AB E030 LDI R19,0
00AC D06A RCALL mod16u
00AD 93000067 STS _display+3,R16
(0045) }
(0046) // end ad
(0047) // display
(0048) switch(dis){
00AF 91400063 LDS R20,_dis
00B1 2755 CLR R21
00B2 3040 CPI R20,0
00B3 0745 CPC R20,R21
00B4 F069 BEQ 0x00C2
00B5 3041 CPI R20,1
00B6 E0E0 LDI R30,0
00B7 075E CPC R21,R30
00B8 F0A1 BEQ 0x00CD
00B9 3042 CPI R20,2
00BA E0E0 LDI R30,0
00BB 075E CPC R21,R30
00BC F0D9 BEQ 0x00D8
00BD 3043 CPI R20,3
00BE E0E0 LDI R30,0
00BF 075E CPC R21,R30
00C0 F111 BEQ 0x00E3
00C1 C02B RJMP 0x00ED
(0049) case 0: write164(display[dis] | 0x70); break;
00C2 E684 LDI R24,0x64
00C3 E090 LDI R25,0
00C4 91E00063 LDS R30,_dis
00C6 27FF CLR R31
00C7 0FE8 ADD R30,R24
00C8 1FF9 ADC R31,R25
00C9 8100 LDD R16,0+Z
00CA 6700 ORI R16,0x70
00CB DF67 RCALL _write164
00CC C020 RJMP 0x00ED
(0050) case 1: write164(display[dis] | 0xB0); break;
00CD E684 LDI R24,0x64
00CE E090 LDI R25,0
00CF 91E00063 LDS R30,_dis
00D1 27FF CLR R31
00D2 0FE8 ADD R30,R24
00D3 1FF9 ADC R31,R25
00D4 8100 LDD R16,0+Z
00D5 6B00 ORI R16,0xB0
00D6 DF5C RCALL _write164
00D7 C015 RJMP 0x00ED
(0051) case 2: write164(display[dis] | 0xD0); break;
00D8 E684 LDI R24,0x64
00D9 E090 LDI R25,0
00DA 91E00063 LDS R30,_dis
00DC 27FF CLR R31
00DD 0FE8 ADD R30,R24
00DE 1FF9 ADC R31,R25
00DF 8100 LDD R16,0+Z
00E0 6D00 ORI R16,0xD0
00E1 DF51 RCALL _write164
00E2 C00A RJMP 0x00ED
(0052) case 3: write164(display[dis] | 0xE0); break;
00E3 E684 LDI R24,0x64
00E4 E090 LDI R25,0
00E5 91E00063 LDS R30,_dis
00E7 27FF CLR R31
00E8 0FE8 ADD R30,R24
00E9 1FF9 ADC R31,R25
00EA 8100 LDD R16,0+Z
00EB 6E00 ORI R16,0xE0
00EC DF46 RCALL _write164
(0053) }
(0054) if(++dis > 3) dis = 0;
00ED 91800063 LDS R24,_dis
00EF 5F8F SUBI R24,0xFF
00F0 2E28 MOV R2,R24
00F1 92200063 STS _dis,R2
00F3 E083 LDI R24,3
00F4 1582 CP R24,R2
00F5 F418 BCC 0x00F9
00F6 2422 CLR R2
00F7 92200063 STS _dis,R2
(0055) //end display
(0056) }
00F9 D03E RCALL pop_gset1
00FA D06B RCALL pop_lset
00FB 9518 RETI
(0057)
(0058) //ADC initialisation
(0059) // Conversion time: 13uS
(0060) void adc_init(void)
(0061) {
(0062) ADCSR = 0x00; //disable adc
_adc_init:
00FC 2422 CLR R2
00FD B826 OUT P06,R2
(0063) ADMUX = 0x00; //select adc input 0
00FE B827 OUT P07,R2
(0064) ACSR = 0x80;
00FF E880 LDI R24,0x80
0100 B988 OUT P08,R24
(0065) ADCSR = 0x83;
0101 E883 LDI R24,0x83
0102 B986 OUT P06,R24
(0066) }
0103 9508 RET
(0067)
(0068) //call this routine to initialise all peripherals
(0069) void init_devices(void)
(0070) {
(0071) //stop errant interrupts until set up
(0072) CLI(); //disable all interrupts
_init_devices:
0104 94F8 BCLR 7
(0073) DDRB = 0x01; // 初始化操作74LS164的管脚
0105 E081 LDI R24,1
0106 BB87 OUT P17,R24
(0074) DDRD = 0xC0; // 初始化操作74LS164的管脚
0107 EC80 LDI R24,0xC0
0108 BB81 OUT P11,R24
(0075) DDRC = 0x00;
0109 2422 CLR R2
010A BA24 OUT P14,R2
(0076) timer0_init();
010B DF3C RCALL _timer0_init
(0077) adc_init();
010C DFEF RCALL _adc_init
(0078)
(0079) MCUCR = 0x00;
010D 2422 CLR R2
010E BE25 OUT P35,R2
(0080) GICR = 0x00;
010F BE2B OUT P3B,R2
(0081) TIMSK = 0x01; //timer interrupt sources
0110 E081 LDI R24,1
0111 BF89 OUT P39,R24
(0082) SEI(); //re-enable interrupts
0112 9478 BSET 7
(0083) //all peripherals are now initialised
(0084) }
0113 9508 RET
(0085)
(0086) //
(0087) void main(void)
(0088) {
(0089) init_devices();
_main:
0114 DFEF RCALL _init_devices
(0090) //insert your functional code here...
(0091) while(1);
0115 CFFF RJMP 0x0115
(0092) }
FILE: <library>
0116 9508 RET
mod16u:
0117 9468 BSET 6
0118 C001 RJMP xdiv16u
div16u:
0119 94E8 BCLR 6
xdiv16u:
011A 92EA ST R14,-Y
011B 92FA ST R15,-Y
011C 938A ST R24,-Y
011D 24EE CLR R14
011E 24FF CLR R15
011F E180 LDI R24,0x10
0120 0F00 LSL R16
0121 1F11 ROL R17
0122 1CEE ROL R14
0123 1CFF ROL R15
0124 16E2 CP R14,R18
0125 06F3 CPC R15,R19
0126 F018 BCS 0x012A
0127 1AE2 SUB R14,R18
0128 0AF3 SBC R15,R19
0129 9503 INC R16
012A 958A DEC R24
012B F7A1 BNE 0x0120
012C F416 BRTC 0x012F
012D 2D0E MOV R16,R14
012E 2D1F MOV R17,R15
012F 9189 LD R24,Y+
0130 90F9 LD R15,Y+
0131 90E9 LD R14,Y+
0132 9508 RET
pop_gset2:
0133 E0E2 LDI R30,2
0134 C004 RJMP pop
push_gset1:
0135 935A ST R21,-Y
0136 934A ST R20,-Y
0137 9508 RET
pop_gset1:
0138 E0E1 LDI R30,1
pop:
0139 9149 LD R20,Y+
013A 9159 LD R21,Y+
013B FDE0 SBRC R30,0
013C 9508 RET
013D 9169 LD R22,Y+
013E 9179 LD R23,Y+
013F FDE1 SBRC R30,1
0140 9508 RET
0141 90A9 LD R10,Y+
0142 90B9 LD R11,Y+
0143 FDE2 SBRC R30,2
0144 9508 RET
0145 90C9 LD R12,Y+
0146 90D9 LD R13,Y+
0147 FDE3 SBRC R30,3
0148 9508 RET
0149 90E9 LD R14,Y+
014A 90F9 LD R15,Y+
014B 9508 RET
push_gset2:
014C 937A ST R23,-Y
014D 936A ST R22,-Y
014E CFE6 RJMP push_gset1
push_lset:
014F 93FA ST R31,-Y
0150 93EA ST R30,-Y
0151 93BA ST R27,-Y
0152 93AA ST R26,-Y
0153 939A ST R25,-Y
0154 938A ST R24,-Y
0155 933A ST R19,-Y
0156 932A ST R18,-Y
0157 931A ST R17,-Y
0158 930A ST R16,-Y
0159 929A ST R9,-Y
015A 928A ST R8,-Y
015B 927A ST R7,-Y
015C 926A ST R6,-Y
015D 925A ST R5,-Y
015E 924A ST R4,-Y
015F 923A ST R3,-Y
0160 922A ST R2,-Y
0161 921A ST R1,-Y
0162 920A ST R0,-Y
0163 B60F IN R0,P3F
0164 920A ST R0,-Y
0165 9508 RET
pop_lset:
0166 9009 LD R0,Y+
0167 BE0F OUT P3F,R0
0168 9009 LD R0,Y+
0169 9019 LD R1,Y+
016A 9029 LD R2,Y+
016B 9039 LD R3,Y+
016C 9049 LD R4,Y+
016D 9059 LD R5,Y+
016E 9069 LD R6,Y+
016F 9079 LD R7,Y+
0170 9089 LD R8,Y+
0171 9099 LD R9,Y+
0172 9109 LD R16,Y+
0173 9119 LD R17,Y+
0174 9129 LD R18,Y+
0175 9139 LD R19,Y+
0176 9189 LD R24,Y+
0177 9199 LD R25,Y+
0178 91A9 LD R26,Y+
0179 91B9 LD R27,Y+
017A 91E9 LD R30,Y+
017B 91F9 LD R31,Y+
017C 9508 RET
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