📄 test.cdb
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prop Format :: "0x%04x" prop Style :: 0x01 | 0x02 prop Label :: "PLLM - PLL Multiplier Control Register" prop JSName :: "PLLM" prop Visible :: if GBL.DSPSUBTYPE == 5502 {1} else {0} prop Writable :: self.MODIFYCLKMD prop NoGen :: 0 } global PLLDIV0 :: 32768 { prop Type :: "{3EE4CB80-E273-11d0-BB8F-0000C008F2E9}" prop Format :: "0x%04x" prop Style :: 0x01 | 0x02 prop Label :: "PLLDIV0 - PLL Divider 0 Register" prop JSName :: "PLLDIV0" prop Visible :: if GBL.DSPSUBTYPE == 5502 {1} else {0} prop Writable :: self.MODIFYCLKMD prop NoGen :: 0 } global DSPARITHMETIC :: = (if (GBL.DSPTYPE == 62 && (GBL.DSPSUBTYPE / 100) == 67) {"FLOAT"} else {"FIXED"}) { prop Type :: "{21455EA1-B96A-11cf-9BFE-0000C0AC14C7}" prop Enum :: "FIXED,FLOAT" prop Visible :: 0 prop Writable :: 0 prop NoGen :: 1 } global DSPWORDSIZE :: = (if (GBL.DSPTYPE == 30 || GBL.DSPTYPE == 40 || GBL.DSPTYPE == 62) {32} else {16}) { prop Type :: "{21455EA2-B96A-11cf-9BFE-0000C0AC14C7}" prop Label :: "DSP Word Size" prop Visible :: 0 prop Writable :: 0 prop NoGen :: 1 } global DSPCHARSIZE :: = (if GBL.DSPTYPE == 62 {8} else {GBL.DSPWORDSIZE}) { prop Type :: "{21455EA2-B96A-11cf-9BFE-0000C0AC14C7}" prop Label :: "DSP Byte Size" prop Visible :: 0 prop Writable :: 0 prop NoGen :: 1 } global DATAPTRSIZE :: = (if (GBL.DSPTYPE == 62) {32} else {if (GBL.DSPTYPE == 54) {16} else {if (GBL.DSPTYPE == 55) {if (GBL.MEMORYMODEL == "SMALL") {16} else {23}} else {if (GBL.DSPTYPE == 28) {22} else {0}}}}) { prop Type :: "{21455EA2-B96A-11cf-9BFE-0000C0AC14C7}" prop iComment :: "Size of the Data Pointer" prop Visible :: 0 prop Writable :: 0 prop NoGen :: 1 } global CODEPTRSIZE :: = (if (GBL.DSPTYPE == 62) {32} else {if (GBL.DSPTYPE == 54) {if (GBL.CALLMODEL == "near") {16} else {24}} else {if (GBL.DSPTYPE == 55) {24} else {if (GBL.DSPTYPE == 28) {22} else {0}}}}) { prop Type :: "{21455EA2-B96A-11cf-9BFE-0000C0AC14C7}" prop iComment :: "Size of Code Pointer" prop Visible :: 0 prop Writable :: 0 prop NoGen :: 1 } global MEMORYMODEL :: "LARGE" { prop Type :: "{21455EA1-B96A-11cf-9BFE-0000C0AC14C7}" prop Enum :: "SMALL,LARGE" prop Label :: "Memory Model" prop JSName :: "MEMORYMODEL" prop Visible :: 1 prop Writable :: if GBL.DSPSUBTYPE == 0x55DA200 {0} else {1} prop NoGen :: 1 prop Set :: (self.MEMORYMODEL = $1, self.CSLNAME = self.setCSLNAME(), "ok") } global AUTOINIT :: "ROM" { prop Type :: "{21455EA1-B96A-11cf-9BFE-0000C0AC14C7}" prop Enum :: "ROM,RAM" prop Label :: "C Autoinitialization Model" prop Visible :: 0 prop Writable :: 1 prop NoGen :: 1 } global USERINIT :: 0 { prop Type :: "{21455EA0-B96A-11cf-9BFE-0000C0AC14C7}" prop Label :: "Call User Init Function" prop JSName :: "CALLUSERINITFXN" prop Visible :: 1 prop Writable :: 1 prop NoGen :: 0 prop Set :: (if ($1 == 0) {self.USERINITFXN = @_FXN_F_nop, self.USERINIT = $1} else {self.USERINIT = $1}, "ok") } global USERINITFXN :: @_FXN_F_nop { prop Type :: "{7C434D00-1629-11d0-9BFE-0000C0AC14C7}" prop Label :: "User Init Function" prop JSName :: "USERINITFXN" prop Visible :: 1 prop Writable :: self.USERINIT prop NoGen :: 0 } global OLDAUTOCALCULATE :: 1 { prop Type :: "{21455EA0-B96A-11cf-9BFE-0000C0AC14C7}" prop Label :: "previous value for autocalculate" prop Visible :: 0 prop Writable :: 0 prop NoGen :: 1 } global ENABLEINST :: 1 { prop Type :: "{21455EA0-B96A-11cf-9BFE-0000C0AC14C7}" prop Label :: "Enable Real Time Analysis" prop JSName :: "ENABLEINST" prop Visible :: 1 prop Writable :: 1 prop NoGen :: 0 prop Set :: (if ($1 != self.ENABLEINST) {if ($1) {RTA_toHost.Create("HST"), RTA_fromHost.Create("HST"), RTA_dispatcher.Create("HST"), IDL_busyObj.Create("IDL"), IDL.USEIDLBUSYOBJ = 1, IDL_cpuLoad.Create("IDL"), IDL.AUTOCALCULATE = self.OLDAUTOCALCULATE} else {RTA_toHost.Delete("HST"), RTA_fromHost.Delete("HST"), RTA_dispatcher.Delete("HST"), IDL_busyObj.Delete("IDL"), IDL.USEIDLBUSYOBJ = 0, IDL_cpuLoad.Delete("IDL"), self.OLDAUTOCALCULATE = IDL.AUTOCALCULATE, IDL.AUTOCALCULATE = 0}, self.ENABLEINST = $1} , "ok") } global CGENERATE :: 1 { prop Type :: "{21455EA0-B96A-11cf-9BFE-0000C0AC14C7}" prop Label :: "Do C Generation" prop Visible :: 0 prop Writable :: 1 prop NoGen :: 1 } global LARGEMODEL :: = if self.MEMORYMODEL == "LARGE" {1} else {0} { prop Type :: "{21455EA0-B96A-11cf-9BFE-0000C0AC14C7}" prop Visible :: 0 prop Writable :: 0 prop NoGen :: 0 } global ENABLEICACHE :: 0 { prop Type :: "{21455EA0-B96A-11cf-9BFE-0000C0AC14C7}" prop Label :: "Enable I-Cache Programming" prop JSName :: "ENABLEICACHE" prop Visible :: if GBL.DSPSUBTYPE == 5561 {1} else {0} prop Writable :: 1 prop NoGen :: 0 prop Set :: (if ($1 != self.ENABLEICACHE) {self.ENABLEICACHE = $1} , "ok") } global CACHETYPE :: 2 { prop Type :: "{21455EA2-B96A-11cf-9BFE-0000C0AC14C7}" prop Style :: 0x02 prop Nogen :: 0 } global ICACHE :: "2-Way Two RAMset" { prop Type :: "{21455EA1-B96A-11cf-9BFE-0000C0AC14C7}" prop Enum :: "2-Way no RAMset,2-Way One RAMset,2-Way Two RAMset" prop Label :: "I-cache configuration" prop JSName :: "ICACHE" prop Visible :: if GBL.DSPSUBTYPE == 5561 {1} else {0} prop Writable :: if self.ENABLEICACHE == 1 {1} else {0} prop NoGen :: 1 prop Set :: (self.ICACHE = $1, if (self.ICACHE == "2-Way no RAMset") {self.CACHETYPE = 0, "ok"} else {if (self.ICACHE == "2-Way One RAMset") {self.CACHETYPE = 1, "ok"} else {self.CACHETYPE = 2, "ok"}}) } global CACHEICRTAG1 :: 16252928 { prop Type :: "{3EE4CB80-E273-11d0-BB8F-0000C008F2E9}" prop Style :: 0x20 prop Label :: "ICRTAG1 address (24bit address)" prop JSName :: "CACHEICRTAG1" prop Format :: "0x%06x" prop Visible :: if GBL.DSPSUBTYPE == 5561 {1} else {0} prop Writable :: if ((self.ICACHE != "2-Way no RAMset") && (self.ENABLEICACHE == 1)) {1} else {0} prop NoGen :: 0 } global CACHEICRTAG2 :: 16257024 { prop Type :: "{3EE4CB80-E273-11d0-BB8F-0000C008F2E9}" prop Style :: 0x20 prop Label :: "ICRTAG2 address (24bit address)" prop JSName :: "CACHEICRTAG2" prop Format :: "0x%06x" prop Visible :: if GBL.DSPSUBTYPE == 5561 {1} else {0} prop Writable :: if ((self.ICACHE == "2-Way Two RAMset") && (self.ENABLEICACHE == 1)) {1} else {0} prop NoGen :: 0 } global SUPPORTCSL :: = self.CHIPTYPE != "other" { prop Type :: "{21455EA0-B96A-11cf-9BFE-0000C0AC14C7}" prop NoGen :: 0 } global ENABLEALLTRC :: 1 { prop Type :: "{21455EA0-B96A-11cf-9BFE-0000C0AC14C7}" prop Label :: "Enable All TRC Trace Event Classes" prop JSName :: "ENABLEALLTRC" prop Visible :: 1 prop Writable :: 1 prop NoGen :: 1 prop Set :: (if ($1) {self.TRCMASKVALUE = 0xDBEF} else {self.TRCMASKVALUE = 0x4000}, self.ENABLEALLTRC = $1, "ok") } global TRCMASKVALUE :: 56303 { prop Type :: "{21455EA2-B96A-11cf-9BFE-0000C0AC14C7}" prop NoGen :: 0 } global CALLCSLCFGINIT :: = self.DISPCALLCSLCFGINIT { prop Type :: "{21455EA0-B96A-11cf-9BFE-0000C0AC14C7}" prop NoGen :: 0 } global BIOS_BOOTFXN :: @GBL_F_biosbootfxn { prop Type :: "{7C434D00-1629-11d0-9BFE-0000C0AC14C7}" prop Label :: "BIOS boot function" prop JSName :: "BIOS_BOOTFXN" prop Visible :: 0 prop Writable :: 1 prop NoGen :: 0 } global CDBPATH :: "" { prop Type :: "{21455EA3-B96A-11cf-9BFE-0000C0AC14C7}" prop Label :: "CDB search path in COFF file" prop JSName :: "CDBRELATIVEPATH" prop Visible :: 1 prop Writable :: 1 prop NoGen :: 1 }}type MEM { isa ObjectMgr prop Label :: "MEM - Memory Section Manager" prop name :: "MEM" prop DependsOn :: "SEM" prop IsContainedIn :: SYSTEM prop GlobalIcon :: 115 prop InstanceIcon :: 116 prop GlobalHelpTopic :: (108) prop InstanceHelpTopic :: (208) prop InstancePropertyPage :: ("{3D658E70-05E7-11d0-BD44-0020AFEE33C8}") prop GlobalPropertyPage :: ("{3D658E71-05E7-11d0-BD44-0020AFEE33C8}") prop _cmd55stksz :: (MEM.STACKSIZE * 2) prop _cmd55systksz :: (MEM.SYSSTACKSIZE * 2) prop _cmd55origin :: (self.base * 2) prop _cmd55len :: (self.len * 2) prop _cmd55heapsize :: (self.iHeapSize * 2) prop _cmd55heaplen :: (self.iHeapSize * 2) prop GenLinkPrologue :: (if (GBL.DSPTYPE == 55) {"-stack 0x%1x\n-sysstack 0x%2x\n\nSECTIONS { .sysstack : block(0x20000) fill = 0xfeeb {%12t\nGBL_sysstackbeg = .;\n*(.sysstack)\nGBL_sysstackend = GBL_sysstackbeg + 0x%2x -1 ;%12t\n _HWI_SYSSTKTOP = GBL_sysstackbeg; %12t\n _HWI_SYSSTKBOTTOM =(GBL_sysstackend+1);\n%8t} > %3s}%0t\n\nMEMORY {%4t\0, _cmd55stksz, _cmd55systksz, _sysstackSeg"} else {"-stack 0x%1x\nMEMORY {%4t\0, _stackSize"}) prop _stackSize :: MEM.STACKSIZE prop _sysstackSize :: MEM.SYSSTACKSIZE prop _sysstackSeg :: MEM.SYSSTACKSEG prop AllocType :: (if (self.REUSE == 0 && self.USERCMD == 0) {"19\0, _argsString, _argsSeg, _midPlace, \ _sysdataString, _sysdataSeg, _thirdPlace, \ _trcinitString, _trcinitSeg, _midPlace, \ _gblinitString, _gblinitSeg, _midPlace, \ _memObjString, _memObjSeg, _midPlace, \ _sysinitString, _initSeg, _sysinitPlace, \ _sysregsString, _regsSeg, _midPlace, \ _bssString, _bssSeg, _firstPlace, \ _farString, _farSeg, _secondPlace, \ _cinitString, _cinitSeg, _midPlace, \ _pinitString, _pinitSeg, _midPlace, \ _dataString, _dataSeg, _midPlace, \ _constString, _constSeg, _midPlace, \ _switchString, _switchSeg, _midPlace, \ _cioString, _cioSeg, _midPlace, \ _textString, _textSeg, _midPlace, \ _frtString, _frtSeg, _midPlace, \ _biosString, _biosSeg, _midPlace, \ _stackString, _stackSeg, _midPlace"} else {if (self.REUSE == 0 && self.USERCMD == 1) {"9\0, _argsString, _argsSeg, _midPlace, \ _sysdataString, _sysdataSeg, _thirdPlace, \ _trcinitString, _trcinitSeg, _midPlace, \ _gblinitString, _gblinitSeg, _midPlace, \ _memObjString, _memObjSeg, _midPlace, \ _sysinitString, _initSeg, _sysinitPlace, \ _sysregsString, _regsSeg, _midPlace, \ _biosString, _biosSeg, _midPlace, \ _stackString, _stackSeg, _midPlace"} else {if (self.REUSE == 1 && self.USERCMD == 0) {"18\0, _argsString, _argsSeg, _midPlace, \ _sysdataString, _sysdataSeg, _thirdPlace, \ _trcinitString, _trcinitSeg, _midPlace, \ _gblinitString, _gblinitSeg, _midPlace, \ _memObjString, _memObjSeg, _midPlace, \ _sysregsString, _regsSeg, _midPlace, \ _bssString, _bssSeg, _firstPlace, \ _farString, _farSeg, _secondPlace, \ _cinitString, _cinitSeg, _midPlace, \ _pinitString, _pinitSeg, _midPlace, \ _dataString, _dataSeg, _midPlace, \ _constString, _constSeg, _midPlace, \ _switchString, _switchSeg, _midPlace, \ _cioString, _cioSeg, _midPlace, \ _textString, _textSeg, _midPlace, \ _frtString, _frtSeg, _midPlace, \ _biosString, _biosSeg, _midPlace, \ _stackString, _stackSeg, _midPlace"} else {"8\0, _argsString, _argsSeg, _midPlace, \ _sysdataString, _sysdataSeg, _thirdPlace, \ _trcinitString, _trcinitSeg, _midPlace, \ _gblinitString, _gblinitSeg, _midPlace, \ _memObjString, _memObjSeg, _midPlace, \ _sysregsString, _regsSeg, _midPlace, \ _biosString, _biosSeg, _midPlace, \ _stackString, _stackSeg, _midPlace"}}}) prop _firstPlace :: 0 prop _secondPlace :: 0 + 1 prop _thirdPlace :: 0 + 2 prop _midPlace :: (0x7fffff / 2) prop _sysinitPlace :: (0x7fffff / 2) prop _argsString :: ("%8t .args: align = 0x4 fill=0 block(0x20000) {%12t\n *(.args)\n . += 0x%1x;%8t\n }\0, _argsSize") prop _bssString :: ("%8t .bss: block(0x20000) {}") prop _farString :: ("%8t .far: {}") prop _cinitString :: (if (self.ENABLELOADSEG == 1) {if (MEM.CINITSEG == MEM.LOADCINITSEG) {"%8t .cinit: block(0x20000) {}"} else {"%8t .cinit: {} load > %1s, run\0, _loadcinitSeg"}} else {"%8t .cinit: block(0x20000) {}"}) prop _pinitString :: (if (self.ENABLELOADSEG == 1) {if (MEM.PINITSEG == MEM.LOADPINITSEG) {"%8t .pinit: block(0x20000) {}"} else {"%8t .pinit: {} load > %1s, run\0, _loadpinitSeg"}} else {"%8t .pinit: block(0x20000) {}"})
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