📄 start_mx.lst
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AX51 MACRO ASSEMBLER START_MX 08/16/05 09:17:21 PAGE 1
MACRO ASSEMBLER AX51 V2.13
OBJECT MODULE PLACED IN .\START_MX.obj
ASSEMBLER INVOKED BY: C:\Keil\C51\BIN\AX51.EXE ..\ROM\START_MX.A51 MOD_MX51 SET(LARGE) DEBUG PRINT(.\START_MX.lst) OBJEC
T(.\START_MX.obj) EP
LOC OBJ LINE SOURCE
1 $mod_mx51
2 ;------------------------------------------------------------------------------
3 ; This file is part of the PK51 Professional Developers Kit
4 ; Startup Code for the Philips 80C51MX architecture
5 ; Copyright (c) 2000-2002 Keil Elektronik GmbH and Keil Software, Inc.
6 ; Version 1.02
7 ;------------------------------------------------------------------------------
8 ; START_MX.A51: This code is executed after processor reset.
9 ; You may add this file to a uVision2 project.
10 ;
11 ; To translate this file manually use AX51 with the following invocation:
12 ;
13 ; AX51 START_MX.A51
14 ;
15 ; To link the modified START_MX.OBJ file to your application use the
16 ; following LX51 invocation:
17 ;
18 ; LX51 START_MX.OBJ, <your object file list> <controls>
19 ;
20 ;------------------------------------------------------------------------------
21 ;
22 ; Setup 80C51MX Configuration Register (MXCON)
23 ;
24 ; Extended Addressing Mode (enable upper address multiplex on Port 2)
25 ; EAM Val Description
26 ; --- --- -----------
0001 27 EAM EQU 1 ; 0 = do not change configuration state of the CPU
28 ; ; 1 = enable extended addressing mode (multiplex A16..A22 on Port 2)
29 ;
30 ; Extended Stack Memory Mode (16-bit Stack Pointer)
31 ; ESMM Val Description
32 ; ---- --- -----------
0000 33 ESMM EQU 0 ; 0 = classic 8051 stack pointer (8-bit) addressing IDATA space
34 ; ; 1 = extended 16-bit stack pointer addressing EDATA space
35 ;
36 ; Extended Interrupt Frame
37 ; EIFM Val Description
38 ; -- --- -----------
0001 39 EIFM EQU 1 ; 0 = classic 8051 interrupt frame (16-bit address pushed)
40 ; ; 1 = extended 24-bit interrupt frame (3 bytes pushed on interrupt)
41 ;
42 ;
43 ;
44 ; Setup Additional Features (AUXR, AUXR1)
45 ;
46 ; XDATA access (External XDATA space)
47 ; EXTRAM Val Description
48 ; --- --- -----------
0000 49 EXTRAM EQU 0; 0 = access on-chip XDATA RAM
50 ; ; 1 = disable on-chip XDATA and access off-chip XDATA space
51 ;
52 ; ALE (Address Latch Enable) Output Signal
53 ; AO Val Description
54 ; -- --- -----------
0000 55 AO EQU 0 ; 0 = ALE signal is generate at a constant rate
56 ; ; 1 = ALE signal is active only during a MOVX or MOVC instruction
57 ;
AX51 MACRO ASSEMBLER START_MX 08/16/05 09:17:21 PAGE 2
58 ; Low Volatage (Vcc) configuration
59 ; LPEP Val Description
60 ; ---- --- -----------
0000 61 LPEP EQU 0 ; 0 = chip supply volatage (Vcc) is above 4V
62 ; ; 1 = chip supply volatage (Vcc) is below 4V
63 ;------------------------------------------------------------------------------
64 ;
65 ; CPU Stack Size Definition
66 ;
67 ; The following EQU statement defines the stack space available in extended
68 ; stack mode (ESMM set to 1) for the application program. It should be noted
69 ; that the stack space must be adjusted according the actual requirements of
70 ; the application.
71 ;
0100 72 STACKSIZE EQU 100H ; set to 100H Bytes.
73 ;
74 ;------------------------------------------------------------------------------
75 ;
76 ; User-defined Power-On Initialization of Memory
77 ;
78 ; With the following EQU statements the initialization of memory
79 ; at processor reset can be defined:
80 ;
81 ; ; the absolute start-address of IDATA memory is always 0
00FF 82 IDATALEN EQU 0FFH ; the length of IDATA memory in bytes.
83 ;
0000 84 XDATASTART EQU 0H ; the absolute start-address of XDATA memory
0000 85 XDATALEN EQU 0H ; the length of XDATA memory in bytes.
86 ;
0000 87 PDATASTART EQU 0H ; the absolute start-address of PDATA memory
0000 88 PDATALEN EQU 0H ; the length of PDATA memory in bytes.
89 ;
90 ; Notes: The IDATA space overlaps physically the DATA and BIT areas of the
91 ; 80C51MX CPU.
92 ;------------------------------------------------------------------------------
93 ;
94 ; Reentrant Stack Initilization
95 ;
96 ; The following EQU statements define the stack pointer for reentrant
97 ; functions and initialized it:
98 ;
99 ; Stack Space for reentrant functions in the SMALL model.
0000 100 IBPSTACK EQU 0 ; set to 1 if small reentrant is used.
0100 101 IBPSTACKTOP EQU 0FFH+1 ; set top of stack to highest location+1.
102 ;
103 ; Stack Space for reentrant functions in the LARGE model.
0000 104 XBPSTACK EQU 0 ; set to 1 if large reentrant is used.
00010000 105 XBPSTACKTOP EQU 0FFFFH+1; set top of stack to highest location+1.
106 ;
107 ; Stack Space for reentrant functions in the COMPACT model.
0000 108 PBPSTACK EQU 0 ; set to 1 if compact reentrant is used.
00010000 109 PBPSTACKTOP EQU 0FFFFH+1; set top of stack to highest location+1.
110 ;
111 ;------------------------------------------------------------------------------
112 ;
113 ; Page Definition for Using the Compact Model with 64 KByte xdata RAM
114 ;
115 ; The following EQU statements define the xdata page used for pdata
116 ; variables. The EQU PPAGE must conform with the PPAGE control used
117 ; in the linker invocation.
118 ;
0000 119 PPAGEENABLE EQU 0 ; set to 1 if pdata object are used.
0000 120 PPAGE EQU 0 ; define PPAGE number.
121 ;
122 ;------------------------------------------------------------------------------
123
AX51 MACRO ASSEMBLER START_MX 08/16/05 09:17:21 PAGE 3
124 ; Define CPU Symbols
0081 125 sfr SP = 0x81;
01FB 126 sfr SPE = 0x1FB;
008E 127 sfr AUXR = 0x8E;
00A2 128 sfr AUXR1 = 0xA2;
01FF 129 sfr MXCON = 0x1FF;
130
131 NAME ?C_STARTUP
132
------ 133 ?C_C51STARTUP SEGMENT CODE
134
135 IF ESMM == 1
?STACK SEGMENT EDATA
RSEG ?STACK
DS STACKSIZE ; Stack Space 100H Bytes
ELSE
142
------ 143 ?STACK SEGMENT IDATA
------ 144 RSEG ?STACK
000000 145 DS 1
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