madev_initial.c.bak

YAMAHA的铃音芯片的测试程序

		/* set DP0 bit of REG_ID #5 power management (D) setting register to '1' */
		machdep_WriteStatusFlagReg( MA_POWER_MANAGEMENT_DIGITAL_REG );
		machdep_WriteDataReg( MA_DP3 | MA_DP2 | MA_DP1 | MA_DP0 );
		
		/* set Analog volume */
		machdep_WriteStatusFlagReg( MA_BASIC_SETTING_REG );               /* Bank #0 */
	  machdep_WriteDataReg( 0x00 );
    
    machdep_WriteStatusFlagReg( MA_ANALOG_EQVOL_REG );                /* set EQ volume */
    machdep_WriteDataReg( (UINT8)(MA_MUTE & 0x1F) );
    
    machdep_WriteStatusFlagReg( MA_ANALOG_HPVOL_L_REG );              /* set Headphone volume */
    machdep_WriteDataReg( (UINT8)((MA_MONO<<7) | (MA_MUTE&0x1F)) );
    machdep_WriteStatusFlagReg( MA_ANALOG_HPVOL_R_REG );
    machdep_WriteDataReg( (UINT8)(MA_MUTE & 0x1F) );

		/* enable interrupt */
		machdep_WriteStatusFlagReg( 0x80 );

		break;
		
	case 3:


		/* set BANK bits of REG_ID #4 basic setting register to '0' */
		machdep_WriteStatusFlagReg( MA_BASIC_SETTING_REG );
		machdep_WriteDataReg( 0x00 );

		/* set DP0 bit of REG_ID #5 power management (D) setting register to '0' */
		machdep_WriteStatusFlagReg( MA_POWER_MANAGEMENT_DIGITAL_REG );
		machdep_WriteDataReg( MA_DP3 | MA_DP2 | MA_DP1 );

		/* set AP0 and PLLPD bits of REG_ID #6 power management (A) setting register to '0' */
		machdep_WriteStatusFlagReg( MA_POWER_MANAGEMENT_ANALOG_REG );
		machdep_WriteDataReg( MA_AP4R | MA_AP4L | MA_AP3 | MA_AP2 | MA_AP1 );

		/* wait 10ms */
		machdep_Wait( 10 * 1000 * 1000 );

		/* set DP1 bit of REG_ID #5 power management (D) setting register to '0' */
		machdep_WriteStatusFlagReg( MA_POWER_MANAGEMENT_DIGITAL_REG );
		machdep_WriteDataReg( MA_DP3 | MA_DP2 );

		/* set DP2 bit of REG_ID #5 power management (D) setting register to '0' */
		machdep_WriteDataReg( MA_DP3 );

		/* set DP3 bit of REG_ID #5 power management (D) setting register to '0' */
		machdep_WriteDataReg( 0x00 );

		/* set AP1, AP3 and AP4 bits of REG_ID #6 power management (A) setting register to '0' */
		machdep_WriteStatusFlagReg( MA_POWER_MANAGEMENT_ANALOG_REG );
		machdep_WriteDataReg( MA_AP2 );

		/* wait 10us */
		machdep_Wait( 10 * 1000 );
		
		/* set AP2 bit of REG_ID #6 power management (A) setting register to '0' */
		machdep_WriteDataReg( 0x00 );
		
		/* set Analog volume */
		machdep_WriteStatusFlagReg( MA_BASIC_SETTING_REG );               /* Bank #0 */
	  machdep_WriteDataReg( 0x00 );
    
    machdep_WriteStatusFlagReg( MA_ANALOG_EQVOL_REG );                /* set EQ volume */
    machdep_WriteDataReg( (UINT8)(MA_ANALOG_VOL & 0x1F) );
    
    machdep_WriteStatusFlagReg( MA_ANALOG_HPVOL_L_REG );              /* set Headphone volume */
    machdep_WriteDataReg( (UINT8)((MA_MONO<<7) | (MA_ANALOG_VOL&0x1F)) );
    machdep_WriteStatusFlagReg( MA_ANALOG_HPVOL_R_REG );
    machdep_WriteDataReg( (UINT8)(MA_ANALOG_VOL & 0x1F) );

		/* enable interrupt */
		machdep_WriteStatusFlagReg( 0x80 );
	
		break;

	default:
		break;
	}

	return result;
}


/*********************************************************************/
/* Function Group Name : Verify_Reg                                  */
/* Description  :     used for Hardware Initialize verify(above)     */
/* Member function :  MaDevDrv_ReceiveData, MaDevDrv_VerifyRegisters */
/* Note         :     Verify Reg contain                             */
/*                    #144~#159 chvol    0x60 (-4.34dB)              */
/*                    #160~#175 panpot   0x3C (Lch=Rch=-3.010dB)     */
/*                    #330~#337 WT_PG    0x40 (DONE=1,PG=0)          */
/*********************************************************************/

SINT32 MaDevDrv_ReceiveData
(
	UINT32	address,			/* address of register */
	UINT8	buffer_address		/* address of read buffer */
)
{
	UINT8	i;
	UINT8	packet_buffer[4];
	UINT8	valid_rx;
	UINT8	read_data;
	SINT32	result;
	
	machdep_WriteStatusFlagReg( MA_IMMEDIATE_READ_REG );
			
	packet_buffer[0] = (UINT8)( (address  ) & 0x7F );	
	packet_buffer[1] = (UINT8)( (address >> 7) | 0x80 );
	
	packet_buffer[2] = (UINT8)( 0x80 | buffer_address );

	result = machdep_WaitImmediateFifoEmpty();
	if ( result != MASMW_SUCCESS )
	{
		machdep_WriteStatusFlagReg( 0x80 );
		return result;
	}

	for ( i = 0; i <= 2; i++ )
	{
		machdep_WriteDataReg( packet_buffer[i] );
	}

	valid_rx = (UINT8)(1 << (MA_VALID_RX + buffer_address));
	
	result = machdep_WaitValidData( valid_rx );
	if ( result != MASMW_SUCCESS )
	{
		machdep_WriteStatusFlagReg( 0x80 );
		return result;
	}

	machdep_WriteStatusFlagReg( (UINT8)(valid_rx | (buffer_address + 1)) );
	
	read_data = machdep_ReadDataReg();

	machdep_WriteStatusFlagReg( 0x80 );

	return (SINT32)read_data;
}


SINT32 MaDevDrv_VerifyRegisters(void)
{
	UINT32	reg_adrs;					/* register address */
	UINT32	count;						/* loop count */
	UINT8	data;						/* read data */

 
	/* Verify the channel volume value to 0x60 */
	reg_adrs = (UINT32)MA_CHANNEL_VOLUME;
	for ( count = 0; count < 16; count++ )
	{
		data = (UINT8)MaDevDrv_ReceiveData( (UINT32)(reg_adrs + count), 2 );
		if ( data != 0x60 )
		{
			return MASMW_ERROR;
		}
	}

	/* Verify the panpot value to 0x3C */
	reg_adrs = (UINT32)MA_CHANNEL_PANPOT;
	for ( count = 0; count < 16; count++ )
	{
		data = (UINT8)MaDevDrv_ReceiveData( (UINT32)(reg_adrs + count), 2 );
		if ( data != 0x3C )
		{
			return MASMW_ERROR;
		}
	}

	/* Verify the WT position value to 0x40 */
	reg_adrs = (UINT32)MA_WT_PG;
	for ( count = 0; count < 8; count++ )
	{
		data = (UINT8)MaDevDrv_ReceiveData( (UINT32)(reg_adrs + count), 2 );
		if ( data != 0x40 )
		{
			return MASMW_ERROR;
		}
	}
	
	return MASMW_SUCCESS;
}

/******************************************************************/
/* Function Name : MaDevDrv_SetSmoothVol                          */
/* Description   : set Control Reg #355                           */
/*                 the interpolated step for Mute, Chvol, Panpot  */
/******************************************************************/

void MaDevDrv_SetSmoothVol( UINT8 para1, UINT8 para2, UINT8 para3 )
{
	UINT8 packet[3];
	UINT8 data;
	 
	packet[0] = 0x63;    /* MA_SMOOTH_VOL (355) */
	packet[1] = 0x82;
	packet[2] = (UINT8)( 0x80 | (para1<<4) | (para2<<2) | para3 );
	
	MaDevDrv_SendDirectPacket( packet, 3 );
	
	data = (UINT8)MaDevDrv_ReceiveData( (UINT32)(MA_SMOOTH_VOL), 2 );
	printf_uart2("\nMA-3 smooth vol = %x", data);
}			

/**********************************************************************/
/* Function Name : MaDevDrv_Initialize                                */
/* Description   : Initialize the Intermediate Reg and control Reg    */
/**********************************************************************/

SINT32 MaDevDrv_Initialize( void )
{

	SINT32	result;						/* result of function */


	/* Set the PLL. */
	MaDevDrv_PLLSetting();

	/* Disable power down mode. */
	result = MaDevDrv_PowerManagement( 1 );
	if ( result != MASMW_SUCCESS )
	{
		return result;
	}

	/* Set volume mode (maximum change-step) */
	MaDevDrv_SetSmoothVol( 0x03, 0x03, 0x03 );

	return MASMW_SUCCESS;
}