omap_mpu_addr.h

YAMAHA的铃音芯片的测试程序

//* ******************************************************************/
// FUNCTION                                                         */
//   OMAP_MPU_Addr.h                                               */
//DESCRIPTION                                                      */
//   Define OMAP1612 MPU and peripheral registers' addresses       */
//AUTHOR                                                           */
//   LinFeng    XuPing                                             */
//******************************************************************/


//////////////////*/
// DPLL registers */
//////////////////*/
#define DPLL1_CTL_REG                 *((volatile unsigned short *)(0xFFFECF00))
#define DPLL2_CTL_REG                 *((volatile unsigned short *)(0xFFFED000))


/////////////////////////////////////////////////////*/
// MPU clock generation and system control registers */
/////////////////////////////////////////////////////*/
#define ARM_CKCTL                     *((volatile unsigned short *)(0xFFFECE00))
#define ARM_IDLECT1                   *((volatile unsigned short *)(0xFFFECE04))
#define ARM_IDLECT2                   *((volatile unsigned short *)(0xFFFECE08))
#define ARM_EWUPCT                    *((volatile unsigned short *)(0xFFFECE0C))
#define ARM_RSTCT1                    *((volatile unsigned short *)(0xFFFECE10))
#define ARM_RSTCT2                    *((volatile unsigned short *)(0xFFFECE14))
#define ARM_SYSST                     *((volatile unsigned short *)(0xFFFECE18))
#define ARM_CKOUT1                    *((volatile unsigned short *)(0xFFFECE1C))
#define ARM_CKOUT2                    *((volatile unsigned short *)(0xFFFECE20))
#define ARM_IDLECT3                   *((volatile unsigned short *)(0xFFFECE24))


//////////////////////////*/
// DSP control registers  */
//////////////////////////*/
#define DSP_CKCTL                     *((volatile unsigned short *)(0xE1008000))
#define DSP_IDLECT1                   *((volatile unsigned short *)(0xE1008004))
#define DSP_IDLECT2                   *((volatile unsigned short *)(0xE1008008))
#define DSP_EWUPCT                    *((volatile unsigned short *)(0xE100800C))
#define DSP_RSTCT1                    *((volatile unsigned short *)(0xE1008010))
#define DSP_RSTCT2                    *((volatile unsigned short *)(0xE1008014))
#define DSP_SYSST                     *((volatile unsigned short *)(0xE1008018))
#define DSP_CKOUT1                    *((volatile unsigned short *)(0xE100801C))
#define DSP_CKOUT2                    *((volatile unsigned short *)(0xE1008020))


//////////////////*/
//EMIFS Registers */
//////////////////*/
#define  EMIFS_PRIOR                  *((volatile unsigned long *) (0xFFFECC04))
#define  EMIFS_CONFIG                 *((volatile unsigned long *) (0xFFFECC0C))
#define  EMIFS_CCS0  		              *((volatile unsigned long *) (0xFFFECC10))
#define  EMIFS_CCS1  		              *((volatile unsigned long *) (0xFFFECC14))
#define  EMIFS_CCS2   		            *((volatile unsigned long *) (0xFFFECC18))
#define  EMIFS_CCS3  		              *((volatile unsigned long *) (0xFFFECC1C))
#define  EMIFS_PTOR1                  *((volatile unsigned long *) (0xFFFECC28))
#define  EMIFS_PTOR2                  *((volatile unsigned long *) (0xFFFECC2C))
#define  EMIFS_PTOR3                  *((volatile unsigned long *) (0xFFFECC30))
#define  EMIFS_DWS                    *((volatile unsigned long *) (0xFFFECC40))
#define  EMIFS_AADDR                  *((volatile unsigned long *) (0xFFFECC44))
#define  EMIFS_ATYPER                 *((volatile unsigned long *) (0xFFFECC48))
#define  EMIFS_ATOR                   *((volatile unsigned long *) (0xFFFECC4C))
#define  EMIFS_ACS0                   *((volatile unsigned long *) (0xFFFECC50))
#define  EMIFS_ACS1                   *((volatile unsigned long *) (0xFFFECC54))
#define  EMIFS_ACS2                   *((volatile unsigned long *) (0xFFFECC58))
#define  EMIFS_ACS3                   *((volatile unsigned long *) (0xFFFECC5C))


//////////////////*/
//EMIFF Registers */
//////////////////*/
#define  EMIFF_PRIOR                  *((volatile unsigned long *) (0xFFFECC08))
#define  EMIFF_CONFIG                 *((volatile unsigned long *) (0xFFFECC20))
#define  EMIFF_MRS                    *((volatile unsigned long *) (0xFFFECC24))
#define  EMIFF_CONFIG2                *((volatile unsigned long *) (0xFFFECC3C))
#define  EMIFF_DLL_WRD_CTRL           *((volatile unsigned long *) (0xFFFECC64))
#define  EMIFF_DLL_WRD_STAT           *((volatile unsigned long *) (0xFFFECC68))
#define  EMIFF_MRS_NEW                *((volatile unsigned long *) (0xFFFECC70))
#define  EMIFF_EMRS0                  *((volatile unsigned long *) (0xFFFECC74))
#define  EMIFF_EMRS1                  *((volatile unsigned long *) (0xFFFECC78))
#define  EMIFF_OP                     *((volatile unsigned long *) (0xFFFECC80))
#define  EMIFF_CMD                    *((volatile unsigned long *) (0xFFFECC84))
#define  EMIFF_PTOR1                  *((volatile unsigned long *) (0xFFFECC8C))
#define  EMIFF_PTOR2                  *((volatile unsigned long *) (0xFFFECC90))
#define  EMIFF_PTOR3                  *((volatile unsigned long *) (0xFFFECC94))
#define  EMIFF_AADDR                  *((volatile unsigned long *) (0xFFFECC98))
#define  EMIFF_ATYPER                 *((volatile unsigned long *) (0xFFFECC9C))
#define  EMIFF_DLL_LRD_STAT           *((volatile unsigned long *) (0xFFFECCBC))
#define  EMIFF_DLL_URD_CTRL           *((volatile unsigned long *) (0xFFFECCC0))
#define  EMIFF_DLL_LRD_CTRL           *((volatile unsigned long *) (0xFFFECCCC))


//////////////////////////*/
// MPU OS Timer Registers */
//////////////////////////*/
// Timer 1*/
#define MPU_CNTL_TIMER1  		          *((volatile unsigned long *)(0xFFFEC500))
#define MPU_LOAD_TIMER1    		        *((volatile unsigned long *)(0xFFFEC504))
#define MPU_READ_TIMER1    		        *((volatile unsigned long *)(0xFFFEC508))

// Timer 2 */
#define MPU_CNTL_TIMER2   		        *((volatile unsigned long *)(0xFFFEC600))
#define MPU_LOAD_TIMER2     		      *((volatile unsigned long *)(0xFFFEC604))
#define MPU_READ_TIMER2     		      *((volatile unsigned long *)(0xFFFEC608))
                     
// Timer 3 */ 
#define MPU_CNTL_TIMER3   		        *((volatile unsigned long *)(0xFFFEC700))
#define MPU_LOAD_TIMER3     		      *((volatile unsigned long *)(0xFFFEC704))
#define MPU_READ_TIMER3     		      *((volatile unsigned long *)(0xFFFEC708))


/////////////////////////////////*/
// OMAP Watchdog Timer Registers */
/////////////////////////////////*/
#define OMAP_WATCHDOG_CNTL_TIMER_WD     		   *((volatile unsigned long *)(0xFFFEC800))
#define OMAP_WATCHDOG_LOAD_TIM_WD       		   *((volatile unsigned long *)(0xFFFEC804))