m128asm.h

AVR单片机的一个免费的开发环境.开发语言为GCC.

#define	CTC31	 4		// OBSOLETE! Use WGM33
#define	CTC30	 3		// OBSOLETE! Use WGM32
#define	WGM33	 4
#define	WGM32	 3
#define	CS32	 2
#define	CS31	 1
#define	CS30	 0

#define	FOC3A	 7		// TCCR3C
#define	FOC3B	 6
#define	FOC3C	 5

//**** Watchdog Timer ****
#define	WDCE	 4		// WDTCR
#define	WDTOE	 4		// For Mega103 compability
#define	WDE	 3
#define	WDP2	 2
#define	WDP1	 1
#define	WDP0	 0

//**** EEPROM  Control Register ****
#define	EERIE	 3		// EECR
#define	EEMWE	 2
#define	EEWE	 1
#define	EERE	 0

//**** USART 0 and USART 1 ****
#define	RXC	 7		// (UCSRA0/1)
#define	TXC	 6
#define	UDRE	 5
#define	FE	 4
#define	DOR	 3
#define	PE	 2		// OBSOLETED!
#define	U2X	 1
#define	MPCM	 0

#define	RXC0	 7		// (UCSR0A)
#define	TXC0	 6
#define	UDRE0	 5
#define	FE0	 4
#define	DOR0	 3
#define	UPE0	 2
#define	U2X0	 1
#define	MPCM0	 0

#define	RXC1	 7		// (UCSR1A)
#define	TXC1	 6
#define	UDRE1	 5
#define	FE1	 4
#define	DOR1	 3
#define	UPE1	 2
#define	U2X1	 1
#define	MPCM1	 0

#define	RXCIE	 7		// (UCSRB0/1)
#define	TXCIE	 6
#define	UDRIE	 5
#define	RXEN	 4
#define	TXEN	 3
#define	UCSZ2	 2
#define	RXB8	 1
#define	TXB8	 0

#define	RXCIE0	 7		// (UCSR0B)
#define	TXCIE0	 6
#define	UDRIE0	 5
#define	RXEN0	 4
#define	TXEN0	 3
#define	UCSZ02	 2
#define	RXB80	 1
#define	TXB80	 0

#define	RXCIE1	 7		// (UCSR1B)
#define	TXCIE1	 6
#define	UDRIE1	 5
#define	RXEN1	 4
#define	TXEN1	 3
#define	UCSZ12	 2
#define	RXB81	 1
#define	TXB81	 0

#define	UMSEL	 6		// (UCSRC0/1)
#define	UPM1	 5
#define	UPM0	 4
#define	USBS	 3
#define	UCSZ1	 2
#define	UCSZ0	 1
#define	UCPOL	 0

#define	UMSEL0	 6		// (UCSR0C)
#define	UPM01	 5
#define	UPM00	 4
#define	USBS0	 3
#define	UCSZ01	 2
#define	UCSZ00	 1
#define	UCPOL0	 0

#define	UMSEL1	 6		// (UCSR1C)
#define	UPM11	 5
#define	UPM10	 4
#define	USBS1	 3
#define	UCSZ11	 2
#define	UCSZ10	 1
#define	UCPOL1	 0

	
//**** SPI ****
#define	SPIE	 7		// SPCR
#define	SPE	 6
#define	DORD	 5
#define	MSTR	 4
#define	CPOL	 3
#define	CPHA	 2
#define	SPR1	 1
#define	SPR0	 0

#define	SPIF	 7		// SPSR
#define	WCOL	 6
#define	SPI2X	 0

//**** TWI ****	
#define	TWINT	 7		//TWCR
#define	TWEA	 6
#define	TWSTA	 5
#define	TWSTO	 4
#define	TWWC	 3
#define    TWEN     2
#define	TWIE	 0

#define	TWS7	 7		// TWSR
#define	TWS6	 6
#define	TWS5	 5
#define	TWS4	 4
#define	TWS3	 3
#define	TWPS1	 1
#define	TWPS0	 0

#define	TWA6	 7
#define	TWA5	 6
#define	TWA4	 5
#define	TWA3	 4
#define	TWA2	 3
#define	TWA1	 2
#define	TWA0	 1
#define	TWGCE	 0		// TWAR

		
//**** PORT A ****
#define	PA7	 7		// PORTA
#define	PA6	 6
#define	PA5	 5
#define	PA4	 4
#define	PA3	 3
#define	PA2	 2
#define	PA1	 1
#define	PA0	 0
#define	PORTA7	 7
#define	PORTA6	 6
#define	PORTA5	 5
#define	PORTA4	 4
#define	PORTA3	 3
#define	PORTA2	 2
#define	PORTA1	 1
#define	PORTA0	 0

#define	DDA7	 7		// DDRA
#define	DDA6	 6
#define	DDA5	 5
#define	DDA4	 4
#define	DDA3	 3
#define	DDA2	 2
#define	DDA1	 1
#define	DDA0	 0

#define	PINA7	 7		// PINA
#define	PINA6	 6
#define	PINA5	 5
#define	PINA4	 4
#define	PINA3	 3
#define	PINA2	 2
#define	PINA1	 1
#define	PINA0	 0

//**** PORT B ****
#define	PB7	 7		// PORTB
#define	PB6	 6
#define	PB5	 5
#define	PB4	 4
#define	PB3	 3
#define	PB2	 2
#define	PB1	 1
#define	PB0	 0
#define	PORTB7	 7
#define	PORTB6	 6
#define	PORTB5	 5
#define	PORTB4	 4
#define	PORTB3	 3
#define	PORTB2	 2
#define	PORTB1	 1
#define	PORTB0	 0

#define	DDB7	 7		// DDRB
#define	DDB6	 6
#define	DDB5	 5
#define	DDB4	 4
#define	DDB3	 3
#define	DDB2	 2
#define	DDB1	 1
#define	DDB0	 0

#define	PINB7	 7		// PINB
#define	PINB6	 6
#define	PINB5	 5
#define	PINB4	 4
#define	PINB3	 3
#define	PINB2	 2
#define	PINB1	 1
#define	PINB0	 0

//**** PORT C ****
#define	PC7	 7		// PORTC
#define	PC6	 6
#define	PC5	 5
#define	PC4	 4
#define	PC3	 3
#define	PC2	 2
#define	PC1	 1
#define	PC0	 0
#define	PORTC7	 7
#define	PORTC6	 6
#define	PORTC5	 5
#define	PORTC4	 4
#define	PORTC3	 3
#define	PORTC2	 2
#define	PORTC1	 1
#define	PORTC0	 0

#define	DDC7	 7		// DDRC
#define	DDC6	 6
#define	DDC5	 5
#define	DDC4	 4
#define	DDC3	 3
#define	DDC2	 2
#define	DDC1	 1
#define	DDC0	 0

#define	PINC7	 7		// PINC
#define	PINC6	 6
#define	PINC5	 5
#define	PINC4	 4
#define	PINC3	 3
#define	PINC2	 2
#define	PINC1	 1
#define	PINC0	 0

//**** PORT D ****
#define	PD7	 7		// PORTD
#define	PD6	 6
#define	PD5	 5
#define	PD4	 4
#define	PD3	 3
#define	PD2	 2
#define	PD1	 1
#define	PD0	 0
#define	PORTD7	 7
#define	PORTD6	 6
#define	PORTD5	 5
#define	PORTD4	 4
#define	PORTD3	 3
#define	PORTD2	 2
#define	PORTD1	 1
#define	PORTD0	 0

#define	DDD7	 7		// DDRD
#define	DDD6	 6
#define	DDD5	 5
#define	DDD4	 4
#define	DDD3	 3
#define	DDD2	 2
#define	DDD1	 1
#define	DDD0	 0

#define	PIND7	 7		// PIND
#define	PIND6	 6
#define	PIND5	 5
#define	PIND4	 4
#define	PIND3	 3
#define	PIND2	 2
#define	PIND1	 1
#define	PIND0	 0

//**** PORT E ****
#define	PE7	 7		// PORTE
#define	PE6	 6
#define	PE5	 5
#define	PE4	 4
#define	PE3	 3
#define	PE2	 2
#define	PE1	 1
#define	PE0	 0
#define	PORTE7	 7		// PORTE
#define	PORTE6	 6
#define	PORTE5	 5
#define	PORTE4	 4
#define	PORTE3	 3
#define	PORTE2	 2
#define	PORTE1	 1
#define	PORTE0	 0

#define	DDE7	 7		// DDRE
#define	DDE6	 6
#define	DDE5	 5
#define	DDE4	 4
#define	DDE3	 3
#define	DDE2	 2
#define	DDE1	 1
#define	DDE0	 0

#define	PINE7	 7		// PINE
#define	PINE6	 6
#define	PINE5	 5
#define	PINE4	 4
#define	PINE3	 3
#define	PINE2	 2
#define	PINE1	 1
#define	PINE0	 0

//**** PORT F ****
#define	PF7	 7		// PORTF
#define	PF6	 6
#define	PF5	 5
#define	PF4	 4
#define	PF3	 3
#define	PF2	 2
#define	PF1	 1
#define	PF0	 0
#define	PORTF7	 7
#define	PORTF6	 6
#define	PORTF5	 5
#define	PORTF4	 4
#define	PORTF3	 3
#define	PORTF2	 2
#define	PORTF1	 1
#define	PORTF0	 0

#define	DDF7	 7		// DDRF
#define	DDF6	 6
#define	DDF5	 5
#define	DDF4	 4
#define	DDF3	 3
#define	DDF2	 2
#define	DDF1	 1
#define	DDF0	 0

#define	PINF7	 7		// PINF
#define	PINF6	 6
#define	PINF5	 5
#define	PINF4	 4
#define	PINF3	 3
#define	PINF2	 2
#define	PINF1	 1
#define	PINF0	 0

//**** PORT G ****
#define	PG4	 4		// PORTG
#define	PG3	 3
#define	PG2	 2
#define	PG1	 1
#define	PG0	 0

#define	DDG4	 4		// DDRG
#define	DDG3	 3
#define	DDG2	 2
#define	DDG1	 1
#define	DDG0	 0

#define	PING4	 4		// PING
#define	PING3	 3
#define	PING2	 2
#define	PING1	 1
#define	PING0	 0

//*****************************************************************************
// CPU Register Declarations
//*****************************************************************************

#define	XL	 r26		// X pointer low
#define	XH	 r27		// X pointer high
#define	YL	 r28		// Y pointer low
#define	YH	 r29		// Y pointer high
#define	ZL	 r30		// Z pointer low
#define	ZH	 r31		// Z pointer high
#define	RAMPZ 0x3B