📄 m128asm.h
字号:
//***************************************************************************
//* A P P L I C A T I O N N O T E F O R T H E A V R F A M I L Y
//*
//* Number : AVR000
//* File Name : "m128def.inc"
//* Title : Register/Bit Definitions for the ATmega128
//* Date : 07.09.2001
//* Version : 1.0
//* Support telephone : +47 72 88 43 88 (ATMEL Norway)
//* Support fax : +47 72 88 43 99 (ATMEL Norway)
//* Support E-mail : avr@atmel.no
//* Target MCU : ATmega128
//*
//* DESCRIPTION
//* When including this file in the assembly program file, all I/O register
//* names and I/O register bit names appearing in the data book can be used.
//* In addition, the six registers forming the three data pointers X, Y and
//* Z have been assigned names XL - ZH. Highest RAM address for Internal
//* SRAM is also defined
//*
//* The Register names are represented by their hexadecimal address.
//*
//* The Register Bit names are represented by their bit number (0-7).
//*
//* Please observe the difference in using the bit names with instructions
//* such as "sbr"/"cbr" (set/clear bit in register) and "sbrs"/"sbrc"
//* (skip if bit in register set/cleared). The following example illustrates
//* this:
//*
//* in r16,PORTB //read PORTB latch
//* sbr r16,(1<<PB6)+(1<<PB5) //set PB6 and PB5 (use masks, not bit#)
//* out PORTB,r16 //output to PORTB
//*
//* in r16,TIFR //read the Timer Interrupt Flag Register
//* sbrc r16,TOV0 //test the overflow flag (use bit#)
//* rjmp TOV0_is_set //jump if set
//* ... //otherwise do something else
//***************************************************************************
//**** Specify Device ****
//.device ATmega128
//*****************************************************************************
// I/O Register Definitions
//*****************************************************************************
//**** Memory Mapped I/O Register Definitions ($FF-$60) ****
#define UCSR1C 0x9D
#define UDR1 0x9C
#define UCSR1A 0x9B
#define UCSR1B 0x9A
#define UBRR1L 0x99
#define UBRR1H 0x98
#define UCSR0C 0x95
#define UBRR0H 0x90
#define TCCR3C 0x8C
#define TCCR3A 0x8B
#define TCCR3B 0x8A
#define TCNT3H 0x89
#define TCNT3L 0x88
#define OCR3AH 0x87
#define OCR3AL 0x86
#define OCR3BH 0x85
#define OCR3BL 0x84
#define OCR3CH 0x83
#define OCR3CL 0x82
#define ICR3H 0x81
#define ICR3L 0x80
#define ETIMSK 0x7D
#define ETIFR 0x7C
#define TCCR1C 0x7A
#define OCR1CH 0x79
#define OCR1CL 0x78
#define TWCR 0x74
#define TWDR 0x73
#define TWAR 0x72
#define TWSR 0x71
#define TWBR 0x70
#define OSCCAL 0x6F
#define XMCRA 0x6D
#define XMCRB 0x6C
#define EICRA 0x6A
#define SPMCSR 0x68
#define SPMCR 0x68 // old name for SPMCSR
#define PORTG 0x65
#define DDRG 0x64
#define PING 0x63
#define PORTF 0x62
#define DDRF 0x61
//**** I/O Register Definitions ($3F-$00) ****
#define SREG 0x3F
#define SPH 0x3E
#define SPL 0x3D
#define XDIV 0x3C
#define RAMPZ 0x3B
#define EICRB 0x3A
#define EIMSK 0x39
#define GIMSK 0x39 // old name for EIMSK
#define GICR 0x39 // old name for EIMSK
#define EIFR 0x38
#define GIFR 0x38 // old name for EIFR
#define TIMSK 0x37
#define TIFR 0x36
#define MCUCR 0x35
#define MCUCSR 0x34
#define TCCR0 0x33
#define TCNT0 0x32
#define OCR0 0x31
#define ASSR 0x30
#define TCCR1A 0x2F
#define TCCR1B 0x2E
#define TCNT1H 0x2D
#define TCNT1L 0x2C
#define OCR1AH 0x2B
#define OCR1AL 0x2A
#define OCR1BH 0x29
#define OCR1BL 0x28
#define ICR1H 0x27
#define ICR1L 0x26
#define TCCR2 0x25
#define TCNT2 0x24
#define OCR2 0x23
#define OCDR 0x22 // New
#define WDTCR 0x21
#define SFIOR 0x20 // New
#define EEARH 0x1F
#define EEARL 0x1E
#define EEDR 0x1D
#define EECR 0x1C
#define PORTA 0x1B
#define DDRA 0x1A
#define PINA 0x19
#define PORTB 0x18
#define DDRB 0x17
#define PINB 0x16
#define PORTC 0x15
#define DDRC 0x14 // New
#define PINC 0x13 // New
#define PORTD 0x12
#define DDRD 0x11
#define PIND 0x10
#define SPDR 0x0F
#define SPSR 0x0E
#define SPCR 0x0D
#define UDR0 0x0C
#define UCSR0A 0x0B
#define UCSR0B 0x0A
#define UBRR0L 0x09
#define ACSR 0x08
#define ADMUX 0x07
#define ADCSR 0x06
#define ADCH 0x05
#define ADCL 0x04
#define PORTE 0x03
#define DDRE 0x02
#define PINE 0x01
#define PINF 0x00
//*****************************************************************************
// Bit Definitions
//*****************************************************************************
//**** MCU Control ****
#define SRE 7 // MCUCR
#define SRW10 6
#define SE 5
#define SM1 4
#define SM0 3
#define SM2 2
#define IVSEL 1
#define IVCE 0
#define JTD 7 // MCUCSR
#define JTRF 4
#define WDRF 3
#define BORF 2
#define EXTRF 1
#define PORF 0
#define SRL2 6 // XMCRA
#define SRL1 5
#define SRL0 4
#define SRW01 3
#define SRW00 2
#define SRW11 1
#define XMBK 7 // XMCRB
#define XMM2 2
#define XMM1 1
#define XMM0 0
#define SPMIE 7 // SPMCSR
#define ASB 6 // backwards compatiblity
#define ASRE 4 // backwards compatiblity
#define RWWSB 6
#define RWWSRE 4
#define BLBSET 3
#define PGWRT 2
#define PGERS 1
#define SPMEN 0
#define IDRD 7 // OCDR
#define OCDR6 6
#define OCDR5 5
#define OCDR4 4
#define OCDR3 3
#define OCDR2 2
#define OCDR1 1
#define OCDR0 0
#define XDIVEN 7 // XDIV
#define XDIV6 6
#define XDIV5 5
#define XDIV4 4
#define XDIV3 3
#define XDIV2 2
#define XDIV1 1
#define XDIV0 0
#define TSM 7 // SFIOR
#define ADHSM 4
#define ACME 3
#define PUD 2
#define PSR0 1
#define PSR1 0
#define PSR2 0
#define PSR3 0
#define PSR321 0
//**** Analog to Digital Converter ****
#define ADEN 7 // ADCSR
#define ADSC 6
#define ADFR 5
#define ADIF 4
#define ADIE 3
#define ADPS2 2
#define ADPS1 1
#define ADPS0 0
#define REFS1 7 // ADMUX
#define REFS0 6
#define ADLAR 5
#define MUX4 4
#define MUX3 3
#define MUX2 2
#define MUX1 1
#define MUX0 0
//**** Analog Comparator ****
#define ACD 7 // ACSR
#define ACBG 6
#define ACO 5
#define ACI 4
#define ACIE 3
#define ACIC 2
#define ACIS1 1
#define ACIS0 0
//**** External Interrupts ****
#define INT7 7 // EIMSK
#define INT6 6
#define INT5 5
#define INT4 4
#define INT3 3
#define INT2 2
#define INT1 1
#define INT0 0
#define INTF7 7 // EIFR
#define INTF6 6
#define INTF5 5
#define INTF4 4
#define INTF3 3
#define INTF2 2
#define INTF1 1
#define INTF0 0
#define ISC71 7 // EICRB
#define ISC70 6
#define ISC61 5
#define ISC60 4
#define ISC51 3
#define ISC50 2
#define ISC41 1
#define ISC40 0
#define ISC31 7 // EICRA
#define ISC30 6
#define ISC21 5
#define ISC20 4
#define ISC11 3
#define ISC10 2
#define ISC01 1
#define ISC00 0
//**** Timer Interrupts ****
#define OCIE2 7 // TIMSK
#define TOIE2 6
#define TICIE1 5
#define OCIE1A 4
#define OCIE1B 3
#define TOIE1 2
#define OCIE0 1
#define TOIE0 0
#define TICIE3 5 // ETIMSK
#define OCIE3A 4
#define OCIE3B 3
#define TOIE3 2
#define OCIE3C 1
#define OCIE1C 0
#define OCF2 7 // TIFR
#define TOV2 6
#define ICF1 5
#define OCF1A 4
#define OCF1B 3
#define TOV1 2
#define OCF0 1
#define TOV0 0
#define ICF3 5 // ETIFR
#define OCF3A 4
#define OCF3B 3
#define TOV3 2
#define OCF3C 1
#define OCF1C 0
//**** Asynchronous Timer ****
#define AS0 3 // ASSR
#define TCN0UB 2
#define OCR0UB 1
#define TCR0UB 0
//**** Timer 0 ****
#define FOC0 7 // TCCR0
#define WGM00 6
#define COM01 5
#define COM00 4
#define WGM01 3
#define CS02 2
#define CS01 1
#define CS00 0
//**** Timer 1 ****
#define COM1A1 7 // TCCR1A
#define COM1A0 6
#define COM1B1 5
#define COM1B0 4
#define COM1C1 3
#define COM1C0 2
#define PWM11 1 // OBSOLETE! Use WGM11
#define PWM10 0 // OBSOLETE! Use WGM10
#define WGM11 1
#define WGM10 0
#define ICNC1 7 // TCCR1B
#define ICES1 6
#define CTC11 4 // OBSOLETE! Use WGM13
#define CTC10 3 // OBSOLETE! Use WGM12
#define WGM13 4
#define WGM12 3
#define CS12 2
#define CS11 1
#define CS10 0
#define FOC1A 7 // TCCR1C
#define FOC1B 6
#define FOC1C 5
//**** Timer 2 ****
#define FOC2 7 // TCCR2
#define WGM20 6
#define COM21 5
#define COM20 4
#define WGM21 3
#define CS22 2
#define CS21 1
#define CS20 0
//**** Timer 3 ****
#define COM3A1 7 // TCCR3A
#define COM3A0 6
#define COM3B1 5
#define COM3B0 4
#define COM3C1 3
#define COM3C0 2
#define PWM31 1 // OBSOLETE! Use WGM31
#define PWM30 0 // OBSOLETE! Use WGM30
#define WGM31 1
#define WGM30 0
#define ICNC3 7 // TCCR3B
#define ICES3 6
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -