📄 os_cpu_a.lst
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113 0000000E ; Note(s) : 1) This function triggers a PendSV exception
(essentially, causes a context switch) to cause
114 0000000E ; the first task to start.
115 0000000E ;
116 0000000E ; 2) OSStartHighRdy() MUST:
117 0000000E ; a) Setup PendSV exception priority to low
est;
118 0000000E ; b) Set initial PSP to 0, to tell context
switcher this is first run;
119 0000000E ; c) Set OSRunning to TRUE;
120 0000000E ; d) Trigger PendSV exception;
ARM Macro Assembler Page 4
121 0000000E ; e) Enable interrupts (tasks will run with
interrupts enabled).
122 0000000E ;*******************************************************
**************************************************
123 0000000E
124 0000000E OSStartHighRdy
125 0000000E 4824 LDR R0, =NVIC_SYSPRI2 ; Set the Pen
dSV exception prior
ity
126 00000010 F04F 01FF LDR R1, =NVIC_PENDSV_PRI
127 00000014 7001 STRB R1, [R0]
128 00000016
129 00000016
130 00000016 2000 MOVS R0, #0 ; Set the PSP to 0
for initial context
switch call
131 00000018 F380 8809 MSR PSP, R0
132 0000001C
133 0000001C 481D LDR R0, __OS_Running
; OSRunning = TRUE
134 0000001E 2101 MOVS R1, #1
135 00000020 7001 STRB R1, [R0]
136 00000022
137 00000022 4820 LDR R0, =NVIC_INT_CTRL ; Trigger th
e PendSV exception
(causes context swi
tch)
138 00000024 F04F 5180 LDR R1, =NVIC_PENDSVSET
139 00000028 6001 STR R1, [R0]
140 0000002A
141 0000002A B662 CPSIE I ;开总中断
; Enable
interrupts at proce
ssor level
142 0000002C
143 0000002C OSStartHang
144 0000002C E7FE B OSStartHang ; Should never get
here
145 0000002E
146 0000002E
147 0000002E ;*******************************************************
**************************************************
148 0000002E ; PERFORM A CONTEXT SWITCH
(From task level)
149 0000002E ; void OSCtxSw
(void)
150 0000002E ;
151 0000002E ; Note(s) : 1) OSCtxSw() is called when OS wants to perf
orm a task context switch. This function
152 0000002E ; triggers the PendSV exception which is wh
ere the real work is done.
153 0000002E ;*******************************************************
**************************************************
154 0000002E
155 0000002E OSCtxSw ;悬起PSV异常
156 0000002E ;PUSH {R0, R1} ;自己添加的代码
157 0000002E 481D LDR R0, =NVIC_INT_CTRL ; Trigger th
e PendSV exception
ARM Macro Assembler Page 5
(causes context swi
tch)
158 00000030 F04F 5180 LDR R1, =NVIC_PENDSVSET
159 00000034 6001 STR R1, [R0]
160 00000036 ;POP {R0, R1} ;自己添加的代码
161 00000036 4770 BX LR
162 00000038
163 00000038 ;*******************************************************
**************************************************
164 00000038 ; PERFORM A CONTEXT SWITCH (
From interrupt level)
165 00000038 ; void OSIntCtxS
w(void)
166 00000038 ;
167 00000038 ; Notes: 1) OSIntCtxSw() is called by OSIntExit() whe
n it determines a context switch is needed as
168 00000038 ; the result of an interrupt. This functio
n simply triggers a PendSV exception which will
169 00000038 ; be handled when there are no more interru
pts active and interrupts are enabled.
170 00000038 ;*******************************************************
**************************************************
171 00000038
172 00000038 OSIntCtxSw ;悬起PSV异常
173 00000038 ;PUSH {R0, R1} ;自己添加的代码
174 00000038 481A LDR R0, =NVIC_INT_CTRL ; Trigger th
e PendSV exception
(causes context swi
tch)
175 0000003A F04F 5180 LDR R1, =NVIC_PENDSVSET
176 0000003E 6001 STR R1, [R0]
177 00000040 ;POP {R0, R1} ;自己添加的代码
178 00000040 4770 BX LR
179 00000042
180 00000042 ;*******************************************************
**************************************************
181 00000042 ; HANDLE PendSV
EXCEPTION
182 00000042 ; void OSPend
SV(void)
183 00000042 ;
184 00000042 ; Note(s) : 1) OSPendSV is used to cause a context switc
h. This is a recommended method for performing
185 00000042 ; context switches with Cortex-M3. This is
because the Cortex-M3 auto-saves half of the
186 00000042 ; processor context on any exception, and r
estores same on return from exception. So only
187 00000042 ; saving of R4-R11 is required and fixing u
p the stack pointers. Using the PendSV exception
188 00000042 ; this way means that context saving and re
storing is identical whether it is initiated from
189 00000042 ; a thread or occurs due to an interrupt or
exception.
190 00000042 ;
191 00000042 ; 2) Pseudo-code is:
192 00000042 ; a) Get the process SP, if 0 then skip (go
to d) the saving part (first context switch);
193 00000042 ; b) Save remaining regs r4-r11 on process
stack;
ARM Macro Assembler Page 6
194 00000042 ; c) Save the process SP in its TCB, OSTCBC
ur->OSTCBStkPtr = SP;
195 00000042 ; d) Call OSTaskSwHook();
196 00000042 ; e) Get current high priority, OSPrioCur =
OSPrioHighRdy;
197 00000042 ; f) Get current ready thread TCB, OSTCBCur
= OSTCBHighRdy;
198 00000042 ; g) Get new process SP from TCB, SP = OSTC
BHighRdy->OSTCBStkPtr;
199 00000042 ; h) Restore R4-R11 from new process stack;
200 00000042 ; i) Perform exception return which will re
store remaining context.
201 00000042 ;
202 00000042 ; 3) On entry into OSPendSV handler:
203 00000042 ; a) The following have been saved on the p
rocess stack (by processor):
204 00000042 ; xPSR, PC, LR, R12, R0-R3
205 00000042 ; b) Processor mode is switched to Handler
mode (from Thread mode)
206 00000042 ; c) Stack is Main stack (switched from Pro
cess stack)
207 00000042 ; d) OSTCBCur points to the OS_TCB of
the task to suspend
208 00000042 ; OSTCBHighRdy points to the OS_TCB of
the task to resume
209 00000042 ;
210 00000042 ; 4) Since OSPendSV is set to lowest priority
in the system (by OSStartHighRdy() above), we
211 00000042 ; know that it will only be run when no oth
er exception or interrupt is active, and
212 00000042 ; therefore safe to assume that context bei
ng switched out was using the process stack (PSP).
213 00000042 ;*******************************************************
**************************************************
214 00000042 ;Cortex-M3进入异常服务例程时,自动压栈了R0-R3,R12,LR(R14,
连接寄存器),PSR(程序状态寄存器)和PC(R15).并且在返回时自⌨️ 快捷键说明
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