cc303.h

linux平台上的开放源代码的网络摄像机程序.实现视频捕捉,传输以及云台控制等.非常具有参考价值.

/*
 * 05.03.2002 changing for revA, got rid of "USEIRQ"
 * 03.19.2002 Started support for different sensors
 * 02.02.2002 Added table for ZR flip-hor correction
 */
#ifndef _CMOSCAM_H
#define _CMOSCAM_H
//#define MD(x) printk("%s:%d:",__FILE__,__LINE__);x
#define MD(x)

#ifdef	CONFIG_ETRAX_303
// Defines for rev0 camera

/* #define CCAM__RA__FIFO	0 */
#define CCAM__RA__SR	1
#define CCAM__RA__SEQA	2
/* #define CCAM__RA__INTA	3 */

#define CCAM_SR__VACT	7
#define CCAM_SR__HACT	6
#define CCAM_SR__BPF	5
#define CCAM_SR__XTRIG	4
#define CCAM_SR__SCL1	3
#define CCAM_SR__SDA1	2
#define CCAM_SR__SCL0	1
#define CCAM_SR__SDA0	0

/* peripherial write addresses (relative to csp0, in long words) */
#define CCAM_WA_WCTL	   	1
 /* write control register - 32 */
#define CCAM_WA_SEQSTOP		2
 /* sequencer stop			- 0	*/
#define CCAM_WA_SEQSTART    3
 /* sequencer start			- 0 */
#define CCAM_WA_SEQINCRA    4
 /* sequencer inc RA		- 0 */
#define CCAM_WA_SEQINCRAF   5
 /* sequencer inc RA, force - 0	*/
#define CCAM_WA_SEQWRRA	    6
 /* sequencer write RA (and seq/int WA) - 6 */
#define CCAM_WA_SEQWRRAF    7
 /* sequencer write RA (and seq/int WA), force - 6*/
#define CCAM_WA_RRFLG	   11
 /* reset 2 "was reset" flags - 0 */
#define CCAM_WA_SEQWRD	   12
 /* sequencer write data, inc WA -18 */
#define CCAM_WA_INTWRWV	   13
 /* write interrupt vector, inc WA - 8 */
#define CCAM_WA_WWA		   14
 /* seq/int write WA - 6 (3) */

/* control register fields */
#define	CCAM__BLKSZ__BITNM		 0
#define	CCAM__BLKSZ__WIDTH		 6
#define	CCAM__DMA_EN__BITNM		 6
#define	CCAM__DMA_EN__WIDTH		 1
#define	CCAM__BPX_EN__BITNM		 7
#define	CCAM__BPX_EN__WIDTH		 1
#define	CCAM__XT_POL__BITNM		 8
#define	CCAM__XT_POL__WIDTH		 1
#define	CCAM__ARST__BITNM		 9
#define	CCAM__ARST__WIDTH		 1
#define	CCAM__ARO__BITNM		10
#define	CCAM__ARO__WIDTH		 1
#define	CCAM__EXP__BITNM		11
#define	CCAM__EXP__WIDTH		 1
#define	CCAM__EXPPOL__BITNM		12
#define	CCAM__EXPPOL__WIDTH		 1
#define	CCAM__MRST__BITNM		13
#define	CCAM__MRST__WIDTH		 1
#define	CCAM__XRST__BITNM		14
#define	CCAM__XRST__WIDTH		 1
#define	CCAM__SCL0__BITNM		15
#define	CCAM__SCL0__WIDTH		 1
#define	CCAM__SCL0_EN__BITNM	16
#define	CCAM__SCL0_EN__WIDTH	 1
#define	CCAM__SDA0__BITNM		17
#define	CCAM__SDA0__WIDTH		 1
#define	CCAM__SDA0_EN__BITNM	18
#define	CCAM__SDA0_EN__WIDTH	 1
#define	CCAM__SCL1__BITNM		19
#define	CCAM__SCL1__WIDTH		 1
#define	CCAM__SCL1_EN__BITNM	20
#define	CCAM__SCL1_EN__WIDTH	 1
#define	CCAM__SDA1__BITNM		21
#define	CCAM__SDA1__WIDTH		 1
#define	CCAM__SDA1_EN__BITNM	22
#define	CCAM__SDA1_EN__WIDTH	 1
#define	CCAM__SOFTRST__BITNM	23
#define	CCAM__SOFTRST__WIDTH	 1
#define	CCAM__INT_M__BITNM		24
#define	CCAM__INT_M__WIDTH		 8

#else
// Defines for revA/M camera
#define CCAM__RA__SR	1
#define CCAM__RA__SEQA	2

#define CCAM_SR__VACT	7
#define CCAM_SR__HACT	6
#define CCAM_SR__BPF	5
#define CCAM_SR__XTRIG	4
#define CCAM_SR__SCL1	3
#define CCAM_SR__SDA1	2
#define CCAM_SR__SCL0	1
#define CCAM_SR__SDA0	0


/* peripherial write addresses (relative to csp0, in long words) */
#define CCAM_WA_WCTL	   	1
 /* write control register - 32 */
#define CCAM_WA_SEQSTOP		2
 /* sequencer stop			- 0	*/
#define CCAM_WA_SEQSTART    3
 /* sequencer start			- 0 */
#define CCAM_WA_INTMASK     4
 /* write interrupt mask    - 8 */
#define CCAM_WA_WBLKSZ	    5
 /* write dma block size    - 6 */
#define CCAM_WA_RSLEN	    6
 /* write rolling shutter acquisition length, mode, enable    - 22 */
#define CCAM_WA_RRFLG 	    7
 /* reset 2 "was reset" flags - 0 */
#define CCAM_WA_SEQINCRA    8
 /* sequencer inc RA		- 0 */
#define CCAM_WA_SEQINCRAF   9
 /* sequencer inc RA, force - 0	*/
#define CCAM_WA_SEQWRRA	   10
 /* sequencer write RA (and seq/int WA, encoder WA) - 7 */
#define CCAM_WA_SEQWRRAF   11
 /* sequencer write RA (and seq/int WA), force - 7*/
#define CCAM_WA_WWA		   12
 /* seq/int write WA - 7 (6,3) */
#define CCAM_WA_SEQWRD	   13
 /* sequencer write data, inc WA -18 */
#define CCAM_WA_INTWRWV	   14
 /* write interrupt vector, inc WA - 8 */
#define CCAM_WA_ENCOD	   15
 /* write 8->4 encoder data, inc WA - 25 (24:16, 11:0) */

/* control register fields */
#define	CCAM__SHFT__BITNM		 0
#define	CCAM__SHFT__WIDTH		 2
#define	CCAM__DEPTH__BITNM		 2
#define	CCAM__DEPTH__WIDTH		 2
#define	CCAM__COLOR__BITNM		 4
#define	CCAM__COLOR__WIDTH		 1
#define	CCAM__AUXCM__BITNM		 5
#define	CCAM__AUXCM__WIDTH		 2


#define	CCAM__BPX_EN__BITNM		 7
#define	CCAM__BPX_EN__WIDTH		 1
#define	CCAM__XT_POL__BITNM		 8
#define	CCAM__XT_POL__WIDTH		 1
#define	CCAM__ARST__BITNM		 9
#define	CCAM__ARST__WIDTH		 1
#define	CCAM__ARO__BITNM		10
#define	CCAM__ARO__WIDTH		 1
#define	CCAM__EXP__BITNM		11
#define	CCAM__EXP__WIDTH		 1
#define	CCAM__EXPPOL__BITNM		12
#define	CCAM__EXPPOL__WIDTH		 1
#define	CCAM__MRST__BITNM		13
#define	CCAM__MRST__WIDTH		 1
#define	CCAM__XRST__BITNM		14
#define	CCAM__XRST__WIDTH		 1
#define	CCAM__SCL0__BITNM		15
#define	CCAM__SCL0__WIDTH		 1
#define	CCAM__SCL0_EN__BITNM	16
#define	CCAM__SCL0_EN__WIDTH	 1
#define	CCAM__SDA0__BITNM		17
#define	CCAM__SDA0__WIDTH		 1
#define	CCAM__SDA0_EN__BITNM	18
#define	CCAM__SDA0_EN__WIDTH	 1
#define	CCAM__SCL1__BITNM		19
#define	CCAM__SCL1__WIDTH		 1
#define	CCAM__SCL1_EN__BITNM	20
#define	CCAM__SCL1_EN__WIDTH	 1
#define	CCAM__SDA1__BITNM		21
#define	CCAM__SDA1__WIDTH		 1
#define	CCAM__SDA1_EN__BITNM	22
#define	CCAM__SDA1_EN__WIDTH	 1
#define	CCAM__SOFTRST__BITNM	23
#define	CCAM__SOFTRST__WIDTH	 1

#define	CCAM__CLKDIV__BITNM		24
#define	CCAM__CLKDIV__WIDTH		 7
#define	CCAM__CLKEN__BITNM		31
#define	CCAM__CLKEN__WIDTH		 1

#endif
// Defines for both revisions
/*static unsigned long ccam_cr_shadow=0;*/
#define CCAM_SR(x) ((port_csp0_addr[CCAM__RA__SR] >> CCAM_SR__##x ) & 1)
#define CCAM_SEQ_BEFORE_TRIGER (port_csp0_addr[CCAM__RA__SEQA] & 0x20)
#define CCAM_MASK(x)	((       (1 << CCAM__##x##__WIDTH)-1)  << CCAM__##x##__BITNM)
#define CCAM_BITS(x,y)	(((y) & ((1 << CCAM__##x##__WIDTH)-1)) << CCAM__##x##__BITNM)
#define CCAM_SETFIELD(x,y) ccamCRAndOr(~(((1 << CCAM__##x##__WIDTH)-1)  << CCAM__##x##__BITNM) ,\
 (((y) & ((1 << CCAM__##x##__WIDTH)-1)) << CCAM__##x##__BITNM) )


#endif


unsigned char get_sensor_i2c_regs(int n);
unsigned long get_imageParamsR   (int n);
unsigned long get_imageParamsW   (int n);
unsigned char get_sensor_i2c_addr(void);
void set_sensor_i2c_regs(int n, unsigned char d);
void set_imageParamsR   (int n, unsigned long d);
void set_imageParamsW   (int n, unsigned long d);
void set_sensor_i2c_addr(       unsigned char d);

void ccamCRAnd(unsigned long d);
void ccamCROr(unsigned long d);
void ccamCRXor(unsigned long d);
void ccamCRAndOr(unsigned long d_and, unsigned long d_or);
unsigned long ccamGetCR(void);

void writeSensorDefaults(unsigned long * data, int count);
int writeSensorReg(unsigned char ra, unsigned char rd, int uncond);
int readSensorReg(unsigned char ra, int mode); //  mode=0 - shadow, 1 - actual register



// #define ccam_window_valid  imageParamsR[P_DMA_VALID]	/* window parameters valid                  */
//#define ccam_window_width  imageParamsR[P_ACTUAL_WIDTH]	/* pixels/row                               */
// #define ccam_window_height imageParamsR[P_ACTUAL_HEIGHT]	/* pixels/column                            */
//#define ccamLongsPerRow    imageParamsR[P_LPR]	/* 32-bit words per row (aligned each row)  */
//#define ccamImgSize        imageParamsR[P_IMAGE_SIZE]	/* total image size (dma data) in bytes     */