abb.c

是一个手机功能的模拟程序

  ABB_SetPage(PAGE0);

  // This transmission disables MADC,AFC,VDL,VUL modules.
  ABB_WriteRegister(TOGBR1, 0x0155);  

  #if (ANALOG == 1)
    // This transmission disables Band gap fast mode Enable BB charge.
    ABB_WriteRegister(VRPCCTL2, 0x1fc);  

    /* *********** DC/DC enabling selection ************************************************************** */
    // This transmission changes the register page in OMEGA for usp to pg1.
    ABB_SetPage(PAGE1);

    /* Insert here accesses to modify DC/DC parameters. Default is a switching frequency of 240 Khz */
    {
      SYS_UWORD8 vrpcctrl3_data;

      #if (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11)
        vrpcctrl3_data = 0x007d;  // core voltage 1.4V for C035
      #else
        vrpcctrl3_data = 0x00bd;  // core voltage 1.8V for C05
      #endif

    if(modules & DCDC)    // check if the DCDC is enabled
    {  
       vrpcctrl3_data |= 0x0002; // set DCDCEN
    }  
       
    // This access disables the DCDC.
    ABB_WriteRegister(VRPCCTRL3, vrpcctrl3_data);  
    }  

    /* ************************  SELECTION OF TEST MODE FOR ABB **************************************** */
    /* This test configuration allows visibility on BULENA,BULON,BDLON,BDLENA on test pins               */
    /* ***************************************************************************************************/
    #if (BOARD==6)&& (ANALOG==1)  //BUG01967 to remove access to TAPCTRL   (EVA4 board and Nausica)                                                                 
      // This transmission enables Omega test register.
      ABB_WriteRegister(TAPCTRL, 0x01);  

      // This transmission select Omega test instruction.
      ABB_WriteRegister(TAPREG, TSPTEST1);  

      // This transmission disables Omega test register.
      ABB_WriteRegister(TAPCTRL, 0x00);  
    #endif
    /* *************************************************************************************************** */

    if (!bRecoveryFlag)    // Check recovery status from L1, prevent G23 SIM issue
    {
      // This transmission changes SIM power supply to 3 volts.
      ABB_WriteRegister(VRPCCTRL1, 0x45);  
    }

    ABB_SetPage(PAGE0);

    // This transmission enables selected OMEGA modules.
    ABB_WriteRegister(TOGBR1, (modules & ~DCDC) >> 6);  
  
    if(modules & MADC)   // check if the ADC is enabled
    {  
      // This transmission connects the resistive divider to MB and BB.
      ABB_WriteRegister(BCICTL1, 0x0005);  
    }
  #elif ((ANALOG == 2) || (ANALOG == 3)) 
    // Restore the ABB checks and debouncing if start on TESTRESETZ 

    // This transmission changes the register page in the ABB for usp to pg1.
    ABB_SetPage(PAGE1);

    // This transmission sets the AFCCK to CKIN/2.
    ABB_WriteRegister(AFCCTLADD, 0x01);  
    
    // This transmission enables the tapreg.
    ABB_WriteRegister(TAPCTRL, 0x01);  

    // This transmission enables access to page 2.
    ABB_WriteRegister(TAPREG, 0x01b);  

    // This transmission changes the register page in the ABB for usp to pg2.
    ABB_SetPage(PAGE2);

    #if (ANALOG == 2)
    // Restore push button environment
    ABB_WriteRegister(0x1E, 0x07);

    #elif (ANALOG == 3)
    // Restore default for BG behavior in sleep mode
    ABB_WriteRegister(VRPCAUX, 0xBF);  

    // Restore default for deboucing length
    ABB_WriteRegister(VRPCLDO, 0x00F);  

    // Restore default for INT1 generation, wait time in switch on, checks in switch on
    ABB_WriteRegister(VRPCABBTST, 0x0002);  

    // Initialize transmit register
    // Syren Like mode : No BDL filter reset
    ABB_WriteRegister(BBCFG, C_BBCFG);  
    #endif

    // This transmission changes the register page in the ABB for usp to pg1.
    ABB_SetPage(PAGE1);

    // This transmission sets tapinst to id code.
    ABB_WriteRegister(TAPREG, 0x0001);  

    // This transmission disables TAPREG access.
    ABB_WriteRegister(TAPCTRL, 0x00);  

    // enable BB battery charge BCICONF register, enable test mode to track BDLEN and BULEN windows
    // This transmission enables BB charge and BB bridge connection for BB measurements.
    ABB_WriteRegister(BCICONF, 0x060);  

    /* ************************  SELECTION OF TEST MODE FOR ABB ******************************************/
    /* This test configuration allows visibility on test pins  TAPCTRL has not to be reset                */
    /* ****************************************************************************************************/
                                    
    // This transmission enables the tapreg.
    ABB_WriteRegister(TAPCTRL, 0x01);  

    // This transmission select ABB test instruction.
    ABB_WriteRegister(TAPREG, TSPEN);  

    // This transmission changes the register page in ABB for usp to pg0.
    ABB_SetPage(PAGE0);

    // This transmission enables selected ABB modules.
    ABB_WriteRegister(TOGBR1, modules >> 6);  

    // enable MB & BB resistive bridges for measurements
    if(modules & MADC)       // check if the ADC is enabled
    {  
      // This transmission connects the resistive divider to MB and BB.
      ABB_WriteRegister(BCICTL1, 0x0001);  
    }

    /********* Sleep definition part ******************/
    // This transmission changes the register page in the ABB for usp to pg1.
    ABB_SetPage(PAGE1);

    // update the Delay needed by the ABB before going in deep sleep, and clear previous delay value.
    reg = ABB_ReadRegister(VRPCCFG) & 0x1e0;

    ABB_WriteRegister(VRPCCFG, (SLPDLY | reg));  

    // update the ABB mask sleep register (regulator disabled in deep sleep), and clear previous mask value.
#if (ANALOG == 2)
    reg = ABB_ReadRegister(VRPCMSK) & 0x1e0;
    ABB_WriteRegister(VRPCMSK, (MASK_SLEEP_MODE | reg));  
#elif (ANALOG == 3)
    reg = ABB_ReadRegister(VRPCMSKSLP) & 0x1e0;
    ABB_WriteRegister(VRPCMSKSLP, (MASK_SLEEP_MODE | reg));  
#endif

    //  This transmission changes the register page in the ABB for usp to pg0.
    ABB_SetPage(PAGE0);
  #endif 

  // SW workaround for initialization of the audio parts of the ABB to avoid white noise 
  // C.f. BUG1941
  // Set VDLR and VULR bits
  // Write TOGBR1 register
  // This transmission enables selected ABB modules.
  ABB_WriteRegister(TOGBR1, 0x0A);  
  
  // wait for 1 ms
  wait_ARM_cycles(convert_nanosec_to_cycles(1000000));
  
  // Reset VDLS and VULS bits
  // Write TOGBR1 register
  // This transmission enables selected ABB modules.
  ABB_WriteRegister(TOGBR1, 0x05);  
  
  #if (ABB_SEMAPHORE_PROTECTION == 3)  
  // release the semaphore only if it has correctly been created.
  if(&abb_sem != 0)
  {
    NU_Release_Semaphore(&abb_sem);
  }
  #endif  // ABB_SEMAPHORE_PROTECTION   

  // Stop the SPI clock 
  #ifdef SPI_CLK_LOW_POWER
    SPI_CLK_DISABLE
  #endif
}



/*-----------------------------------------------------------------------*/
/* ABB_Read_ADC()                                                        */
/*                                                                       */    
/* This function manages all the spi serial transfer to read all the     */
/* ABB ADC conversion channels.                                          */
/* Stores the result in Buff parameter.                                  */ 
/*                                                                       */ 
/*-----------------------------------------------------------------------*/    
void ABB_Read_ADC(SYS_UWORD16 *Buff)
{
  volatile SYS_UWORD16 status;

  // Start spi clock, mask IT for RD and WR and read SPI_REG_STATUS to reset the RE and WE flags.   
  SPI_Ready_for_RDWR
  status = * (volatile SYS_UWORD16 *) SPI_REG_STATUS; 

  #if (ABB_SEMAPHORE_PROTECTION == 3)  

  // check if the semaphore has been correctly created and try to obtain it.
  // if the semaphore cannot be obtained, the task is suspended and then resumed 
  // as soon as the semaphore is released.
  if(&abb_sem != 0)
  {
    NU_Obtain_Semaphore(&abb_sem, NU_SUSPEND);
  }
  #endif  // ABB_SEMAPHORE_PROTECTION   

  // This transmission changes the register page in the ABB for usp to pg0.
  ABB_SetPage(PAGE0);

  /* Read all ABB ADC registers */
  *Buff++ = ABB_ReadRegister(VBATREG);
  *Buff++ = ABB_ReadRegister(VCHGREG);
  *Buff++ = ABB_ReadRegister(ICHGREG);
  *Buff++ = ABB_ReadRegister(VBKPREG);
  *Buff++ = ABB_ReadRegister(ADIN1REG);
  *Buff++ = ABB_ReadRegister(ADIN2REG);
  *Buff++ = ABB_ReadRegister(ADIN3REG);

  #if (ANALOG ==1)
    *Buff++ = ABB_ReadRegister(ADIN4XREG);
    *Buff++ = ABB_ReadRegister(ADIN5YREG);
  #elif (ANALOG ==2)
    *Buff++ = ABB_ReadRegister(ADIN4REG);
   #elif (ANALOG == 3)
    *Buff++ = ABB_ReadRegister(ADIN4REG);
    *Buff++ = ABB_ReadRegister(ADIN5REG);
  #endif   // ANALOG

  #if (ABB_SEMAPHORE_PROTECTION == 3)  
  // release the semaphore only if it has correctly been created.
  if(&abb_sem != 0)
  {
    NU_Release_Semaphore(&abb_sem);
  }
  #endif  // ABB_SEMAPHORE_PROTECTION   

  // Stop the SPI clock
  #ifdef SPI_CLK_LOW_POWER
    SPI_CLK_DISABLE
  #endif
}



/*-----------------------------------------------------------------------*/
/* ABB_Conf_ADC()                                                        */
/*                                                                       */    
/* This function manages all the spi serial transfer to:                 */
/*  - select the ABB ADC channels to be converted                        */
/*  - enable/disable EOC interrupt                                       */ 
/*                                                                       */ 
/*-----------------------------------------------------------------------*/ 
void ABB_Conf_ADC(SYS_UWORD16 Channels, SYS_UWORD16 ItVal)                              
{
  volatile SYS_UWORD16 status;
  SYS_UWORD16 reg_val;

  // Start spi clock, mask IT for RD and WR and read SPI_REG_STATUS to reset the RE and WE flags.   
  SPI_Ready_for_RDWR
  status = * (volatile SYS_UWORD16 *) SPI_REG_STATUS; 

  #if (ABB_SEMAPHORE_PROTECTION == 3)  

  // check if the semaphore has been correctly created and try to obtain it.
  // if the semaphore cannot be obtained, the task is suspended and then resumed 
  // as soon as the semaphore is released.
  if(&abb_sem != 0)
  {
    NU_Obtain_Semaphore(&abb_sem, NU_SUSPEND);
  }
  #endif  // ABB_SEMAPHORE_PROTECTION   

  // This transmission changes the register page in the ABB for usp to pg0.
  ABB_SetPage(PAGE0);

  /* select ADC channels to be converted */
  #if (ANALOG == 1)  
    ABB_WriteRegister(MADCCTRL1, Channels);  
  #elif ((ANALOG == 2) || (ANALOG == 3))
    ABB_WriteRegister(MADCCTRL, Channels);  
  #endif

  reg_val = ABB_ReadRegister(ITMASK);

  // This transmission configure the End Of Conversion IT without modifying other bits in the same register.
  if(ItVal == EOC_INTENA)
    ABB_WriteRegister(ITMASK, reg_val & EOC_INTENA);
  else if(ItVal == EOC_INTMASK)    
    ABB_WriteRegister(ITMASK, reg_val | EOC_INTMASK);  

  #if (ABB_SEMAPHORE_PROTECTION == 3)  
  // release the semaphore only if it has correctly been created.
  if(&abb_sem != 0)
  {
    NU_Release_Semaphore(&abb_sem);
  }
  #endif  // ABB_SEMAPHORE_PROTECTION   

  // Stop the SPI clock
  #ifdef SPI_CLK_LOW_POWER
    SPI_CLK_DISABLE
  #endif
}




/*------------------------------------------------------------------------*/
/* ABB_sleep()                                                            */
/*                                                                        */
/* This function disables the DCDC and returns to PAGE 0. It stops then   */
/* the 13MHz clock in ABB. A wait loop s required to allow                */ 
/* first slow access to ABB clock register.                               */
/*                                                                        */ 
/* WARNING !! : this function must not be protected by semaphore !!       */ 
/*                                                                        */ 
/* Returns AFC value.                                                     */ 
/*                                                                        */ 
/*------------------------------------------------------------------------*/ 
SYS_UWORD32 ABB_sleep(SYS_UWORD8 sleep_performed, SYS_WORD16 afc)
{
  volatile SYS_UWORD16 status;
  SYS_UWORD32 afcout_index;
  volatile SYS_UWORD16 nb_it;
  SYS_UWORD16 reg_val;

  // table for AFC allowed values during Sleep mode. First 5th elements
  // are related to positive AFC values, last 5th to negative ones.
  SYS_UWORD32 Afcout_T[10]= {0x0f,0x1f,0x3f,0x7f,0xff,0x00,0x01,0x03,0x07,0x0f};

  // Start spi clock, mask IT for RD and WR and read SPI_REG_STATUS to reset the RE and WE flags.   
  SPI_Ready_for_RDWR
  status = * (volatile SYS_UWORD16 *) SPI_REG_STATUS; 

  // COMPUTATION AND PROGRAMMING OF AFC VALUE
  //---------------------------------------------------
  if(afc & 0x1000)