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📄 hal_confignook.c

📁 是一个手机功能的模拟程序
💻 C
📖 第 1 页 / 共 2 页
字号:
        HAL_LCD_PARAM   + 0x9F,     
        HAL_LCD_PARAM   + 0x0A,  
        HAL_LCD_PARAM   + 0x00,     
        HAL_LCD_PARAM   + 0x00,
        HAL_LCD_PARAM   + 0x00,  
        //Display control set end
        //Data control set strat
        HAL_LCD_COMMAND + 0xBC,     
        HAL_LCD_PARAM   + 0x22,     
        HAL_LCD_PARAM   + 0x00, 
        //Data control set end
 		//page address set start
    	HAL_LCD_COMMAND + 0x75,     
        HAL_LCD_PARAM   + 0x00,     
        HAL_LCD_PARAM   + 0x9F,
 		//page address set end
		//column address set 
        HAL_LCD_COMMAND + 0x15,     
        HAL_LCD_PARAM   + 0x8C,     
        HAL_LCD_PARAM   + 0x00, 
        HAL_LCD_PARAM   + 0x0B,     
        HAL_LCD_PARAM   + 0x01,  
        // Sleep out set start
        HAL_LCD_COMMAND + 0x94,     
		HAL_LCD_DELAY   + 500, 
	 	//Sleep out set end
     	//Display on
     	HAL_LCD_COMMAND + 0xAF,
     	HAL_LCD_DELAY   + 100,  
		//Power ic control for evr
		HAL_LCD_COMMAND + 0xC6,
        HAL_LCD_PARAM   + 0x80,
		HAL_LCD_DELAY   + 200, 
		HAL_LCD_COMMAND + 0xC6, 
		HAL_LCD_PARAM   + 0x47,//47,
		//contranst up set start 
	
		HAL_LCD_DELAY   + 200,
        HAL_LCD_COMMAND + 0xC6,// 1
        HAL_LCD_PARAM   + 0x9D, 
        HAL_LCD_DELAY   + 100, 

        HAL_LCD_COMMAND + 0xC6,// 2
        HAL_LCD_PARAM   + 0x9D,     
        HAL_LCD_DELAY   + 100,  
        HAL_LCD_COMMAND + 0xC6,// 3    
        HAL_LCD_PARAM   + 0x9D,     
        HAL_LCD_DELAY   + 100,  
        HAL_LCD_COMMAND + 0xC6,// 4     
        HAL_LCD_PARAM   + 0x9D,     
        HAL_LCD_DELAY   + 100, 
        HAL_LCD_COMMAND + 0xC6,// 5     
        HAL_LCD_PARAM   + 0x9D,     
        HAL_LCD_DELAY   + 100, 
        HAL_LCD_COMMAND + 0xC6,// 6     
        HAL_LCD_PARAM   + 0x9D,     
        HAL_LCD_DELAY   + 100, 
        HAL_LCD_COMMAND + 0xC6,//7     
        HAL_LCD_PARAM   + 0x9D,     
        HAL_LCD_DELAY   + 100, 
        HAL_LCD_COMMAND + 0xC6,// 8     
        HAL_LCD_PARAM   + 0x9D,     
        HAL_LCD_DELAY   + 100, 
    
  		//contranstup set end
  		// read for write
        HAL_LCD_COMMAND + 0x5C,     
        HAL_LCD_ENDOFTABLE
    },
    {                       // LCD3 init sequence
        HAL_LCD_ENDOFTABLE
    },

    {                       // S1D13716 init registers
	//{ REG0104_CMMODE0,                      0x08 },    
	{ REG0018_POWERSAVE,			0x01 },
	{ REG0014_CLKSRC,				0x00 },
	{ REG0010_PLL0,					0xC2 },
	{ REG0011_PLL1,					0x34 },
	{ REG0012_PLL2,					0x20 },
	{ REG0015_SERLCDCLK,			0x41 },
	{ REG0014_CLKSRC,				0x31 },//ori 31 now b1
	{ REG0016_LCDPCLKDIV,			0x00 },
	{ REG0018_POWERSAVE,			0x04 },
 	{ REGFLAG_DELAY,				0xFF },        
	{ REG0070_PWMCTRL0,				0x05 },      
	{ REG007F_PWMWHITECYCLE,		0x3F },      
	{ REG0072_PWMCTRL1,				0x01 }, 
	{ REGFLAG_DELAY,				0x50 },//first step
	{ REG0040_LCD1SETTING,			0x05 },
	{ REG0044_LCD2SETTING,			0x05 },
	{ REG0048_LCD3SETTING,			0x00 },
	{ REG004E_SCALEUP,				0x00 },//sec step
	{ REG004C_DISPSETTING,			0x62 },//over lay with main  ori42
	{ REG0036_LCDTRIG,				0x00 },
	{ REG003C_LCDXFER,				0x00 },
	{ REG0100_CMCLK,                        0x01 },
	{ REG0102_CMSIGNAL,                     0x02 },
	{ REG0104_CMMODE0,                      0x08 },
	{ REG0106_CMMODE1,                      0x00 },
	{ REG0108_CMCONTROL,                    0x01 },
	{ REG0108_CMCONTROL,                    0x00 },
	{ REG0202_RESIZE,				0x81 },//ori 81
	{ REG0202_RESIZE,				0x01 },//ori 01			
	{ REG0202_RESIZE,				0x08 },
	{ REG0204_RESIZESX0,			0x00 },
	{ REG0205_RESIZESX1,			0x00 },
	{ REG0206_RESIZESY0,				0x00 },
	{ REG0207_RESIZESY1,				0x00 },
	{ REG0208_RESIZEEX0,				0x7F },//ori 127
	{ REG0209_RESIZEEX1,				0x00 },
	{ REG020A_RESIZEEY0,				0x9F },//128*120=0x77
	{ REG020B_RESIZEEY1,				0x00 },
	{ REG020C_RESIZEHSCALE,			0x01 },
	{ REG020E_RESIZEVSCALE,			0x01 },
	{ REG0210_RESIZEOP,				0x00 },//ori 01
	{ REG0212_MEMHORZRES,			0x7F },
	{ REG0214_MEMVERTRES,			0x9F},//128*120=0x77
	{ REG0216_RYC,					0x05 },	
	{ REG0220_YUVRGBXLATE0,			0x05 },
	{ REG0222_YUVRGBXLATE1,			0x00 },
	{ REG0224_YUVWRSTART0,			0x00 },
	{ REG0225_YUVWRSTART1,			0x20 },//128*120=0x28
	{ REG0226_YUVWRSTART2,			0x00 },
	{ REG0228_XOFFSET0,				0x00 },
	{ REG0229_XOFFSET1,				0x00 },
	{ REG022A_YOFFSET0,				0x10 },//128*120=0x14 ori 10
	{ REG022B_YOFFSET1,				0x00 },
	{ REG022C_VDATACLIP,            0x00 },
	{ REG022E_UDATACLIP,            0x00 },	
	{ REG0240_OSADDR0,				0x00 },
	{ REG0241_OSADDR1,				0xA0 },//ori a0
	{ REG0242_OSADDR2,				0x00 },
	{ REG0244_OHRES,				0x7F },
	{ REG0246_OVRES,				0x9F },	
	{ REG0248_OIMAGE,				0x10 },//=0x10
	{ REG024A_SWIVELVIEW,			0x00 },
	//{ REG0250_MJPEG,                        0x00 },			
	//{ REG0252_BUF2ADDR0,                    0x00 },
	//{ REG0253_BUF2ADDR1,                    0x20 },
	//{ REG0254_BUF2ADDR2,                    0x00 },
	{ REG0300_IRQSTATUS0,                   0xFF },
	{ REG0301_IRQSTATUS1,                   0xFF },
	{ REG0300_IRQSTATUS0,                   0x00 },
	{ REG0301_IRQSTATUS1,                   0x00 },
	{ REG0302_IRQENABLE0,                   0x00 },
	{ REG0303_IRQENABLE1,                   0x00 },
	{ REG0304_IRQCONTROL,                   0x00 },
	{ REG0306_DEBUGSTATUS,                  0x00 },
	{ REG0308_IRQCTRLDEBUG,                 0x00 },
	{ REG030A_RESERVEDDEBUG0,               0x00 },
	{ REG030C_RESERVEDDEBUG1,               0x00 },
	{ REG080A_JPEGIRQ0,                     0x00 },
	{ REG080C_JPEGIRQ1,                     0x00 },
	{ REG0820_ENCODELIMIT0,                 0x00 },
	{ REG0821_ENCODELIMIT1,                 0x00 },
	{ REGFLAG_ONDELAY,                      0x00 },
	{ REGFLAG_ENDOFTABLE,			0x00 }
    },
    {
	// VGA MODE FOR OV7645FB
	{ 0x12, 0x80 },
	{ 0x03, 0xa4 },			//0x04----black & white//0xa4----normal
	{ 0x04, 0x30 },
	{ 0x05, 0x88 },
	{ 0x06, 0x60 },
	{ 0x11, 0x00 },			//{ 0x11, 0x00 }, //;value 01 for 15 fps
	{ 0x12, 0x15 },
	{ 0x13, 0xa3 },			//{ 0x13, 0xf3 },
	{ 0x14, 0x14 },			//{ 0x14, 0x04 },
	{ 0x15, 0x14 },			//{ 0x15, 0x84 },
	{ 0x1f, 0x41 },
	{ 0x20, 0xd0 },
	{ 0x23, 0xde },
	{ 0x24, 0xa0 },			//{ 0x24, 0x80 },
	{ 0x25, 0x80 },			//{ 0x25, 0xa0 },
	{ 0x26, 0xb2 },			//{ 0x26, 0x32 },
	{ 0x27, 0xe2 },			//0xe2----black & white//0xe0----normal
	{ 0x28, 0x20 },
	{ 0x2a, 0x01 },
	{ 0x2b, 0x00 },
	{ 0x2d, 0x05 },
	{ 0x2f, 0x9d },
	{ 0x30, 0x00 },
	{ 0x31, 0xc4 },
	{ 0x60, 0x86 },			//{ 0x60, 0xa6 },
	{ 0x61, 0xe0 },
	{ 0x62, 0x88 },
	{ 0x63, 0x11 },
	{ 0x64, 0x89 },
	{ 0x65, 0x00 },
	{ 0x67, 0x94 },			//{ 0x67, 0x14 },
	{ 0x68, 0x7a },
	{ 0x69, 0x08 },
	{ 0x6c, 0x11 },			//0xFF----black & white//0x11----normal
	{ 0x6d, 0x33 },			//0xFF----black & white//0x33----normal
	{ 0x6e, 0x22 },			//0xFF----black & white//0x22----normal
	{ 0x6f, 0x00 },			
	{ 0x74, 0x20 },			//{ 0x74, 0x60 },  low light use 0x60
	{ 0x75, 0x0e },			//{ 0x75, 0x06 },
	{ 0x77, 0xc4 },			//{ 0x77, 0xb5 },
	//{ 0x79, 0x80 },			//set----black & white//remove----normal
	//{ 0x7a, 0x80 },			//set----black & white//remove----normal
	{ REGFLAG_ENDOFTABLE,0xFFFF}	//for end
   }
};


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