📄 p_mphc.h
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#define __T_MPHC_NCELL_BCCH_IND__
/*
*
* CCDGEN:WriteStruct_Count==1623
*/
typedef struct
{
U16 radio_freq; /*< 0: 2> channel number */
U8 l2_channel; /*< 2: 1> layer 2 channel type */
U8 error_flag; /*< 3: 1> error cause */
T_l2_frame l2_frame; /*< 4: 24> layer 2 frame */
U8 tc; /*< 28: 1> multiframe number modulo 8 */
U8 _align0; /*< 29: 1> alignment */
U8 _align1; /*< 30: 1> alignment */
U8 _align2; /*< 31: 1> alignment */
U32 fn; /*< 32: 4> frame number */
} T_MPHC_NCELL_BCCH_IND;
#endif
#ifndef __T_MPHC_STOP_NCELL_BCCH_REQ__
#define __T_MPHC_STOP_NCELL_BCCH_REQ__
/*
*
* CCDGEN:WriteStruct_Count==1624
*/
typedef struct
{
U8 radio_freq_array_size; /*< 0: 1> Number of entries in the radio_freq_array within a stop request. When 6 (maximum number of requests to be served in parallel) are provided the message is interpreted as a complete process stop request. */
U8 _align0; /*< 1: 1> alignment */
U16 radio_freq_array[6]; /*< 2: 12> channel list */
U8 _align1; /*< 14: 1> alignment */
U8 _align2; /*< 15: 1> alignment */
} T_MPHC_STOP_NCELL_BCCH_REQ;
#endif
#ifndef __T_MPHC_STOP_NCELL_BCCH_CON__
#define __T_MPHC_STOP_NCELL_BCCH_CON__
/*
*
* CCDGEN:WriteStruct_Count==1625
*/
typedef struct
{
U8 param; /*< 0: 1> dummy parameter */
U8 _align0; /*< 1: 1> alignment */
U8 _align1; /*< 2: 1> alignment */
U8 _align2; /*< 3: 1> alignment */
} T_MPHC_STOP_NCELL_BCCH_CON;
#endif
#ifndef __T_MPHC_RXLEV_PERIODIC_REQ__
#define __T_MPHC_RXLEV_PERIODIC_REQ__
/*
*
* CCDGEN:WriteStruct_Count==1626
*/
typedef struct
{
T_chan_list chan_list; /*< 0: 68> channel list */
U8 num_of_chans; /*< 68: 1> Number of valid carrier numbers contained in the BA list (chan_number) array (1 to 33) */
U8 ba_id; /*< 69: 1> band allocation identification */
U8 next_radio_freq_measured; /*< 70: 1> channel index */
U8 _align0; /*< 71: 1> alignment */
} T_MPHC_RXLEV_PERIODIC_REQ;
#endif
#ifndef __T_MPHC_RXLEV_PERIODIC_IND__
#define __T_MPHC_RXLEV_PERIODIC_IND__
/*
*
* CCDGEN:WriteStruct_Count==1627
*/
typedef struct
{
T_result result[MAX_MEAS_VALUES]; /*< 0: 32> measurement results */
U8 nbr_of_carriers; /*< 32: 1> The number of cell carriers measured during the PCH block */
U8 s_rxlev; /*< 33: 1> The serving cell received power level (average of the 4 PCH bursts read during the particular PCH block). */
U8 ba_id; /*< 34: 1> band allocation identification */
U8 _align0; /*< 35: 1> alignment */
} T_MPHC_RXLEV_PERIODIC_IND;
#endif
#ifndef __T_MPHC_STOP_RXLEV_PERIODIC_REQ__
#define __T_MPHC_STOP_RXLEV_PERIODIC_REQ__
/*
*
* CCDGEN:WriteStruct_Count==1628
*/
typedef struct
{
U8 param; /*< 0: 1> dummy parameter */
U8 _align0; /*< 1: 1> alignment */
U8 _align1; /*< 2: 1> alignment */
U8 _align2; /*< 3: 1> alignment */
} T_MPHC_STOP_RXLEV_PERIODIC_REQ;
#endif
#ifndef __T_MPHC_STOP_RXLEV_PERIODIC_CON__
#define __T_MPHC_STOP_RXLEV_PERIODIC_CON__
/*
*
* CCDGEN:WriteStruct_Count==1629
*/
typedef struct
{
U8 param; /*< 0: 1> dummy parameter */
U8 _align0; /*< 1: 1> alignment */
U8 _align1; /*< 2: 1> alignment */
U8 _align2; /*< 3: 1> alignment */
} T_MPHC_STOP_RXLEV_PERIODIC_CON;
#endif
#ifndef __T_MPHC_RXLEV_REQ__
#define __T_MPHC_RXLEV_REQ__
/*
*
* CCDGEN:WriteStruct_Count==1630
*/
typedef struct
{
U32 shared_ptr; /*< 0: 4> Pointer */
} T_MPHC_RXLEV_REQ;
#endif
#ifndef __T_MPHC_RXLEV_IND__
#define __T_MPHC_RXLEV_IND__
/*
*
* CCDGEN:WriteStruct_Count==1631
*/
typedef struct
{
U32 shared_ptr; /*< 0: 4> Pointer */
} T_MPHC_RXLEV_IND;
#endif
#ifndef __T_MPHC_STOP_RXLEV_REQ__
#define __T_MPHC_STOP_RXLEV_REQ__
/*
*
* CCDGEN:WriteStruct_Count==1632
*/
typedef struct
{
U8 param; /*< 0: 1> dummy parameter */
U8 _align0; /*< 1: 1> alignment */
U8 _align1; /*< 2: 1> alignment */
U8 _align2; /*< 3: 1> alignment */
} T_MPHC_STOP_RXLEV_REQ;
#endif
#ifndef __T_MPHC_STOP_RXLEV_CON__
#define __T_MPHC_STOP_RXLEV_CON__
/*
*
* CCDGEN:WriteStruct_Count==1633
*/
typedef struct
{
U8 param; /*< 0: 1> dummy parameter */
U8 _align0; /*< 1: 1> alignment */
U8 _align1; /*< 2: 1> alignment */
U8 _align2; /*< 3: 1> alignment */
} T_MPHC_STOP_RXLEV_CON;
#endif
#ifndef __T_MPHC_CONFIG_CBCH_REQ__
#define __T_MPHC_CONFIG_CBCH_REQ__
/*
*
* CCDGEN:WriteStruct_Count==1634
*/
typedef struct
{
T_cbch_desc cbch_desc; /*< 0: 12> CBCH channel description */
T_cbch_freq_list cbch_freq_list; /*< 12:132> CBCH frequency list */
} T_MPHC_CONFIG_CBCH_REQ;
#endif
#ifndef __T_MPHC_CBCH_SCHEDULE_REQ__
#define __T_MPHC_CBCH_SCHEDULE_REQ__
/*
*
* CCDGEN:WriteStruct_Count==1635
*/
typedef struct
{
U8 cbch_select; /*< 0: 1> which cbch channel to read */
U8 schedule_length; /*< 1: 1> length of schedule period */
U8 _align0; /*< 2: 1> alignment */
U8 _align1; /*< 3: 1> alignment */
U32 first_blocks_0; /*< 4: 4> Bitmap defining a set of blocks to be read during the schedule period. The bits represent the blocks as follows: bit MSB=31 -> block=32; bit LSB=0 -> block=1. */
U16 first_blocks_1; /*< 8: 2> Bitmap defining a set of blocks to be read during the schedule period. The bits represent the blocks as follows: bit MSB=15 -> block=48; bit LSB=0 -> block=33. */
U8 _align2; /*< 10: 1> alignment */
U8 _align3; /*< 11: 1> alignment */
} T_MPHC_CBCH_SCHEDULE_REQ;
#endif
#ifndef __T_MPHC_CBCH_INFO_REQ__
#define __T_MPHC_CBCH_INFO_REQ__
/*
*
* CCDGEN:WriteStruct_Count==1636
*/
typedef struct
{
U8 tb_bitmap; /*< 0: 1> blocks to read */
U8 _align0; /*< 1: 1> alignment */
U8 _align1; /*< 2: 1> alignment */
U8 _align2; /*< 3: 1> alignment */
} T_MPHC_CBCH_INFO_REQ;
#endif
#ifndef __T_MPHC_CBCH_UPDATE_REQ__
#define __T_MPHC_CBCH_UPDATE_REQ__
/*
*
* CCDGEN:WriteStruct_Count==1637
*/
typedef struct
{
U8 cbch_select; /*< 0: 1> which cbch channel to read */
U8 _align0; /*< 1: 1> alignment */
U8 _align1; /*< 2: 1> alignment */
U8 _align2; /*< 3: 1> alignment */
U32 first_blocks_0; /*< 4: 4> Bitmap defining a set of blocks to be read during the schedule period. The bits represent the blocks as follows: bit MSB=31 -> block=32; bit LSB=0 -> block=1. */
U16 first_blocks_1; /*< 8: 2> Bitmap defining a set of blocks to be read during the schedule period. The bits represent the blocks as follows: bit MSB=15 -> block=48; bit LSB=0 -> block=33. */
U8 _align3; /*< 10: 1> alignment */
U8 _align4; /*< 11: 1> alignment */
} T_MPHC_CBCH_UPDATE_REQ;
#endif
#ifndef __T_MPHC_STOP_CBCH_REQ__
#define __T_MPHC_STOP_CBCH_REQ__
/*
*
* CCDGEN:WriteStruct_Count==1638
*/
typedef struct
{
U8 normal_cbch; /*< 0: 1> normal cbch */
U8 extended_cbch; /*< 1: 1> extended cbch */
U8 _align0; /*< 2: 1> alignment */
U8 _align1; /*< 3: 1> alignment */
} T_MPHC_STOP_CBCH_REQ;
#endif
#ifndef __T_MPHC_STOP_CBCH_CON__
#define __T_MPHC_STOP_CBCH_CON__
/*
*
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