📄 spiftest.c
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send_message(UNEXP_ERROR, ERROR, routine_msg); } sp_ports[port].termios.c_cc[VMIN] = 1; sp_ports[port].termios.c_cc[VTIME] = 0; if ((ioctl(sp_ports[port].fd, TCSETS,&sp_ports[port].termios)) == FAIL) { send_message(0, ERROR, tcsets_err, sp_dev_name[port]); exit(errno); } send_message(0, TRACE, "%s: ", sp_dev_name[port]); send_message(0, TRACE, "iflag=0x%x oflag=0x%x lflag=0x%x cflag=0x%x\n", sp_ports[port].termios.c_iflag, sp_ports[port].termios.c_oflag, sp_ports[port].termios.c_lflag, sp_ports[port].termios.c_cflag); TRACE_OUT} /* set_termios */ /* * The actual test. * Return True if the test passed, otherwise FALSE. * */intdev_test(){ int i; func_name = "dev_test"; TRACE_IN strcpy(device_name, dev_name); send_message(0, VERBOSE, start_test_msg, test_name); for (i = 0; i < MAX_BOARDS; i++) send_message(0, TRACE, "Board[%d] = %d\n", i, spif[i]); for (i = 0; i < MAX_TESTS; i++) send_message(0, TRACE, "Testid[%d] = %d\n", i, testid[i]); if (!testid[PRINT]) { send_message(0, VERBOSE, parms_msg, baud, csize, sbit, parity_str, flow_str); if (!testid[ECHO_TTY]) { switch (csize) { case 5: data &= 0x1f1f1f1f; break; case 6: data &= 0x3f3f3f3f; break; case 7: data &= 0x7f7f7f7f; break; } send_message(0, VERBOSE, data_msg, data); } } /* Execute this test first, always */ if (testid[INTERNAL]) { send_message(0, VERBOSE, internal_test); current_test = INTERNAL; int_loopback(); sleep(10); /* ample time for internal test to complete */ } if (testid[SP_96]) { /* * Verify that sundiag, in intervention mode, prints message * to advice user to plug the SPC/S 96-pin loopback plug into * the board. */ send_message(0, VERBOSE, lp96_msg); current_test = SP_96; data_loopback(); modem_loopback(); } if (testid[DB_25]) { /* * Verify that sundiag, in intervention mode, prints message * to advice user to plug the DB-25 loopback plug into the * patch panel. */ send_message(0, VERBOSE, lp25_msg); current_test = DB_25; data_loopback(); modem_loopback(); } if (testid[ECHO_TTY]) { send_message(0, VERBOSE, echotty_msg); current_test = ECHO_TTY; echo_tty(); } if (testid[PRINT]) { send_message(0, VERBOSE, printer_msg); current_test = PRINT; print_pp_file(); } send_message(0, VERBOSE, end_test_msg, test_name); TRACE_OUT} /* dev_test *//* * int_loopback - * * Enable local loopback mode in the CD180 so that receive line is * looped to transmit line internally. Also, read and write to data * line within the PPC2 using ioctl calls provided by the * SPC/S device driver. * * Enable if quick test is selected or if user specifies explicitly. */voidint_loopback(){ struct stcregs_t *sr; struct ppcregs_t *pr; int brd; int bfd, dfd, offset, bytes; u_char b_exp, b_obs; func_name = "int_loopback"; TRACE_IN for (brd = 0; brd < MAX_BOARDS; brd++) { if (spif[brd]) { /* * Open the control device for installed SPC/S board */ if ((bfd=open(spif_dev_name[brd],O_RDWR|O_NDELAY)) < 0) { send_message(0, ERROR, open_err_msg, spif_dev_name[brd]); exit(errno); } strcpy(device_name, spif_dev_name[brd]); send_message(0,VERBOSE, testing_msg, device_name); for (dev_num = (brd*MAX_TERMS); dev_num < (brd+1)*MAX_TERMS ; dev_num++) { if ((dfd=open(sp_dev_name[dev_num],O_RDWR|O_NDELAY)) < 0) { send_message(0, ERROR, open_err_msg, sp_dev_name[dev_num]); exit(errno); } if (ioctl(dfd, TIOCEXCL, 0) == FAIL) { send_message(0, ERROR, device_open, sp_dev_name[dev_num]); exit(errno); } sp_ports[dev_num].fd = dfd; enable_softcar(dev_num); set_termios(dev_num); /* * Enable local loopback. Write 0x10 to CD180 COR2. * register. Verify that CCR is 0, then update it * to inform CD180 that COR2 has changed. The channel * number is local to each chip. */ offset = (caddr_t)&(sr->cor2) - (caddr_t)sr; sd.line_no = dev_num % MAX_TERMS; sd.op = STC_REGIOW | STC_SETCAR; sd.reg_offset = offset; sd.reg_data = LLOOP; if (ioctl(bfd,STC_DCONTROL,&sd) < 0) { send_message(0, ERROR, stc_regiow_cor2, sp_dev_name[dev_num]); exit(errno); } send_message(0, TRACE, "%s: COR2 = 0x%x\n", sp_dev_name[dev_num], sd.reg_data); /* Make sure CCR is 0 per CD180 specification */ offset = (caddr_t)&(sr->ccr) - (caddr_t)sr; sd.line_no = dev_num % MAX_TERMS; sd.op = STC_REGIOR | STC_SETCAR; sd.reg_offset = offset; if (ioctl(bfd,STC_DCONTROL,&sd) < 0) { send_message(0, ERROR, stc_regior_ccr, sp_dev_name[dev_num]); exit(errno); } /* Write to CCR to inform COR2 has changed, per * CD180 specification */ offset = (caddr_t)&(sr->ccr) - (caddr_t)sr; sd.line_no = dev_num % MAX_TERMS; sd.op = STC_REGIOW | STC_SETCAR; sd.reg_offset = offset; sd.reg_data = COR2_CHNG; if (ioctl(bfd,STC_DCONTROL,&sd) < 0) { send_message(0, ERROR, stc_regiow_ccr, sp_dev_name[dev_num]); exit(errno); } send_message(0, TRACE, "%s: CCR = 0x%x\n", sp_dev_name[dev_num], sd.reg_data); rw_loop(); close(dfd); } /* * Write to ppc2 data register, and then read and * and compare. There is only one parallel port per board. */ b_exp = 0xaa; for (bytes = 0; bytes < MAX_BYTES; bytes++) { sd.line_no = 0; sd.op = STC_PPCREGW; sd.reg_offset = (caddr_t)&(pr->pdata) - (caddr_t)pr; sd.reg_data = b_exp; if (ioctl(bfd,STC_DCONTROL,&sd)<0) { send_message(0, ERROR, stc_ppcregw, pp_dev_name[brd]); exit(errno); } sd.line_no = 0; sd.op = STC_PPCREGR; sd.reg_offset = (caddr_t)&(pr->pdata) - (caddr_t)pr; if (ioctl(bfd,STC_DCONTROL,&sd) < 0) { send_message(0, ERROR, stc_ppcregr, pp_dev_name[brd]); exit(errno); } b_obs = sd.reg_data; send_message(0, TRACE, "%s: exp=0x%x obs=0x%x\n", pp_dev_name[brd], b_exp, b_obs); if (b_obs != b_exp) { send_message(0, ERROR, compare_err_msg, b_exp, b_obs); send_message(0, ERROR, internal_test_err, pp_dev_name[brd]); exit(CMP_ERROR); } } close(bfd); } } TRACE_OUT} /* int_loopback *//* * data_loopback - * * Send data and read back from same port with the help of 96-pin * and 25-pin loopback plug. Data is sent to selected port only. */voiddata_loopback(){ int i, fd; func_name = "data_loopback"; TRACE_IN send_message(0, TRACE, dataloop_test); for (dev_num = 0; dev_num < TOTAL_IO_PORTS; dev_num++) { if (sp_ports[dev_num].selected) { strcpy(device_name, sp_dev_name[dev_num]); send_message(0,VERBOSE, testing_msg, device_name); if ((fd=open(sp_dev_name[dev_num],O_RDWR|O_NDELAY)) < 0) { send_message(0, ERROR, open_err_msg, sp_dev_name[dev_num]); exit(errno); } if (ioctl(fd, TIOCEXCL, 0) == FAIL) { send_message(0, ERROR, device_open, sp_dev_name[dev_num]); exit(errno); } sp_ports[dev_num].fd = fd; enable_softcar(dev_num); set_termios(dev_num); rw_loop(); close(fd); } } TRACE_OUT} /* data_loopback *//* * modem_loopback - * * Since the modem lines DTR is loopback to CD and DSR (in DB-25 * plug), and RTS to CTS, we use ioctl TIOCMSET to set DTR and RTS. * Use TIOCMBIC to clear DTR and RTS, then verify that they are * cleared. * * For 96-pin loopback, DSRx lines are connected to parallel port * lines, so we have to set and clear the Pdx lines. */voidmodem_loopback(){ struct ppcregs_t *pr; int bfd, dfd; int modem = 0, exp = 0, obs = 0, tmp = 0; int offset, brd; u_char pattern = 0, dsr_obs = 0; func_name = "modem_loopback"; TRACE_IN /* * Perform parallel port loopback test - * If 96-pin loopback, enable DSRx by writing to * parallel port data register. Find out which * board is enable to open control line for * that board. */ if (testid[SP_96]) { send_message(0, TRACE, pploop_test); for (brd = 0; brd < MAX_BOARDS; brd++) { if (spif[brd]) { if ((bfd=open(spif_dev_name[brd],O_RDWR|O_NDELAY)) == FAIL) { send_message(0, ERROR, open_err_msg, spif_dev_name[brd]); exit(errno); } pattern = 0xff; offset = (caddr_t)&(pr->pdata) - (caddr_t)pr; sd.line_no = 0; sd.op = STC_PPCREGW; sd.reg_offset = offset; sd.reg_data = pattern; if (ioctl(bfd,STC_DCONTROL,&sd) == FAIL) { send_message(0, ERROR, stc_ppcregw, pp_dev_name[brd]); exit(errno); } sd.line_no = 0; sd.op = STC_PPCREGR; sd.reg_offset = (caddr_t)&(pr->pdata) - (caddr_t)pr; if (ioctl(bfd,STC_DCONTROL,&sd) < 0) { send_message(0, ERROR, stc_ppcregr, pp_dev_name[brd]); exit(errno); } send_message(0, TRACE, "STC_PPCREGW(DATA): offset 0x%x, data 0x%x\n", sd.reg_offset, sd.reg_data); /* Get current modem state of each enable port */ dsr_obs = 0; for (dev_num = (brd*MAX_TERMS); dev_num < (brd+1)*MAX_TERMS ; dev_num++) { if (sp_ports[dev_num].selected) { if ((dfd = open(sp_dev_name[dev_num], O_RDWR|O_NDELAY)) < 0) { send_message(0, ERROR, open_err_msg, sp_dev_name[dev_num]); exit(errno); } if (ioctl(dfd, TIOCEXCL, 0) == FAIL) { send_message(0, ERROR, device_open, sp_dev_name[dev_num]); exit(errno); } sp_ports[dev_num].fd = dfd; enable_softcar(dev_num); if ((ioctl(dfd,TIOCMGET,&obs)) == FAIL) { send_message(0, ERROR, tiocmget_err, sp_dev_name[dev_num]); exit(errno); } send_message(0, TRACE, "obs = 0x%x\n", obs); if (!(obs & TIOCM_DSR)) { send_message(0, ERROR, dsr_clear_err, sp_dev_name[dev_num]); exit(CMP_ERROR); } } } /* Now clear the parallel port register */ pattern = 0x0; offset = (caddr_t)&(pr->pdata) - (caddr_t)pr; sd.line_no = 0; sd.op = STC_PPCREGW; sd.reg_offset = offset; sd.reg_data = pattern; if (ioctl(bfd,STC_DCONTROL,&sd) == FAIL) { send_message(0, ERROR, stc_ppcregw, pp_dev_name[brd]); exit(errno); } sd.line_no = 0; sd.op = STC_PPCREGR; sd.reg_offset = (caddr_t)&(pr->pdata) - (caddr_t)pr; if (ioctl(bfd,STC_DCONTROL,&sd) < 0) { send_message(0, ERROR, stc_ppcregr, pp_dev_name[brd]); exit(errno); } send_message(0, TRACE, "STC_PPCREGW(DATA): offset 0x%x, data 0x%x\n", sd.reg_offset, sd.reg_data); /* Verify that DSRx also are cleared */ for (dev_num = (brd*MAX_TERMS); dev_num < (brd+1)*MAX_TERMS ; dev_num++) { if (sp_ports[dev_num].selected) { if ((ioctl(sp_ports[dev_num].fd,TIOCMGET,&obs)) == FAIL) { send_message(0, ERROR, tiocmget_err, sp_dev_name[dev_num]); exit(errno); } send_message(0, TRACE, "obs = 0x%x\n", obs); if (obs & TIOCM_DSR) { send_message(0, ERROR, dsr_set_err, sp_dev_name[dev_num]); exit(errno); } close(sp_ports[dev_num].fd); } } close(bfd); } } } /* Begin modem loopback test on modem signals */ send_message(0, TRACE, modemloop_test); for (dev_num = 0; dev_num < TOTAL_IO_PORTS; dev_num++) { if (sp_ports[dev_num].selected) { if ((dfd = open(sp_dev_name[dev_num], O_RDWR|O_NDELAY)) < 0) { send_message(0, ERROR, open_err_msg, sp_dev_name[dev_num]); exit(errno); } if (ioctl(dfd, TIOCEXCL, 0) == FAIL) { send_message(0, ERROR, device_open, sp_dev_name[dev_num]); exit(errno); } sp_ports[dev_num].fd = dfd; enable_softcar(dev_num); if ((ioctl(dfd,TIOCMGET,&tmp)) == FAIL) { send_message(0, ERROR, tiocmget_err, sp_dev_name[dev_num]); exit(errno); } /* Clear modem states, leave line enable */ tmp = TIOCM_LE; if ((ioctl(dfd,TIOCMSET,&tmp)) == FAIL) { send_message(0, ERROR, tiocmset_err, sp_dev_name[dev_num]); exit(errno); } if ((ioctl(dfd,TIOCMGET,&tmp)) == FAIL) { send_message(0, ERROR, tiocmget_err, sp_dev_name[dev_num]); exit(errno); } /* set DTR and RTS */ modem = TIOCM_DTR|TIOCM_RTS|TIOCM_LE; if ((ioctl(dfd,TIOCMSET,&modem)) == FAIL) { send_message(0, ERROR, tiocmset_err, sp_dev_name[dev_num]); exit(errno);
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