📄 svr4fpu-test.s
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be reg19 inc %l3 cmp %i0, %l3 ! == 20 be reg20 inc %l3 cmp %i0, %l3 ! == 21 be reg21 inc %l3 cmp %i0, %l3 ! == 22 be reg22 inc %l3 cmp %i0, %l3 ! == 23 be reg23 inc %l3 cmp %i0, %l3 ! == 24 be reg24 inc %l3 cmp %i0, %l3 ! == 25 be reg25 inc %l3 cmp %i0, %l3 ! == 26 be reg26 inc %l3 cmp %i0, %l3 ! == 27 be reg27 inc %l3 cmp %i0, %l3 ! == 28 be reg28 inc %l3 cmp %i0, %l3 ! == 29 be reg29 inc %l3 cmp %i0, %l3 ! == 30 be reg30 inc %l3 cmp %i0, %l3 ! == 31 nop ld [%l1], %f31 st %f31, [%l2] ba reg_done ! done nop reg0: ld [%l1], %f0 st %f0, [%l2] ba reg_done nopreg1: ld [%l1], %f1 st %f1, [%l2] ba reg_done nopreg2: ld [%l1], %f2 st %f2, [%l2] ba reg_done nopreg3: ld [%l1], %f3 st %f3, [%l2] ba reg_done nopreg4: ld [%l1], %f4 st %f4, [%l2] ba reg_done nopreg5: ld [%l1], %f5 st %f5, [%l2] ba reg_done nopreg6: ld [%l1], %f6 st %f6, [%l2] ba reg_done nopreg7: ld [%l1], %f7 st %f7, [%l2] ba reg_done nopreg8: ld [%l1], %f8 st %f8, [%l2] ba reg_done nopreg9: ld [%l1], %f9 st %f9, [%l2] ba reg_done nopreg10: ld [%l1], %f10 st %f10, [%l2] ba reg_done nopreg11: ld [%l1], %f11 st %f11, [%l2] ba reg_done nopreg12: ld [%l1], %f12 st %f12, [%l2] ba reg_done nopreg13: ld [%l1], %f13 st %f13, [%l2] ba reg_done nopreg14: ld [%l1], %f14 st %f14, [%l2] ba reg_done nopreg15: ld [%l1], %f15 st %f15, [%l2] ba reg_done nopreg16: ld [%l1], %f16 st %f16, [%l2] ba reg_done nopreg17: ld [%l1], %f17 st %f17, [%l2] ba reg_done nopreg18: ld [%l1], %f18 st %f18, [%l2] ba reg_done nopreg19: ld [%l1], %f19 st %f19, [%l2] ba reg_done nopreg20: ld [%l1], %f20 st %f20, [%l2] ba reg_done nopreg21: ld [%l1], %f21 st %f21, [%l2] ba reg_done nopreg22: ld [%l1], %f22 st %f22, [%l2] ba reg_done nopreg23: ld [%l1], %f23 st %f23, [%l2] ba reg_done nopreg24: ld [%l1], %f24 st %f24, [%l2] ba reg_done nopreg25: ld [%l1], %f25 st %f25, [%l2] ba reg_done nopreg26: ld [%l1], %f26 st %f26, [%l2] ba reg_done nopreg27: ld [%l1], %f27 st %f27, [%l2] ba reg_done nopreg28: ld [%l1], %f28 st %f28, [%l2] ba reg_done nopreg29: ld [%l1], %f29 st %f29, [%l2] ba reg_done nopreg30: ld [%l1], %f30 st %f30, [%l2] ba reg_done nopreg31: ld [%l1], %f31 st %f31, [%l2]reg_done: ld [%l2], %i0 ret restore!++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++! Name: Move Registers! Function: Move a value thru the float registers! Calling: in0 = value! Returns: in0 = result ! Convention: if (result != move_regs(value)) ! error(result-value);!--------------------------------------------------------------------------move_regs: save %sp, -88, %sp ! save the registers, stack set temp2, %l0 ! get the address to temp2 set temp, %l1 ! .. and temp st %i0, [%l0] ! get the callers value ld [%l0], %f0 ! .. into a float register fmovs %f0, %f1 ! copy from 1 register to the next fmovs %f1, %f2 ! .. to the next fmovs %f2, %f3 ! .. to the next fmovs %f3, %f4 ! .. to the next fmovs %f4, %f5 ! .. to the next fmovs %f5, %f6 ! .. to the next fmovs %f6, %f7 ! .. to the next fmovs %f7, %f8 ! .. to the next fmovs %f8, %f9 ! .. to the next fmovs %f9, %f10 ! .. to the next fmovs %f10, %f11 ! .. to the next fmovs %f11, %f12 ! .. to the next fmovs %f12, %f13 ! .. to the next fmovs %f13, %f14 ! .. to the next fmovs %f14, %f15 ! .. to the next fmovs %f15, %f16 ! .. to the next fmovs %f16, %f17 ! .. to the next fmovs %f17, %f18 ! .. to the next fmovs %f18, %f19 ! .. to the next fmovs %f19, %f20 ! .. to the next fmovs %f20, %f21 ! .. to the next fmovs %f21, %f22 ! .. to the next fmovs %f22, %f23 ! .. to the next fmovs %f23, %f24 ! .. to the next fmovs %f24, %f25 ! .. to the next fmovs %f25, %f26 ! .. to the next fmovs %f26, %f27 ! .. to the next fmovs %f27, %f28 ! .. to the next fmovs %f28, %f29 ! .. to the next fmovs %f29, %f30 ! .. to the next fmovs %f30, %f31 ! .. to the next st %f31, [%l1] ! .... save the result ld [%l1], %i0 ! .. and return it to the caller ret restore!++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++! Name: ! Function: ! Calling: ! Returns: ! Convention: !--------------------------------------------------------------------------!! The following routine checks the branching is done accordingly! to the ficc bits.! input %i0 = 0 = branch unordered! 1 = branch greater! 2 = branch unordered or greater! 3 = branch less! 4 = branch unordered or less! 5 = branch less or greater! 6 = branch not equal! 7 = branch equal! 8 = branch unordered or equal! . 9 = branch greater or equal! 10 = branch branch unordered or greater or equal! 11 = branch less or equal! 12 = branch unordered or or less or equal! 13 = branch ordered! 14 = branch always! 15 = branch never!! ouput : %i0 = 0 = good! = 1 = error!branches: save %sp, -88, %sp ! save the registers, stacck set temp2, %l0 set temp1, %l1 set temp, %l2 set 0x0, %l3 st %l3, [%l0] !set the result to be true st %i1, [%l1] st %i2, [%l2] ld [%l1], %f0 ld [%l2], %f2 fcmps %f0, %f2 ! compare the values to get ficc nop cmp %i0, %l3 be brn_0 inc %l3 cmp %i0, %l3 be brn_1 inc %l3 cmp %i0, %l3 be brn_2 inc %l3 cmp %i0, %l3 be brn_3 inc %l3 cmp %i0, %l3 be brn_4 inc %l3 cmp %i0, %l3 be brn_5 inc %l3 cmp %i0, %l3 be brn_6 inc %l3 cmp %i0, %l3 be brn_7 inc %l3 cmp %i0, %l3 be brn_8 inc %l3 cmp %i0, %l3 be brn_9 inc %l3 cmp %i0, %l3 be brn_10 inc %l3 cmp %i0, %l3 be brn_11 inc %l3 cmp %i0, %l3 be brn_12 inc %l3 cmp %i0, %l3 be brn_13 inc %l3 cmp %i0, %l3 be brn_14 nop fbn br_error nopbr_good: ld [%l0], %i0 ret restore br_error: set 0xff, %l3 ! set the flag that it is error st %l3, [%l0] ld [%l0], %i0 ret restore ! ! branch unorderedbrn_0: fbu br_good nop ba br_error nop! branch greaterbrn_1: fbg br_good nop ba br_error nop! branch unordered or greaterbrn_2: fbug br_good nop ba br_error nop! branch lessbrn_3: fbl br_good nop ba br_error nop! branch unorderd or lessbrn_4: fbul br_good nop ba br_error nop! branch less or greaterbrn_5: fblg br_good nop ba br_error nop! branch not equalbrn_6: fbne br_good nop ba br_error nop! branch equalbrn_7: fbe br_good nop ba br_error nop! branch unordered or equalbrn_8: fbue br_good nop ba br_error nop! branch greater or equalbrn_9: fbge br_good nop ba br_error nop! branch unordered or greater or equalbrn_10: fbuge br_good nop ba br_error nop! branch less or equalbrn_11: fble br_good nop ba br_error nop! branch unordered or less or equalbrn_12: fbule br_good nop ba br_error nop! branch orderedbrn_13: fbo br_good nop ba br_error nop! branch alwaysbrn_14: fba br_good nop ba br_error nop!!! !++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++! Name: ! Function: ! Calling: ! Returns: ! Convention: !--------------------------------------------------------------------------!trap_remove: save %sp, -88, %sp set temp, %l2 std %fq, [%l2] std %fq, [%l2] nop ret restore!++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++! Name: ! Function: ! Calling: ! Returns: ! Convention: !--------------------------------------------------------------------------fpu_exc: save %sp, -88, %sp ! save the registers, stacck!* set exp_trap_signal, %l0 set temp, %l2 ld [%l0], %l1 st %i0, [%l0] ! put the expected interrupt level fsqrtx %f0, %f4 ! send an unimplemented instruction std %fq, [%l2] std %fq, [%l2] std %fq, [%l2] std %fq, [%l2] std %fq, [%l2] std %fq, [%l2] std %fq, [%l2] std %fq, [%l2] ld [%l0], %i0 ! return the interrupt level st %l1, [%l0] ! put the original interrupt level!* save %sp, -88, %sp!* fsqrtx %f0, %f4!* nop ret restore!! for single to integer round !!*_sin_int_rnd:!* save %sp, -88, %sp ! save the registers, stacck!* set temp2, %o5!* set temp, %o4!* st %i0, [%o4]!* ld [%o4], %f0!* fstoir %f0, %f2!* st %f2, [%o5]!* ld [%o5], %i0!* ret!* restore!*_doub_int_rnd:!* save %sp, -88, %sp ! save the registers, stacck !* set temp2, %o5 !* set temp, %o4 !* st %i0, [%o4] !*! ld [%o4], %f0 !* fdtoir %f0, %f2 !* st %f2, [%o5] !* ld [%o5], %i0 !* ret !* restore
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