📄 svr4fpu-test.s
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nopgood:nogood: ld [%l2], %i0 ret restore ! Now for mult!timing_mult_dp: save %sp, -88, %sp ! save the registers, stacck set wdp, %l0 set wdp1, %l1 set wdp2, %l2 set 0x0, %l3 set 0x3ff00000, %l4 ! put value 1 set 0x40340000, %l5 ! put value 20 into local 5 st %l5, [%l0] st %l4, [%l1] st %l3, [%l2] ld [%l0], %f30 ! register 30 has 20 ld [%l1], %f2 ! register 2 has 1 fmovs %f30, %f0 ! register 0 has 20 faddd %f2, %f2, %f10 ! register 10 has 2 fmovs %f10, %f16 ! register 16 has 2 faddd %f10, %f16, %f4 ! register 4 has 4 faddd %f4, %f2, %f6 ! register 6 has 5 fmovs %f6, %f12 ! reg. 12 has 5 fmovs %f4, %f14 ! reg 14 has 4 faddd %f12, %f6, %f18 ! reg 18 has 10 fmovs %f18, %f8 ! reg 8 has 10!! now everything is set! fmuld %f0, %f2, %f20 ! reg 20 has 20 fmuld %f4, %f6, %f22 ! reg 22 has 20 fmuld %f8, %f10, %f24 ! reg 24 has 20 fmuld %f12, %f14, %f26 ! reg 26 has 20 fmuld %f16, %f18, %f28 ! reg 28 has 20! fcmpd %f30, %f20 nop fbe dm22 nop st %f20, [%l2] ba nogood nopdm22: fcmpd %f30, %f22 nop fbe dm24 nop st %f22, [%l2] ba nogood nopdm24: fcmpd %f30, %f24 nop fbe dm26 nop st %f24, [%l2] ba nogood nop dm26: fcmpd %f30, %f26 nop fbe dm28 nop st %f26, [%l2] ba nogood nop dm28: fcmpd %f30, %f28 nop fbe good nop st %f28, [%l2] nop ba nogood nop!! .seg ".text" .global wadd_sp .global wadd_dp .global wdiv_sp .global wdiv_dp .global wmult_sp .global wmult_dp .global wsadd_addr .global wdadd_addr .global wsdiv_addr .global wddiv_addr .global wsmult_addr .global wdmult_addr .global actual_addr .global chain_sp .global chain_dp !++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++! Name: ! Function: ! Calling: ! Returns: ! Convention: !--------------------------------------------------------------------------! The following routines are for checking the weitek! status tests. ! The input is : i0 = amsw! i1 = bmsw or alsw (for double precision)! i2 = bmsw (for dp)! i3 = blsw (for dp)!! The output is i0 = value of FSR register!wadd_sp: save %sp, -88, %sp set xdp, %l0 set xdp1, %l1 set xdp2, %l2 set wsadd_addr, %l3 set actual_addr, %l4 st %l3, [%l4] st %i0, [%l0] ! get the first value st %i1, [%l1] ! get the second value ld [%l0], %f0 ! f0 has the first value ld [%l1], %f2 ! f2 has the second value ld [%l1], %o3wsadd_addr: fadds %f0, %f2, %f3 ! now do the instruction nop nop st %fsr, [%l2] ! get the fsr valuego_back: nop ld [%l2], %i0 ret restore nop!! same thing for add double precision!wadd_dp: save %sp, -88, %sp set xdp, %l0 set xdp1, %l1 set xdp2, %l2 set wdadd_addr, %l3 set actual_addr, %l4 st %l3, [%l4] st %i0, [%l0] ! get the first value st %i1, [%l1] ! get the lsw of first value ld [%l0], %f0 ld [%l1], %f1 st %i2, [%l0] ! get the second value st %i3, [%l1] ! get the lsw of second value ld [%l0], %f2 ld [%l1], %f3wdadd_addr: faddd %f0, %f2, %f4 ! now do the instruction nop nop st %fsr, [%l2] ! get the fsr value ba go_back nop!!! for divide single precision!wdiv_sp: save %sp, -88, %sp set xdp, %l0 set xdp1, %l1 set xdp2, %l2 set wsdiv_addr, %l3 set actual_addr, %l4 st %l3, [%l4] st %i0, [%l0] ! get the first value st %i1, [%l1] ! get the second value st %fsr, [%l2] ld [%l0], %f0 ! f0 has the first value ld [%l1], %f2 ! f2 has the second value wsdiv_addr: fdivs %f0, %f2, %f3 ! now do the instruction nop nop st %fsr, [%l2] ! get the fsr value ba go_back nop!!! for divide double precision!wdiv_dp: save %sp, -88, %sp set xdp, %l0 set xdp1, %l1 set xdp2, %l2 set wddiv_addr, %l3 set actual_addr, %l4 st %l3, [%l4] st %i0, [%l0] ! get the first value st %i1, [%l1] ! get the lsw of first value ld [%l0], %f0 ld [%l1], %f1 st %i2, [%l0] ! get the second value st %i3, [%l1] ! get the lsw of second value ld [%l0], %f2 ld [%l1], %f3 wddiv_addr: fdivd %f0, %f2, %f4 ! now do the instruction nop nop st %fsr, [%l2] ! get the fsr value ba go_back nop!!! for multiply single precision !wmult_sp: save %sp, -88, %sp set xdp, %l0 set xdp1, %l1 set xdp2, %l2 set wsmult_addr, %l3 set actual_addr, %l4 st %l3, [%l4] st %i0, [%l0] ! get the first value st %i1, [%l1] ! get the second value ld [%l0], %f0 ! f0 has the first value ld [%l1], %f2 ! f2 has the second value wsmult_addr: fmuls %f0, %f2, %f3 ! now do the instruction nop nop st %fsr, [%l2] ! get the fsr value ba go_back nop! ! ! for multiply double precision ! wmult_dp: save %sp, -88, %sp set xdp, %l0 set xdp1, %l1 set xdp2, %l2 set wdmult_addr, %l3 set actual_addr, %l4 st %l3, [%l4] st %i0, [%l0] ! get the first value st %i1, [%l1] ! get the lsw of first value ld [%l0], %f0 ld [%l1], %f1 st %i2, [%l0] ! get the second value st %i3, [%l1] ! get the lsw of second value ld [%l0], %f2 ld [%l1], %f3 wdmult_addr: fmuld %f0, %f2, %f4 ! now do the instruction nop nop st %fsr, [%l2] ! get the fsr value ba go_back nop!! ! Chaining test.! chain_sp: save %sp, -88, %sp set xdp, %l0 set xdp1, %l1 st %i0, [%l0] ! store the value ld [%l0], %f0 fitos %f0, %f2 ! convert integer into single fmovs %f2, %f0 ! f0 has the same value x fadds %f0, %f2, %f4 ! f4 will have 2x fsubs %f4, %f0, %f6 ! f6 will have x fmuls %f6, %f4, %f8 ! f8 will have (2x * x) fdivs %f8, %f4, %f10 ! f10 will have (2x * x) / 2x = x fstoi %f10, %f12ch_done: st %f12, [%l1] ld [%l1], %i0 ret restore!!chain_dp: save %sp, -88, %sp set xdp, %l0 set xdp1, %l1 st %i0, [%l0] ! store the value ld [%l0], %f0 fitod %f0, %f2 ! convert integer into double fmovs %f2, %f0 ! f0 has the same value x faddd %f0, %f2, %f4 ! f4 will have 2x fsubd %f4, %f0, %f6 ! f6 will have x fmuld %f6, %f4, %f8 ! f8 will have (2x * x) fdivd %f8, %f4, %f10 ! f10 will have (2x * x) / 2x = x fdtoi %f10, %f12 ba ch_done!! nop! .seg ".data" .align 4xdp: .word 1 /* storage location for a single precision */xdp1: .word 1 /* storage for double precision */xdp2: .word 1 /* storage for extended */xp_result: .word 2 actual_addr: .word 2 .seg ".text" .global fpu_soft_trap .global fp_addr .global fsr_data .common donot_dq,4,4 .global seqerr_trap!++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++! Name: ! Function: ! Calling: ! Returns: ! Convention: !--------------------------------------------------------------------------fpu_soft_trap: save %sp, -88, %sp set fwp, %l1 set fp_addr, %l2 set fsr_data, %l3 set 0x1, %l5 ! set the flag that trap occured set donot_dq, %l6 st %l5, [%l4] ! set the flag st %fsr, [%l3] ! store the fsr data ld [%l6], %i0 cmp %i0, %l5 ! check whether bit is set for be no_que nop std %fq, [%l2] std %fq, [%l1]!* std %fq, [%l1] st %fsr, [%l1] ld [%l1], %i0!no_que: !* st %fsr, [%l1]!* ld [%l1], %i0 ret restore!++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++! Name: ! Function: ! Calling: ! Returns: ! Convention: !--------------------------------------------------------------------------!! This routine is to create the seqerror trap only ! just uses an floating point operation and does not! do anything.!seqerr_trap: save %sp, -88, %sp set fwp, %l1 ld [%l1], %f0 ! just do some fpu instruction st %fsr, [%l1] nop nop ld [%l1], %i0 ret restore .seg ".data"fp_addr: .word 2fsr_data: .word 2donot_dq: .word 2fwp: .word 1fwp1: .word 1 .seg ".text"!++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++! Name: Clear all Registers! Function: Loads the callers value into all floating point registers.! Calling: in0 = Value! Returns: All float register = Value! Convention: clear_regs(0);! Method: Copys the user value into each floa reg in sequence.!--------------------------------------------------------------------------clear_regs: save %sp, -88, %sp ! save the registers, stack set temp2, %l0 ! load the address of temp2 in local0 st %i0, [%l0] ! load the value in temp2 via local0 ld [%l0], %f0 ! .. load the value ld [%l0], %f1 ! .. load the value ld [%l0], %f2 ! .. load the value ld [%l0], %f3 ! .. load the value ld [%l0], %f4 ! .. load the value ld [%l0], %f5 ! .. load the value ld [%l0], %f6 ! .. load the value ld [%l0], %f7 ! .. load the value ld [%l0], %f8 ! .. load the value ld [%l0], %f9 ! .. load the value ld [%l0], %f10 ! .. load the value ld [%l0], %f11 ! .. load the value ld [%l0], %f12 ! .. load the value ld [%l0], %f13 ! .. load the value ld [%l0], %f14 ! .. load the value ld [%l0], %f15 ! .. load the value ld [%l0], %f16 ! .. load the value ld [%l0], %f17 ! .. load the value ld [%l0], %f18 ! .. load the value ld [%l0], %f19 ! .. load the value ld [%l0], %f20 ! .. load the value ld [%l0], %f21 ! .. load the value ld [%l0], %f22 ! .. load the value ld [%l0], %f23 ! .. load the value ld [%l0], %f24 ! .. load the value ld [%l0], %f25 ! .. load the value ld [%l0], %f26 ! .. load the value ld [%l0], %f27 ! .. load the value ld [%l0], %f28 ! .. load the value ld [%l0], %f29 ! .. load the value ld [%l0], %f30 ! .. load the value ld [%l0], %f31 ! .. load the value ret restore!++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++! Name: ! Function: ! Calling: ! Returns: ! Convention: !--------------------------------------------------------------------------register_test: save %sp, -88, %sp set temp, %l0 set temp1, %l1 set temp2,%l2 set 0x0, %l3 !reg has register number st %i0, [%l0] !save the register number st %i1, [%l1] !save the pattern to be written cmp %i0, %l3 ! == 0 be reg0 inc %l3 cmp %i0, %l3 ! == 1 be reg1 inc %l3 cmp %i0, %l3 ! == 2 be reg2 inc %l3 cmp %i0, %l3 ! == 3 be reg3 inc %l3 cmp %i0, %l3 ! == 4 be reg4 inc %l3 cmp %i0, %l3 ! == 5 be reg5 inc %l3 cmp %i0, %l3 ! == 5 be reg6 inc %l3 cmp %i0, %l3 ! == 7 be reg7 inc %l3 cmp %i0, %l3 ! == 8 be reg8 inc %l3 cmp %i0, %l3 ! == 9 be reg9 inc %l3 cmp %i0, %l3 ! == 10 be reg10 inc %l3 cmp %i0, %l3 ! == 11 be reg11 inc %l3 cmp %i0, %l3 ! == 12 be reg12 inc %l3 cmp %i0, %l3 ! == 13 be reg13 inc %l3 cmp %i0, %l3 ! == 14 be reg14 inc %l3 cmp %i0, %l3 ! == 15 be reg15 inc %l3 cmp %i0, %l3 ! == 16 be reg16 inc %l3 cmp %i0, %l3 ! == 17 be reg17 inc %l3 cmp %i0, %l3 ! == 18 be reg18 inc %l3 cmp %i0, %l3 ! == 19
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