📄 cg6tec.h
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/* * @(#)cg6tec.h 1.3 89/03/30 SMI *//* * Copyright 1989, Sun Microsystems, Inc. */#ifndef cg6tec_DEFINED#define cg6tec_DEFINED/* * TEC register offsets from base address. These offsets are * intended to be added to a pointer-to-integer whose value is the * base address of the CG6 memory mapped register area. */typedef double TEC_DATA; /* type for DATA00 - 63 *//* base for transform data registers */#define L_TEC_DATA_BASE (0x100/sizeof(u_int))#define L_TEC_DATA00 (0x100/sizeof(u_int))#define L_TEC_DATA01 (0x104/sizeof(u_int))#define L_TEC_DATA02 (0x108/sizeof(u_int))#define L_TEC_DATA03 (0x10C/sizeof(u_int))#define L_TEC_DATA04 (0x110/sizeof(u_int))#define L_TEC_DATA05 (0x114/sizeof(u_int))#define L_TEC_DATA06 (0x118/sizeof(u_int))#define L_TEC_DATA07 (0x11C/sizeof(u_int))#define L_TEC_DATA08 (0x120/sizeof(u_int))#define L_TEC_DATA09 (0x124/sizeof(u_int))#define L_TEC_DATA10 (0x128/sizeof(u_int))#define L_TEC_DATA11 (0x12C/sizeof(u_int))#define L_TEC_DATA12 (0x130/sizeof(u_int))#define L_TEC_DATA13 (0x134/sizeof(u_int))#define L_TEC_DATA14 (0x138/sizeof(u_int))#define L_TEC_DATA15 (0x13C/sizeof(u_int))#define L_TEC_DATA16 (0x140/sizeof(u_int))#define L_TEC_DATA17 (0x144/sizeof(u_int))#define L_TEC_DATA18 (0x148/sizeof(u_int))#define L_TEC_DATA19 (0x14C/sizeof(u_int))#define L_TEC_DATA20 (0x150/sizeof(u_int))#define L_TEC_DATA21 (0x154/sizeof(u_int))#define L_TEC_DATA22 (0x158/sizeof(u_int))#define L_TEC_DATA23 (0x15C/sizeof(u_int))#define L_TEC_DATA24 (0x160/sizeof(u_int))#define L_TEC_DATA25 (0x164/sizeof(u_int))#define L_TEC_DATA26 (0x168/sizeof(u_int))#define L_TEC_DATA27 (0x16C/sizeof(u_int))#define L_TEC_DATA28 (0x170/sizeof(u_int))#define L_TEC_DATA29 (0x174/sizeof(u_int))#define L_TEC_DATA30 (0x178/sizeof(u_int))#define L_TEC_DATA31 (0x17C/sizeof(u_int))#define L_TEC_DATA32 (0x180/sizeof(u_int))#define L_TEC_DATA33 (0x184/sizeof(u_int))#define L_TEC_DATA34 (0x188/sizeof(u_int))#define L_TEC_DATA35 (0x18C/sizeof(u_int))#define L_TEC_DATA36 (0x190/sizeof(u_int))#define L_TEC_DATA37 (0x194/sizeof(u_int))#define L_TEC_DATA38 (0x198/sizeof(u_int))#define L_TEC_DATA39 (0x19C/sizeof(u_int))#define L_TEC_DATA40 (0x1A0/sizeof(u_int))#define L_TEC_DATA41 (0x1A4/sizeof(u_int))#define L_TEC_DATA42 (0x1A8/sizeof(u_int))#define L_TEC_DATA43 (0x1AC/sizeof(u_int))#define L_TEC_DATA44 (0x1B0/sizeof(u_int))#define L_TEC_DATA45 (0x1B4/sizeof(u_int))#define L_TEC_DATA46 (0x1B8/sizeof(u_int))#define L_TEC_DATA47 (0x1BC/sizeof(u_int))#define L_TEC_DATA48 (0x1C0/sizeof(u_int))#define L_TEC_DATA49 (0x1C4/sizeof(u_int))#define L_TEC_DATA50 (0x1C8/sizeof(u_int))#define L_TEC_DATA51 (0x1CC/sizeof(u_int))#define L_TEC_DATA52 (0x1D0/sizeof(u_int))#define L_TEC_DATA53 (0x1D4/sizeof(u_int))#define L_TEC_DATA54 (0x1D8/sizeof(u_int))#define L_TEC_DATA55 (0x1DC/sizeof(u_int))#define L_TEC_DATA56 (0x1E0/sizeof(u_int))#define L_TEC_DATA57 (0x1E4/sizeof(u_int))#define L_TEC_DATA58 (0x1E8/sizeof(u_int))#define L_TEC_DATA59 (0x1EC/sizeof(u_int))#define L_TEC_DATA60 (0x1F0/sizeof(u_int))#define L_TEC_DATA61 (0x1F4/sizeof(u_int))#define L_TEC_DATA62 (0x1F8/sizeof(u_int))#define L_TEC_DATA63 (0x1FC/sizeof(u_int))/* matrix registers */#define L_TEC_MV_MATRIX (0x000/sizeof(u_int))#define L_TEC_CLIPCHECK (0x004/sizeof(u_int))#define L_TEC_VDC_MATRIX (0x008/sizeof(u_int))/* command register */#define L_TEC_COMMAND1 (0x0010/sizeof(u_int))#define L_TEC_COMMAND2 (0x0014/sizeof(u_int))#define L_TEC_COMMAND3 (0x0018/sizeof(u_int))#define L_TEC_COMMAND4 (0x001c/sizeof(u_int))/* u_integer indexed address registers */#define L_TEC_IPOINTABSX ( 0x800 / sizeof(u_int) )#define L_TEC_IPOINTABSY ( 0x804 / sizeof(u_int) )#define L_TEC_IPOINTABSZ ( 0x808 / sizeof(u_int) )#define L_TEC_IPOINTABSW ( 0x80C / sizeof(u_int) )#define L_TEC_IPOINTRELX ( 0x810 / sizeof(u_int) )#define L_TEC_IPOINTRELY ( 0x814 / sizeof(u_int) )#define L_TEC_IPOINTRELZ ( 0x818 / sizeof(u_int) )#define L_TEC_IPOINTRELW ( 0x81C / sizeof(u_int) )#define L_TEC_ILINEABSX ( 0x840 / sizeof(u_int) )#define L_TEC_ILINEABSY ( 0x844 / sizeof(u_int) )#define L_TEC_ILINEABSZ ( 0x848 / sizeof(u_int) )#define L_TEC_ILINEABSW ( 0x84C / sizeof(u_int) )#define L_TEC_ILINERELX ( 0x850 / sizeof(u_int) )#define L_TEC_ILINERELY ( 0x854 / sizeof(u_int) )#define L_TEC_ILINERELZ ( 0x858 / sizeof(u_int) )#define L_TEC_ILINERELW ( 0x85C / sizeof(u_int) )#define L_TEC_ITRIABSX ( 0x880 / sizeof(u_int) )#define L_TEC_ITRIABSY ( 0x884 / sizeof(u_int) )#define L_TEC_ITRIABSZ ( 0x888 / sizeof(u_int) )#define L_TEC_ITRIABSW ( 0x88C / sizeof(u_int) )#define L_TEC_ITRIRELX ( 0x890 / sizeof(u_int) )#define L_TEC_ITRIRELY ( 0x894 / sizeof(u_int) )#define L_TEC_ITRIRELZ ( 0x898 / sizeof(u_int) )#define L_TEC_ITRIRELW ( 0x89C / sizeof(u_int) )#define L_TEC_IQUADABSX ( 0x8C0 / sizeof(u_int) )#define L_TEC_IQUADABSY ( 0x8C4 / sizeof(u_int) )#define L_TEC_IQUADABSZ ( 0x8C8 / sizeof(u_int) )#define L_TEC_IQUADABSW ( 0x8CC / sizeof(u_int) )#define L_TEC_IQUADRELX ( 0x8D0 / sizeof(u_int) )#define L_TEC_IQUADRELY ( 0x8D4 / sizeof(u_int) )#define L_TEC_IQUADRELZ ( 0x8D8 / sizeof(u_int) )#define L_TEC_IQUADRELW ( 0x8DC / sizeof(u_int) )#define L_TEC_IRECTABSX ( 0x900 / sizeof(u_int) )#define L_TEC_IRECTABSY ( 0x904 / sizeof(u_int) )#define L_TEC_IRECTABSZ ( 0x908 / sizeof(u_int) )#define L_TEC_IRECTABSW ( 0x90C / sizeof(u_int) )#define L_TEC_IRECTRELX ( 0x910 / sizeof(u_int) )#define L_TEC_IRECTRELY ( 0x914 / sizeof(u_int) )#define L_TEC_IRECTRELZ ( 0x918 / sizeof(u_int) )#define L_TEC_IRECTRELW ( 0x91C / sizeof(u_int) )/* fixed pou_int indexed address registers */#define L_TEC_BPOINTABSX ( 0xA00 / sizeof(u_int) )#define L_TEC_BPOINTABSY ( 0xA04 / sizeof(u_int) )#define L_TEC_BPOINTABSZ ( 0xA08 / sizeof(u_int) )#define L_TEC_BPOINTABSW ( 0xA0C / sizeof(u_int) )#define L_TEC_BPOINTRELX ( 0xA10 / sizeof(u_int) )#define L_TEC_BPOINTRELY ( 0xA14 / sizeof(u_int) )#define L_TEC_BPOINTRELZ ( 0xA18 / sizeof(u_int) )#define L_TEC_BPOINTRELW ( 0xA1C / sizeof(u_int) )#define L_TEC_BLINEABSX ( 0xA40 / sizeof(u_int) )#define L_TEC_BLINEABSY ( 0xA44 / sizeof(u_int) )#define L_TEC_BLINEABSZ ( 0xA48 / sizeof(u_int) )#define L_TEC_BLINEABSW ( 0xA4C / sizeof(u_int) )#define L_TEC_BLINERELX ( 0xA50 / sizeof(u_int) )#define L_TEC_BLINERELY ( 0xA54 / sizeof(u_int) )#define L_TEC_BLINERELZ ( 0xA58 / sizeof(u_int) )#define L_TEC_BLINERELW ( 0xA5C / sizeof(u_int) )#define L_TEC_BTRIABSX ( 0xA80 / sizeof(u_int) )#define L_TEC_BTRIABSY ( 0xA84 / sizeof(u_int) )#define L_TEC_BTRIABSZ ( 0xA88 / sizeof(u_int) )#define L_TEC_BTRIABSW ( 0xA8C / sizeof(u_int) )#define L_TEC_BTRIRELX ( 0xA90 / sizeof(u_int) )#define L_TEC_BTRIRELY ( 0xA94 / sizeof(u_int) )#define L_TEC_BTRIRELZ ( 0xA98 / sizeof(u_int) )#define L_TEC_BTRIRELW ( 0xA9C / sizeof(u_int) )#define L_TEC_BQUADABSX ( 0xAC0 / sizeof(u_int) )#define L_TEC_BQUADABSY ( 0xAC4 / sizeof(u_int) )#define L_TEC_BQUADABSZ ( 0xAC8 / sizeof(u_int) )#define L_TEC_BQUADABSW ( 0xACC / sizeof(u_int) )#define L_TEC_BQUADRELX ( 0xAD0 / sizeof(u_int) )#define L_TEC_BQUADRELY ( 0xAD4 / sizeof(u_int) )#define L_TEC_BQUADRELZ ( 0xAD8 / sizeof(u_int) )#define L_TEC_BQUADRELW ( 0xADC / sizeof(u_int) )#define L_TEC_BRECTABSX ( 0xB00 / sizeof(u_int) )#define L_TEC_BRECTABSY ( 0xB04 / sizeof(u_int) )#define L_TEC_BRECTABSZ ( 0xB08 / sizeof(u_int) )#define L_TEC_BRECTABSW ( 0xB0C / sizeof(u_int) )#define L_TEC_BRECTRELX ( 0xB10 / sizeof(u_int) )#define L_TEC_BRECTRELY ( 0xB14 / sizeof(u_int) )#define L_TEC_BRECTRELZ ( 0xB18 / sizeof(u_int) )#define L_TEC_BRECTRELW ( 0xB1C / sizeof(u_int) )/* floating pou_int indexed address registers */#define L_TEC_FPOINTABSX ( 0xC00 / sizeof(u_int) )#define L_TEC_FPOINTABSY ( 0xC04 / sizeof(u_int) )#define L_TEC_FPOINTABSZ ( 0xC08 / sizeof(u_int) )#define L_TEC_FPOINTABSW ( 0xC0C / sizeof(u_int) )#define L_TEC_FPOINTRELX ( 0xC10 / sizeof(u_int) )#define L_TEC_FPOINTRELY ( 0xC14 / sizeof(u_int) )#define L_TEC_FPOINTRELZ ( 0xC18 / sizeof(u_int) )#define L_TEC_FPOINTRELW ( 0xC1C / sizeof(u_int) )#define L_TEC_FLINEABSX ( 0xC40 / sizeof(u_int) )#define L_TEC_FLINEABSY ( 0xC44 / sizeof(u_int) )#define L_TEC_FLINEABSZ ( 0xC48 / sizeof(u_int) )#define L_TEC_FLINEABSW ( 0xC4C / sizeof(u_int) )#define L_TEC_FLINERELX ( 0xC50 / sizeof(u_int) )#define L_TEC_FLINERELY ( 0xC54 / sizeof(u_int) )#define L_TEC_FLINERELZ ( 0xC58 / sizeof(u_int) )#define L_TEC_FLINERELW ( 0xC5C / sizeof(u_int) )#define L_TEC_FTRIABSX ( 0xC80 / sizeof(u_int) )#define L_TEC_FTRIABSY ( 0xC84 / sizeof(u_int) )#define L_TEC_FTRIABSZ ( 0xC88 / sizeof(u_int) )#define L_TEC_FTRIABSW ( 0xC8C / sizeof(u_int) )#define L_TEC_FTRIRELX ( 0xC90 / sizeof(u_int) )#define L_TEC_FTRIRELY ( 0xC94 / sizeof(u_int) )#define L_TEC_FTRIRELZ ( 0xC98 / sizeof(u_int) )#define L_TEC_FTRIRELW ( 0xC9C / sizeof(u_int) )#define L_TEC_FQUADABSX ( 0xCC0 / sizeof(u_int) )#define L_TEC_FQUADABSY ( 0xCC4 / sizeof(u_int) )#define L_TEC_FQUADABSZ ( 0xCC8 / sizeof(u_int) )#define L_TEC_FQUADABSW ( 0xCCC / sizeof(u_int) )#define L_TEC_FQUADRELX ( 0xCD0 / sizeof(u_int) )#define L_TEC_FQUADRELY ( 0xCD4 / sizeof(u_int) )#define L_TEC_FQUADRELZ ( 0xCD8 / sizeof(u_int) )#define L_TEC_FQUADRELW ( 0xCDC / sizeof(u_int) )#define L_TEC_FRECTABSX ( 0xD00 / sizeof(u_int) )#define L_TEC_FRECTABSY ( 0xD04 / sizeof(u_int) )#define L_TEC_FRECTABSZ ( 0xD08 / sizeof(u_int) )#define L_TEC_FRECTABSW ( 0xD0C / sizeof(u_int) )#define L_TEC_FRECTRELX ( 0xD10 / sizeof(u_int) )#define L_TEC_FRECTRELY ( 0xD14 / sizeof(u_int) )#define L_TEC_FRECTRELZ ( 0xD18 / sizeof(u_int) )#define L_TEC_FRECTRELW ( 0xD1C / sizeof(u_int) )/* * Generic unsigned types for bit fields */typedef enum { L_TEC_UNUSED = 0} l_tec_unused_t;/* * typedefs for entering index registers */typedef enum { /* coordinate type of {pou_int,line,etc} */ L_TEC_X = 0, L_TEC_Y = 1, L_TEC_Z = 2, L_TEC_W = 3, /* used as index to store index writes in tec_data array*/ L_TEC_X_MV = 4, L_TEC_Y_MV = 5, L_TEC_Z_MV = 6, L_TEC_W_MV = 7, /* used as index to store xform results */ L_TEC_X_VDC = 8, L_TEC_Y_VDC = 9, L_TEC_Z_VDC = 10, /* used as index to store VDC multiply results */ L_TEC_SCRATCH = 11 /* scratch register */} l_tec_coord_t;typedef enum { /* index coordinate type */ L_TEC_INT = 0, L_TEC_FRAC = 1, L_TEC_FLOAT = 2} l_tec_type_t;typedef enum { /* index object type */ L_TEC_POINT = 0, L_TEC_LINE = 1, L_TEC_TRI = 2, L_TEC_QUAD = 3, L_TEC_RECT = 4} l_tec_object_t;typedef enum { L_TEC_ABS = 0, L_TEC_REL = 1} l_tec_mode_t;/* * TEC MV_MATRIX register bits. */typedef enum { L_TEC_MV_DIV_OFF = 0, L_TEC_MV_DIV_ON = 1} l_tec_mv_div_t;typedef enum { L_TEC_MV_AUTO_OFF = 0, L_TEC_MV_AUTO_ON = 1} l_tec_mv_auto_t; typedef enum { L_TEC_MV_H_FALSE = 0, L_TEC_MV_H_TRUE = 1} l_tec_mv_h_t;typedef enum { L_TEC_MV_Z_FALSE = 0, L_TEC_MV_Z_TRUE = 1 } l_tec_mv_z_t;typedef enum { L_TEC_MV_I3 = 0, L_TEC_MV_I4 = 1 } l_tec_mv_i_t;typedef enum { L_TEC_MV_J1 = 0, L_TEC_MV_J2 = 1, L_TEC_MV_J3 = 2, L_TEC_MV_J4 = 3 } l_tec_mv_j_t;typedef struct l_tec_mv { l_tec_unused_t l_tec_mv_unused1 :16; /* NOT USED */ l_tec_mv_div_t l_tec_mv_div : 1; /* divide enable */ l_tec_mv_auto_t l_tec_mv_autoload : 1; /* autoload enable */ l_tec_mv_h_t l_tec_mv_h : 1; /* pou_int size */ l_tec_mv_z_t l_tec_mv_z : 1; /* pou_int size */ l_tec_unused_t l_tec_mv_unused2 : 1; /* NOT USED */ l_tec_mv_i_t l_tec_mv_i : 1; /* matrix rows */ l_tec_mv_j_t l_tec_mv_j : 2; /* matrix columns */ l_tec_unused_t l_tec_mv_unused3 : 2; /* NOT USED */ unsigned l_tec_mv_index : 6; /* matrix start data reg. */} l_tec_mv_t;/* * TEC CLIPCHECK bits. */typedef enum { L_TEC_EXCEPTION_OFF = 0, L_TEC_EXCEPTION_ON= 1 } l_tec_clip_exception_t;typedef enum { L_TEC_HIDDEN_OFF = 0, L_TEC_HIDDEN_ON = 1 } l_tec_clip_hidden_t;typedef enum { L_TEC_INTERSECT_OFF = 0, L_TEC_INTERSECT_ON = 1 } l_tec_clip_u_intersect_t;typedef enum { L_TEC_VISIBLE_OFF = 0, L_TEC_VISIBLE_ON = 1 } l_tec_clip_visible_t;typedef enum { L_TEC_ACC_BACKSIDE_FALSE = 0, L_TEC_ACC_BACKSIDE_TRUE = 1 } l_tec_clip_acc_backside_t;
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