📄 mpi_cnfg.h
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U32 HwSettings[1]; /* 08h */} fCONFIG_PAGE_MANUFACTURING_2, MPI_POINTER PTR_CONFIG_PAGE_MANUFACTURING_2, ManufacturingPage2_t, MPI_POINTER pManufacturingPage2_t;#define MPI_MANUFACTURING2_PAGEVERSION (0x00)typedef struct _CONFIG_PAGE_MANUFACTURING_3{ fCONFIG_PAGE_HEADER Header; /* 00h */ MPI_CHIP_REVISION_ID ChipId; /* 04h */ U32 Info[1]; /* 08h */} fCONFIG_PAGE_MANUFACTURING_3, MPI_POINTER PTR_CONFIG_PAGE_MANUFACTURING_3, ManufacturingPage3_t, MPI_POINTER pManufacturingPage3_t;#define MPI_MANUFACTURING3_PAGEVERSION (0x00)/****************************************************************************//* IO Unit Config Pages *//****************************************************************************/typedef struct _CONFIG_PAGE_IO_UNIT_0{ fCONFIG_PAGE_HEADER Header; /* 00h */ U64 UniqueValue; /* 04h */} fCONFIG_PAGE_IO_UNIT_0, MPI_POINTER PTR_CONFIG_PAGE_IO_UNIT_0, IOUnitPage0_t, MPI_POINTER pIOUnitPage0_t;#define MPI_IOUNITPAGE0_PAGEVERSION (0x00)typedef struct _CONFIG_PAGE_IO_UNIT_1{ fCONFIG_PAGE_HEADER Header; /* 00h */ U32 Flags; /* 04h */} fCONFIG_PAGE_IO_UNIT_1, MPI_POINTER PTR_CONFIG_PAGE_IO_UNIT_1, IOUnitPage1_t, MPI_POINTER pIOUnitPage1_t;#define MPI_IOUNITPAGE1_PAGEVERSION (0x00)#define MPI_IOUNITPAGE1_MULTI_FUNCTION (0x00000000)#define MPI_IOUNITPAGE1_SINGLE_FUNCTION (0x00000001)#define MPI_IOUNITPAGE1_MULTI_PATHING (0x00000002)#define MPI_IOUNITPAGE1_SINGLE_PATHING (0x00000000)#define MPI_IOUNITPAGE1_FORCE_32 (0x00000080)typedef struct _MPI_ADAPTER_INFO{ U8 PciBusNumber; /* 00h */ U8 PciDeviceAndFunctionNumber; /* 01h */ U16 AdapterFlags; /* 02h */} MPI_ADAPTER_INFO, MPI_POINTER PTR_MPI_ADAPTER_INFO, MpiAdapterInfo_t, MPI_POINTER pMpiAdapterInfo_t;#define MPI_ADAPTER_INFO_FLAGS_EMBEDDED (0x0001)#define MPI_ADAPTER_INFO_FLAGS_INIT_STATUS (0x0002)typedef struct _CONFIG_PAGE_IO_UNIT_2{ fCONFIG_PAGE_HEADER Header; /* 00h */ U32 Flags; /* 04h */ U32 BiosVersion; /* 08h */ MPI_ADAPTER_INFO AdapterOrder[4]; /* 0Ch */} fCONFIG_PAGE_IO_UNIT_2, MPI_POINTER PTR_CONFIG_PAGE_IO_UNIT_2, IOUnitPage2_t, MPI_POINTER pIOUnitPage2_t;#define MPI_IOUNITPAGE2_PAGEVERSION (0x00)#define MPI_IOUNITPAGE2_FLAGS_RAID_DISABLE (0x00000001)#define MPI_IOUNITPAGE2_FLAGS_PAUSE_ON_ERROR (0x00000002)#define MPI_IOUNITPAGE2_FLAGS_VERBOSE_ENABLE (0x00000004)#define MPI_IOUNITPAGE2_FLAGS_COLOR_VIDEO_DISABLE (0x00000008)#define MPI_IOUNITPAGE2_FLAGS_DONT_HOOK_INT_40 (0x00000010)typedef struct _CONFIG_PAGE_IO_UNIT_3{ fCONFIG_PAGE_HEADER Header; /* 00h */ U32 VolumeSettings; /* 04h */ U8 InfoOffset0; /* 08h */ U8 InfoSize0; /* 09h */ U8 InfoOffset1; /* 0Ah */ U8 InfoSize1; /* 0Bh */ U8 InquirySize; /* 0Ch */ U8 Reserved; /* 0Dh */ U16 Reserved2; /* 0Eh */ U8 InquiryData[56]; /* 10h */} fCONFIG_PAGE_IO_UNIT_3, MPI_POINTER PTR_CONFIG_PAGE_IO_UNIT_3, IOUnitPage3_t, MPI_POINTER pIOUnitPage3_t;#define MPI_IOUNITPAGE3_PAGEVERSION (0x00)/****************************************************************************//* IOC Config Pages *//****************************************************************************/typedef struct _CONFIG_PAGE_IOC_0{ fCONFIG_PAGE_HEADER Header; /* 00h */ U32 TotalNVStore; /* 04h */ U32 FreeNVStore; /* 08h */ U16 VendorID; /* 0Ch */ U16 DeviceID; /* 0Eh */ U8 RevisionID; /* 10h */ U8 Reserved[3]; /* 11h */ U32 ClassCode; /* 14h */ U16 SubsystemVendorID; /* 18h */ U16 SubsystemID; /* 1Ah */} fCONFIG_PAGE_IOC_0, MPI_POINTER PTR_CONFIG_PAGE_IOC_0, IOCPage0_t, MPI_POINTER pIOCPage0_t;#define MPI_IOCPAGE0_PAGEVERSION (0x01)typedef struct _CONFIG_PAGE_IOC_1{ fCONFIG_PAGE_HEADER Header; /* 00h */ U32 Flags; /* 04h */ U32 CoalescingTimeout; /* 08h */ U8 CoalescingDepth; /* 0Ch */ U8 Reserved[3]; /* 0Dh */} fCONFIG_PAGE_IOC_1, MPI_POINTER PTR_CONFIG_PAGE_IOC_1, IOCPage1_t, MPI_POINTER pIOCPage1_t;#define MPI_IOCPAGE1_PAGEVERSION (0x00)#define MPI_IOCPAGE1_REPLY_COALESCING (0x00000001)typedef struct _CONFIG_PAGE_IOC_2_RAID_VOL{ U8 VolumeTargetID; /* 00h */ U8 VolumeBus; /* 01h */ U16 Reserved; /* 02h */ U8 VolumeVersionMinor; /* 04h */ U8 VolumeVersionMajor; /* 05h */ U8 VolumeRaidType; /* 06h */ U8 Reserved1; /* 07h */} fCONFIG_PAGE_IOC_2_RAID_VOL, MPI_POINTER PTR_CONFIG_PAGE_IOC_2_RAID_VOL, ConfigPageIoc2RaidVol_t, MPI_POINTER pConfigPageIoc2RaidVol_t;typedef struct _CONFIG_PAGE_IOC_2{ fCONFIG_PAGE_HEADER Header; /* 00h */ U32 CapabilitiesFlags; /* 04h */ U8 NumActiveVolumes; /* 08h */ U8 MaxVolumes; /* 09h */ U16 Reserved; /* 0Ah */ fCONFIG_PAGE_IOC_2_RAID_VOL RaidVolume[1]; /* 0Ch */} fCONFIG_PAGE_IOC_2, MPI_POINTER PTR_CONFIG_PAGE_IOC_2, IOCPage2_t, MPI_POINTER pIOCPage2_t;#define MPI_IOCPAGE2_PAGEVERSION (0x00)/* IOC Page 2 Capabilities flags */#define MPI_IOCPAGE2_CAP_FLAGS_RAID_0_SUPPORT (0x00000001)#define MPI_IOCPAGE2_CAP_FLAGS_RAID_1_SUPPORT (0x00000002)#define MPI_IOCPAGE2_CAP_FLAGS_LSI_MIRROR_SUPPORT (0x00000004)#define MPI_IOCPAGE2_CAP_FLAGS_RAID_5_SUPPORT (0x00000008)#define MPI_IOCPAGE2_CAP_FLAGS_RAID_10_SUPPORT (0x00000010)/* IOC Page 2 Volume RAID Type values */#define MPI_IOCPAGE2_VOL_TYPE_RAID_0 (0x00)#define MPI_IOCPAGE2_VOL_TYPE_RAID_1 (0x01)#define MPI_IOCPAGE2_VOL_TYPE_LSI_MIRROR (0x02)#define MPI_IOCPAGE2_VOL_TYPE_RAID_5 (0x05)#define MPI_IOCPAGE2_VOL_TYPE_RAID_10 (0x0A)/****************************************************************************//* SCSI Port Config Pages *//****************************************************************************/typedef struct _CONFIG_PAGE_SCSI_PORT_0{ fCONFIG_PAGE_HEADER Header; /* 00h */ U32 Capabilities; /* 04h */ U32 PhysicalInterface; /* 08h */} fCONFIG_PAGE_SCSI_PORT_0, MPI_POINTER PTR_CONFIG_PAGE_SCSI_PORT_0, SCSIPortPage0_t, MPI_POINTER pSCSIPortPage0_t;#define MPI_SCSIPORTPAGE0_PAGEVERSION (0x01)#define MPI_SCSIPORTPAGE0_CAP_IU (0x00000001)#define MPI_SCSIPORTPAGE0_CAP_DT (0x00000002)#define MPI_SCSIPORTPAGE0_CAP_QAS (0x00000004)#define MPI_SCSIPORTPAGE0_CAP_PACING_TRANSFERS (0x00000008)#define MPI_SCSIPORTPAGE0_CAP_MIN_SYNC_PERIOD_MASK (0x0000FF00)#define MPI_SCSIPORTPAGE0_CAP_MAX_SYNC_OFFSET_MASK (0x00FF0000)#define MPI_SCSIPORTPAGE0_CAP_WIDE (0x20000000)#define MPI_SCSIPORTPAGE0_CAP_AIP (0x80000000)#define MPI_SCSIPORTPAGE0_PHY_SIGNAL_TYPE_MASK (0x00000003)#define MPI_SCSIPORTPAGE0_PHY_SIGNAL_HVD (0x01)#define MPI_SCSIPORTPAGE0_PHY_SIGNAL_SE (0x02)#define MPI_SCSIPORTPAGE0_PHY_SIGNAL_LVD (0x03)typedef struct _CONFIG_PAGE_SCSI_PORT_1{ fCONFIG_PAGE_HEADER Header; /* 00h */ U32 Configuration; /* 04h */} fCONFIG_PAGE_SCSI_PORT_1, MPI_POINTER PTR_CONFIG_PAGE_SCSI_PORT_1, SCSIPortPage1_t, MPI_POINTER pSCSIPortPage1_t;#define MPI_SCSIPORTPAGE1_PAGEVERSION (0x01)#define MPI_SCSIPORTPAGE1_CFG_PORT_SCSI_ID_MASK (0x000000FF)#define MPI_SCSIPORTPAGE1_CFG_PORT_RESPONSE_ID_MASK (0xFFFF0000)typedef struct _MPI_DEVICE_INFO{ U8 Timeout; /* 00h */ U8 SyncFactor; /* 01h */ U16 DeviceFlags; /* 02h */} MPI_DEVICE_INFO, MPI_POINTER PTR_MPI_DEVICE_INFO, MpiDeviceInfo_t, MPI_POINTER pMpiDeviceInfo_t;typedef struct _CONFIG_PAGE_SCSI_PORT_2{ fCONFIG_PAGE_HEADER Header; /* 00h */ U32 PortFlags; /* 04h */ U32 PortSettings; /* 08h */ MPI_DEVICE_INFO DeviceSettings[16]; /* 0Ch */} fCONFIG_PAGE_SCSI_PORT_2, MPI_POINTER PTR_CONFIG_PAGE_SCSI_PORT_2, SCSIPortPage2_t, MPI_POINTER pSCSIPortPage2_t;#define MPI_SCSIPORTPAGE2_PAGEVERSION (0x01)#define MPI_SCSIPORTPAGE2_PORT_FLAGS_SCAN_HIGH_TO_LOW (0x00000001)#define MPI_SCSIPORTPAGE2_PORT_FLAGS_PARITY_ENABLE (0x00000002)#define MPI_SCSIPORTPAGE2_PORT_FLAGS_AVOID_SCSI_RESET (0x00000004)#define MPI_SCSIPORTPAGE2_PORT_FLAGS_ALTERNATE_CHS (0x00000008)#define MPI_SCSIPORTPAGE2_PORT_FLAGS_TERMINATION_DISABLE (0x00000010)#define MPI_SCSIPORTPAGE2_PORT_HOST_ID_MASK (0x0000000F)#define MPI_SCSIPORTPAGE2_PORT_MASK_INIT_HBA (0x00000030)#define MPI_SCSIPORTPAGE2_PORT_DISABLE_INIT_HBA (0x00000000)#define MPI_SCSIPORTPAGE2_PORT_BIOS_INIT_HBA (0x00000010)#define MPI_SCSIPORTPAGE2_PORT_OS_INIT_HBA (0x00000020)#define MPI_SCSIPORTPAGE2_PORT_BIOS_OS_INIT_HBA (0x00000030)#define MPI_SCSIPORTPAGE2_PORT_REMOVABLE_MEDIA (0x000000C0)#define MPI_SCSIPORTPAGE2_PORT_SPINUP_DELAY_MASK (0x00000F00)#define MPI_SCSIPORTPAGE2_PORT_MASK_NEGO_MASTER_SETTINGS (0x00003000)#define MPI_SCSIPORTPAGE2_PORT_NEGO_MASTER_SETTINGS (0x00000000)#define MPI_SCSIPORTPAGE2_PORT_NONE_MASTER_SETTINGS (0x00001000)#define MPI_SCSIPORTPAGE2_PORT_ALL_MASTER_SETTINGS (0x00003000)#define MPI_SCSIPORTPAGE2_DEVICE_DISCONNECT_ENABLE (0x0001)#define MPI_SCSIPORTPAGE2_DEVICE_ID_SCAN_ENABLE (0x0002)#define MPI_SCSIPORTPAGE2_DEVICE_LUN_SCAN_ENABLE (0x0004)#define MPI_SCSIPORTPAGE2_DEVICE_TAG_QUEUE_ENABLE (0x0008)#define MPI_SCSIPORTPAGE2_DEVICE_WIDE_DISABLE (0x0010)#define MPI_SCSIPORTPAGE2_DEVICE_BOOT_CHOICE (0x0020)/****************************************************************************//* SCSI Target Device Config Pages *//****************************************************************************/typedef struct _CONFIG_PAGE_SCSI_DEVICE_0{ fCONFIG_PAGE_HEADER Header; /* 00h */ U32 NegotiatedParameters; /* 04h */ U32 Information; /* 08h */} fCONFIG_PAGE_SCSI_DEVICE_0, MPI_POINTER PTR_CONFIG_PAGE_SCSI_DEVICE_0, SCSIDevicePage0_t, MPI_POINTER pSCSIDevicePage0_t;⌨️ 快捷键说明
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