📄 telecrd2.lst
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MPASM 01.02 Released TELECRD2.ASM 9-16-1994 10:19:25 PAGE 1
ISO 7816 Synchronous Memory Card Emulator
LOC OBJECT CODE LINE SOURCE TEXT
VALUE
0001
0002 TITLE "ISO 7816 Synchronous Memory Card Emulator"
0003 LIST P=PIC16C84, R=HEX
0004 INCLUDE "PICREG.EQU"
0001 ; PIC16Cxx Microcontroller Include File
0002
01FF 0003 PIC54 equ 0x1ff ; PIC16C54 Reset Vector
01FF 0004 PIC55 equ 0x1ff ; PIC16C55 Reset Vector
03FF 0005 PIC56 equ 0x3ff ; PIC16C56 Reset Vector
07FF 0006 PIC57 equ 0x7ff ; PIC16C57 Reset Vector
0000 0007 PIC71 equ 0x000 ; PIC16C71 Reset Vector
0000 0008 PIC84 equ 0x000 ; PIC16C84 Reset Vector
0004 0009 INTVEC equ 0x004 ; PIC16C71/84 Interupt Vector
0010
0000 0011 INDIR equ 0x000 ; Indirect File Reg Address Register
0001 0012 RTCC equ 0x001 ; Real Time Clock Counter
0002 0013 PCL equ 0x002 ; Program Counter Low Byte
0003 0014 STATUS equ 0x003 ; Status Register
0004 0015 FSR equ 0x004 ; File Select Register
0005 0016 PORTA equ 0x005 ; Port A I/O Register
0006 0017 PORTB equ 0x006 ; Port B I/O Register
0007 0018 PORTC equ 0x007 ; Port C I/O Register
0008 0019 ADCON0 equ 0x008 ; PIC16C71 A/D Control Reg 0
0009 0020 ADRES equ 0x009 ; PIC16C71 A/D Converter Result Register
0008 0021 EEDATA equ 0x008 ; PIC16C84 EEPROM Data Register
0009 0022 EEADR equ 0x009 ; PIC16C84 EEPROM Address Register
000A 0023 PCLATH equ 0x00a ; Program Counter High Bits
000B 0024 INTCON equ 0x00b ; Interrupt Control Register
0005 0025 TRISA equ 0x005 ; Port A I/O Direction Register
0006 0026 TRISB equ 0x006 ; Port B I/O Direction Register
0007 0027 TRISC equ 0x007 ; Port C I/O Direction Register
0008 0028 ADCON1 equ 0x008 ; PIC16C71 A/D Control Reg 1
0008 0029 EECON1 equ 0x008 ; PIC16C84 EEPROM Control Reg. 1
0009 0030 EECON2 equ 0x009 ; PIC16C84 EEPROM Control Reg. 2
0001 0031 OPTION equ 0x001 ; Option Register
0032
0007 0033 MSB equ 0x007 ; Most-Significant Bit
0000 0034 LSB equ 0x000 ; Least-Significant Bit
0001 0035 TRUE equ 1
0001 0036 YES equ 1
0000 0037 FALSE equ 0
0000 0038 NO equ 0
0039
0040 ; Status Register (f03) Bits
0041
0000 0042 CARRY equ 0x000 ; Carry Bit
0000 0043 C equ 0x000 ; Carry Bit
0001 0044 DCARRY equ 0x001 ; Digit Carry Bit
0001 0045 DC equ 0x001 ; Digit Carry Bit
0002 0046 Z_BIT equ 0x002 ; Zero Bit
0002 0047 Z equ 0x002 ; Zero Bit
0003 0048 P_DOWN equ 0x003 ; Power Down Bit
0003 0049 PD equ 0x003 ; Power Down Bit
MPASM 01.02 Released TELECRD2.ASM 9-16-1994 10:19:25 PAGE 2
ISO 7816 Synchronous Memory Card Emulator
LOC OBJECT CODE LINE SOURCE TEXT
VALUE
0004 0050 T_OUT equ 0x004 ; Watchdog Time-Out Bit
0004 0051 TO equ 0x004 ; Watchdog Time-Out Bit
0005 0052 RP0 equ 0x005 ; Register Page Select 0
0006 0053 RP1 equ 0x006 ; Register Page Select 1
0007 0054 IRP equ 0x007 ; Indirect Addressing Reg. Page Sel.
0055
0056 ; INTCON Register (f0b) Bits
0057
0000 0058 RBIF equ 0x000 ; RB Port change interrupt flag
0001 0059 INTF equ 0x001 ; INT Interrupt Flag
0002 0060 RTIF equ 0x002 ; RTCC Overflow Interupt Flag
0003 0061 RBIE equ 0x003 ; RB Port Ch. Interupt Enable
0004 0062 INTE equ 0x004 ; INT Interupt Enable
0005 0063 RTIE equ 0x005 ; RTCC Overflow Int. Enable
0006 0064 ADIE equ 0x006 ; PIC16C71 A/D Int. Enable
0006 0065 EEIE equ 0x006 ; PIC16C84 EEPROM Write Int. Enable
0007 0066 GIE equ 0x007 ; Global Interupt Enable
0067
0068 ; OPTION Register (f81) Bits
0069
0000 0070 PS0 equ 0x000 ; Prescaler Bit 0
0001 0071 PS1 equ 0x001 ; Prescaler Bit 1
0002 0072 PS2 equ 0x002 ; Prescaler Bit 2
0003 0073 PSA equ 0x003 ; Prescaler Assignment Bit
0004 0074 RTE equ 0x004 ; RTCC Signal Edge Select
0005 0075 RTS equ 0x005 ; RTCC Signal Source Select
0006 0076 INTEDG equ 0x006 ; Interupt Edge Select
0007 0077 RBPU equ 0x007 ; Port B Pull-up Enable
0078
0079 ; ADCON0 Register (f08) Bits
0080
0000 0081 ADON equ 0x000 ; A/D Converter Power Switch
0001 0082 ADIF equ 0x001 ; A/D Conversion Interupt Flag
0002 0083 ADGO equ 0x002 ; A/D Conversion Start Flag
0003 0084 CHS0 equ 0x003 ; A/D Converter Channel Select 0
0004 0085 CHS1 equ 0x004 ; A/D Converter Channel Select 1
0006 0086 ADCS0 equ 0x006 ; A/D Conversion Clock Select 0
0007 0087 ADCS1 equ 0x007 ; A/D Conversion Clock Select 0
0088
0089 ; ADCON1 Register (f88) Bits
0090
0000 0091 PCFG0 equ 0x000 ; RA0-RA3 Configuration Bit 0
0001 0092 PCFG1 equ 0x001 ; RA0-RA3 Configuration Bit 0
0093
0094 ; EECON1 Register (f88) Bits
0095
0000 0096 RD equ 0x000 ; PIC16C84 EEPROM Read Data Flag
0001 0097 WR equ 0x001 ; PIC16C84 EEPROM Write Data Flag
0002 0098 WREN equ 0x002 ; PIC16C84 EEPROM Write Enable Flag
0003 0099 WRERR equ 0x003 ; PIC16C84 EEPROM Write Error Flag
0004 0100 EEIF equ 0x004 ; PIC16C84 EEPROM Interupt Flag
0101
0102 ; Some useful macros...
MPASM 01.02 Released TELECRD2.ASM 9-16-1994 10:19:25 PAGE 3
ISO 7816 Synchronous Memory Card Emulator
LOC OBJECT CODE LINE SOURCE TEXT
VALUE
0103
0104 PUSH macro
0105 movwf TEMP_W
0106 swapf STATUS,W
0107 movwf TEMP_S
0108 endm
0109
0110 POP macro
0111 swapf TEMP_S,W
0112 movwf STATUS
0113 swapf TEMP_W
0114 swapf TEMP_W,W
0115 endm
0116
0117 END
0004
0005
0006 ; PIC16C84 I/O Pin Assignment List
0007
0000 0008 CRD_CLK equ 0 ; RB0 + RA4 = Card Clock
0000 0009 CRD_DTA equ 0 ; RA0 = Card Data Output
0001 0010 CRD_RST equ 1 ; RB1 = Card Reset, Low-Active
0007 0011 CRD_WE equ 7 ; RB7 = Card Write-Enable, Hi-Active
0012
0013 ; PIC16C84 RAM Register Assignments
0014
000C 0015 CRD_ID equ 0x00c ; Smartcard ID, 12 bytes
0018 0016 FUSCNT equ 0x018 ; Fused units counter
0019 0017 BITCNT equ 0x019 ; Bitcounter
001A 0018 LOOPCNT equ 0x01a ; Loop Counter
001B 0019 EE_FLAG equ 0x01b ; EEPROM Write Flag
001C 0020 TEMP1 equ 0x01c ; Temporary Storage #1
001D 0021 TEMP2 equ 0x01d ; Temporary Storage #2
001E 0022 TEMP3 equ 0x01e ; Temporary Storage #3
001F 0023 TEMP4 equ 0x01f ; Temporary Storage #4
002E 0024 TEMP_W equ 0x02e ; Temporary W Save Address
002F 0025 TEMP_S equ 0x02f ; Temporary STATUS Save Address
0026
0027 org 0x2000 ; Chip ID Data
Warning: Address exceeds maximum range for this processor
Warning: Address exceeds maximum range for this processor
Warning: Address exceeds maximum range for this processor
2000 0042 0042 0042 0028 dw 042,042,042,042
Warning: Address exceeds maximum range for this processor
2003 0042 0028
0029
0030 org 0x2007 ; Configuration Fuses
Warning: Address exceeds maximum range for this processor
2007 0001 0031 dw B'00000001'
0032
0033 org 0x2100 ; Internal Data EEPROM Memory (Card ID Data!)
Warning: Address exceeds maximum range for this processor
Warning: Address exceeds maximum range for this processor
MPASM 01.02 Released TELECRD2.ASM 9-16-1994 10:19:25 PAGE 4
ISO 7816 Synchronous Memory Card Emulator
LOC OBJECT CODE LINE SOURCE TEXT
VALUE
Warning: Address exceeds maximum range for this processor
2100 8142 0011 2233 0034 db 0x081,0x042,0x000,0x011,0x022,0x033
0034
Warning: Address exceeds maximum range for this processor
Warning: Address exceeds maximum range for this processor
Warning: Address exceeds maximum range for this processor
2103 4455 6677 1184 0035 db 0x044,0x055,0x066,0x077,0x011,0x084
0035
Warning: Address exceeds maximum range for this processor
2106 0200 0036 db 0x002 ; Fresh Card Fused Units Count
0037
0038 org PIC84 ; Reset-vector
0000 2810 0039 goto INIT ; Jump to initialization routine
0040
0041 org INTVEC ; Interupt-vector
0042 push ; Save registers
0004 00AE M movwf TEMP_W
0005 0E03 M swapf STATUS,W
0006 00AF M movwf TEMP_S
0007 2048 0043 call INTMAIN ; Call main interupt routine
0044 pop ; Restore registers
0008 0E2F M swapf TEMP_S,W
0009 0083 M movwf STATUS
000A 0EAE M swapf TEMP_W
000B 0E2E M swapf TEMP_W,W
000C 0009 0045 retfie ; return from interupt & clear flag
0046
0047 org 0x010 ; Start address for init rout.
0010 1683 0048 INIT bsf STATUS,RP0 ; Access register bank 1
0011 0064 0049 clrwdt ; Clear watchdog timer
0012 30E8 0050 movlw B'11101000' ; OPTION reg. settings
0013 0081 0051 movwf OPTION ; Store in OPTION register
0014 30FE 0052 movlw B'11111110' ; Set PORT A Tristate Latches
0015 0085 0053 movwf TRISA ; Store in PORT A tristate register
0016 30FF 0054 movlw B'11111111' ; Set PORT B Tristate Latches
0017 0086 0055 movwf TRISB ; Store in PORT B tristate register
0018 1283 0056 bcf STATUS,RP0 ; Access register bank 0
0019 0181 0057 clrf RTCC ; Clear RTCC
001A 0185 0058 clrf PORTA ; Clear PORTA
001B 0186 0059 clrf PORTB ; Clear PORTB
001C 300D 0060 movlw 0d ; 13 bytes to copy
001D 009A 0061 movwf LOOPCNT ; Store in LOOPCNT
001E 300C 0062 movlw 0c ; Start storing at $0c in RAM
001F 0084 0063 movwf FSR ; Store in FSR
0020 0189 0064 clrf EEADR ; Start at EEPROM Address 0
0021 0065 EECOPY
0021 1683 0066 bsf STATUS,RP0 ; Access register bank 1
0022 1408 0067 bsf EECON1,RD ; Set EECON1 Read Data Flag
0023 1283 0068 bcf STATUS,RP0 ; Access register bank 0
0024 0808 0069 movfw EEDATA ; Read one byte of EEPROM Data
0025 0080 0070 movwf INDIR ; Store in RAM pointed at by FSR
MPASM 01.02 Released TELECRD2.ASM 9-16-1994 10:19:25 PAGE 5
ISO 7816 Synchronous Memory Card Emulator
LOC OBJECT CODE LINE SOURCE TEXT
VALUE
0026 0A84 0071 incf FSR ; Increase FSR pointer
0027 0A89 0072 incf EEADR ; Increase EEPROM Address Pointer
0028 0B9A 0073 decfsz LOOPCNT,1 ; Decrease LOOPCNT until it's 0
0029 2821 0074 goto EECOPY ; Go and get some more bytes!
002A 1683 0075 bsf STATUS,RP0 ; Access register bank 1
002B 1208 0076 bcf EECON1,EEIF ; Clear EEPROM Write Int. Flag
002C 1108 0077 bcf EECON1,WREN ; EEPROM Write Disable
002D 1283 0078 bcf STATUS,RP0 ; Access register bank 0
002E 3090 0079 movlw B'10010000' ; Enable INT Interupt
002F 008B 0080 movwf INTCON ; Store in INTCON
0081
0030 1683 0082 MAIN bsf STATUS,RP0 ; Access register bank 1
0031 1888 0083 btfsc EECON1,WR ; Check if EEPROM Write Flag Set
0032 2830 0084 goto MAIN ; Skip if EEPROM Write is Completed
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